DE3688251D1 - Cmos- zu ecl-schnittstellenschaltung. - Google Patents

Cmos- zu ecl-schnittstellenschaltung.

Info

Publication number
DE3688251D1
DE3688251D1 DE8787900372T DE3688251T DE3688251D1 DE 3688251 D1 DE3688251 D1 DE 3688251D1 DE 8787900372 T DE8787900372 T DE 8787900372T DE 3688251 T DE3688251 T DE 3688251T DE 3688251 D1 DE3688251 D1 DE 3688251D1
Authority
DE
Germany
Prior art keywords
cmos
interface switching
ecl interface
ecl
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787900372T
Other languages
English (en)
Other versions
DE3688251T2 (de
Inventor
Hamidi Sani
Greathouse Tipon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR International Inc
Original Assignee
NCR International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR International Inc filed Critical NCR International Inc
Publication of DE3688251D1 publication Critical patent/DE3688251D1/de
Application granted granted Critical
Publication of DE3688251T2 publication Critical patent/DE3688251T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
DE87900372T 1985-11-25 1986-11-10 Cmos- zu ecl-schnittstellenschaltung. Expired - Fee Related DE3688251T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/801,548 US4656372A (en) 1985-11-25 1985-11-25 CMOS to ECL interface circuit
PCT/US1986/002396 WO1987003435A1 (en) 1985-11-25 1986-11-10 Cmos to ecl interface circuit

Publications (2)

Publication Number Publication Date
DE3688251D1 true DE3688251D1 (de) 1993-05-13
DE3688251T2 DE3688251T2 (de) 1993-11-04

Family

ID=25181412

Family Applications (1)

Application Number Title Priority Date Filing Date
DE87900372T Expired - Fee Related DE3688251T2 (de) 1985-11-25 1986-11-10 Cmos- zu ecl-schnittstellenschaltung.

Country Status (6)

Country Link
US (1) US4656372A (de)
EP (1) EP0247172B1 (de)
JP (1) JPS63501468A (de)
CA (1) CA1262175A (de)
DE (1) DE3688251T2 (de)
WO (1) WO1987003435A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585599B2 (ja) * 1987-06-05 1997-02-26 株式会社日立製作所 出力インタ−フエ−ス回路
US4912347A (en) * 1987-08-25 1990-03-27 American Telephone And Telegraph Company, At&T Bell Laboratories CMOS to ECL output buffer
US4782250A (en) * 1987-08-31 1988-11-01 International Business Machines Corporation CMOS off-chip driver circuits
JP2542022B2 (ja) * 1987-12-18 1996-10-09 沖電気工業株式会社 電界効果トランジスタ負荷回路
JPH01195719A (ja) * 1988-01-30 1989-08-07 Nec Corp 半導体集積回路
US4942398A (en) * 1989-03-21 1990-07-17 Unisys Corporation Digital signal translator having compensation for P-channel and N-channel threshold voltage shifts
US5030856A (en) * 1989-05-04 1991-07-09 International Business Machines Corporation Receiver and level converter circuit with dual feedback
US4998028A (en) * 1990-01-26 1991-03-05 International Business Machines Corp. High speed CMOS logic device for providing ECL compatible logic levels
ES2022019A6 (es) * 1990-04-30 1991-11-16 Alcatel Standard Electrica Conversor de niveles de logica complementaria metal-oxido-semiconductor (cmos) a logica de emisores acoplados (ecl) de senales digitales.
US5216297A (en) * 1991-09-12 1993-06-01 Intergraph Corporation Low voltage swing output mos circuit for driving an ecl circuit
US5225721A (en) * 1991-12-18 1993-07-06 Unisys Corporation Signal translator for interconnecting CMOS and BiCMOS logic gates
US5311082A (en) * 1991-12-17 1994-05-10 National Semiconductor Corporation CMOS to ECL level translator
US5343094A (en) * 1993-01-13 1994-08-30 National Semiconductor Corporation Low noise logic amplifier with nondifferential to differential conversion
US5495184A (en) * 1995-01-12 1996-02-27 Vlsi Technology, Inc. High-speed low-power CMOS PECL I/O transmitter
US5525914A (en) * 1995-01-23 1996-06-11 International Business Machines Corporation CMOS driver circuit
JP3255154B2 (ja) * 1999-05-20 2002-02-12 日本電気株式会社 レベル変換方法及びレベル変換回路
US8436671B2 (en) * 2010-08-19 2013-05-07 Taiwan Semiconductor Manufacturing Company, Ltd. Level shifters having diode-connected devices for input-output interfaces

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE227843C (de) *
US3708689A (en) * 1971-10-27 1973-01-02 Motorola Inc Voltage level translating circuit
JPS5318377A (en) * 1976-08-03 1978-02-20 Toshiba Corp Logical operation circuit
FR2373921A1 (fr) * 1976-12-07 1978-07-07 Labo Cent Telecommunicat Dispositif de commutation en technologie c-mos
US4217502A (en) * 1977-09-10 1980-08-12 Tokyo Shibaura Denki Kabushiki Kaisha Converter producing three output states
US4275313A (en) * 1979-04-09 1981-06-23 Bell Telephone Laboratories, Incorporated Current limiting output circuit with output feedback
FR2499943A1 (fr) * 1981-02-17 1982-08-20 Seprosy Bidon en matiere synthetique equipe d'un regulateur de debit
DE3300869A1 (de) * 1982-01-26 1983-08-04 Deutsche Itt Industries Gmbh, 7800 Freiburg Logischer cmos-schaltkreis
JPS6083421A (ja) * 1983-10-13 1985-05-11 Seiko Epson Corp レベルシフト回路

Also Published As

Publication number Publication date
EP0247172A1 (de) 1987-12-02
JPS63501468A (ja) 1988-06-02
CA1262175A (en) 1989-10-03
EP0247172B1 (de) 1993-04-07
DE3688251T2 (de) 1993-11-04
WO1987003435A1 (en) 1987-06-04
US4656372A (en) 1987-04-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: AT&T GLOBAL INFORMATION SOLUTIONS INTERNATIONAL IN

8327 Change in the person/name/address of the patent owner

Owner name: NCR INTERNATIONAL, INC. (N.D.GES.D.STAATES DELAWAR

8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Free format text: V. BEZOLD & SOZIEN, 80799 MUENCHEN

8339 Ceased/non-payment of the annual fee