FR2373921A1 - Dispositif de commutation en technologie c-mos - Google Patents

Dispositif de commutation en technologie c-mos

Info

Publication number
FR2373921A1
FR2373921A1 FR7636727A FR7636727A FR2373921A1 FR 2373921 A1 FR2373921 A1 FR 2373921A1 FR 7636727 A FR7636727 A FR 7636727A FR 7636727 A FR7636727 A FR 7636727A FR 2373921 A1 FR2373921 A1 FR 2373921A1
Authority
FR
France
Prior art keywords
switching device
mos technology
circuits
input terminal
technology switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7636727A
Other languages
English (en)
Other versions
FR2373921B1 (fr
Inventor
Marie-Helene Comte
Jean-Pierre Michel Pillou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Laboratoire Central de Telecommunications SA
Original Assignee
Laboratoire Central de Telecommunications SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Laboratoire Central de Telecommunications SA filed Critical Laboratoire Central de Telecommunications SA
Priority to FR7636727A priority Critical patent/FR2373921A1/fr
Priority to GB5070777A priority patent/GB1543872A/en
Publication of FR2373921A1 publication Critical patent/FR2373921A1/fr
Application granted granted Critical
Publication of FR2373921B1 publication Critical patent/FR2373921B1/fr
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Abstract

La présente invention concerne les circuits C-MOS compatibles avec les niveaux de sortie des circuits TTL. Selon l'invention, lorsque la borne d'entrée E est à un niveau haut (niveau TTL), le premier inverseur (P1,N1) commute et rend conducteur le transistor P3. Celui-ci, agissant alors comme résistance de tirage, attire la borne d'entrée vers la tension VDD = 5 V ce qui a pour effet de commuter correctement les deux inverseurs et d'interdire tout passage de courant continu. L'invention s'applique aux circuits intégrés.
FR7636727A 1976-12-07 1976-12-07 Dispositif de commutation en technologie c-mos Granted FR2373921A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
FR7636727A FR2373921A1 (fr) 1976-12-07 1976-12-07 Dispositif de commutation en technologie c-mos
GB5070777A GB1543872A (en) 1976-12-07 1977-12-06 Cos/mos switching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7636727A FR2373921A1 (fr) 1976-12-07 1976-12-07 Dispositif de commutation en technologie c-mos

Publications (2)

Publication Number Publication Date
FR2373921A1 true FR2373921A1 (fr) 1978-07-07
FR2373921B1 FR2373921B1 (fr) 1980-03-21

Family

ID=9180718

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7636727A Granted FR2373921A1 (fr) 1976-12-07 1976-12-07 Dispositif de commutation en technologie c-mos

Country Status (2)

Country Link
FR (1) FR2373921A1 (fr)
GB (1) GB1543872A (fr)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0058958A2 (fr) * 1981-02-25 1982-09-01 Kabushiki Kaisha Toshiba Circuit logique du type MOSFET complémentaire
US4656372A (en) * 1985-11-25 1987-04-07 Ncr Corporation CMOS to ECL interface circuit
US4845388A (en) * 1988-01-20 1989-07-04 Martin Marietta Corporation TTL-CMOS input buffer
FR2637709A1 (fr) * 1988-10-11 1990-04-13 Bendix Electronics Sa Dispositif de charge pour ligne de bus de communication entre des circuits electroniques a niveaux logiques du type ttl et du type cmos
US5053644A (en) * 1985-05-17 1991-10-01 Hitachi, Ltd. Semiconductor integrated circuit
WO1994029963A1 (fr) * 1993-06-07 1994-12-22 National Semiconductor Corporation Conversion de tension et protection de surtension

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2604054C1 (ru) * 2016-01-22 2016-12-10 Владимир Владимирович Шубин Преобразователь уровня напряжения

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0058958A2 (fr) * 1981-02-25 1982-09-01 Kabushiki Kaisha Toshiba Circuit logique du type MOSFET complémentaire
EP0058958A3 (en) * 1981-02-25 1983-01-19 Tokyo Shibaura Denki Kabushiki Kaisha Complementary mosfet logic circuit
US4558234A (en) * 1981-02-25 1985-12-10 Tokyo Shibaura Denki Kabushiki Kaisha Complementary MOSFET logic circuit
US5053644A (en) * 1985-05-17 1991-10-01 Hitachi, Ltd. Semiconductor integrated circuit
US4656372A (en) * 1985-11-25 1987-04-07 Ncr Corporation CMOS to ECL interface circuit
US4845388A (en) * 1988-01-20 1989-07-04 Martin Marietta Corporation TTL-CMOS input buffer
FR2637709A1 (fr) * 1988-10-11 1990-04-13 Bendix Electronics Sa Dispositif de charge pour ligne de bus de communication entre des circuits electroniques a niveaux logiques du type ttl et du type cmos
WO1994029963A1 (fr) * 1993-06-07 1994-12-22 National Semiconductor Corporation Conversion de tension et protection de surtension
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
US5534795A (en) * 1993-06-07 1996-07-09 National Semiconductor Corporation Voltage translation and overvoltage protection
US5568065A (en) * 1993-06-07 1996-10-22 National Semiconductor Corporation Circuit for connecting a node to a voltage source selected from alternative voltage sources

Also Published As

Publication number Publication date
FR2373921B1 (fr) 1980-03-21
GB1543872A (en) 1979-04-11

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Legal Events

Date Code Title Description
ST Notification of lapse