DE3685450D1 - Halbleiterspeicher. - Google Patents

Halbleiterspeicher.

Info

Publication number
DE3685450D1
DE3685450D1 DE8686301928T DE3685450T DE3685450D1 DE 3685450 D1 DE3685450 D1 DE 3685450D1 DE 8686301928 T DE8686301928 T DE 8686301928T DE 3685450 T DE3685450 T DE 3685450T DE 3685450 D1 DE3685450 D1 DE 3685450D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
charge
mos transistors
spare
decoder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686301928T
Other languages
English (en)
Inventor
Koichiro C O Mitsubish Mashiko
Yoshikazu C O Mitsubis Morooka
Tadato C O Mitsubishi Yamagata
Yuto C O Mitsubishi Denk Ikeda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Application granted granted Critical
Publication of DE3685450D1 publication Critical patent/DE3685450D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability

Landscapes

  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE8686301928T 1985-03-22 1986-03-17 Halbleiterspeicher. Expired - Lifetime DE3685450D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60059234A JPS61217993A (ja) 1985-03-22 1985-03-22 半導体メモリ

Publications (1)

Publication Number Publication Date
DE3685450D1 true DE3685450D1 (de) 1992-07-02

Family

ID=13107488

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686301928T Expired - Lifetime DE3685450D1 (de) 1985-03-22 1986-03-17 Halbleiterspeicher.

Country Status (4)

Country Link
US (1) US4734889A (de)
EP (1) EP0195631B1 (de)
JP (1) JPS61217993A (de)
DE (1) DE3685450D1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890003691B1 (ko) * 1986-08-22 1989-09-30 삼성전자 주식회사 블럭 열 리던던씨 회로
JP2600435B2 (ja) * 1990-05-08 1997-04-16 松下電器産業株式会社 冗長救済回路
US5471426A (en) * 1992-01-31 1995-11-28 Sgs-Thomson Microelectronics, Inc. Redundancy decoder
US5841709A (en) * 1995-12-29 1998-11-24 Stmicroelectronics, Inc. Memory having and method for testing redundant memory cells
US6037799A (en) * 1995-12-29 2000-03-14 Stmicroelectronics, Inc. Circuit and method for selecting a signal
US5790462A (en) * 1995-12-29 1998-08-04 Sgs-Thomson Microelectronics, Inc. Redundancy control
US5771195A (en) * 1995-12-29 1998-06-23 Sgs-Thomson Microelectronics, Inc. Circuit and method for replacing a defective memory cell with a redundant memory cell
US5612918A (en) * 1995-12-29 1997-03-18 Sgs-Thomson Microelectronics, Inc. Redundancy architecture
KR0177406B1 (ko) * 1996-04-12 1999-04-15 문정환 스페어 디코더 회로
JP2009289784A (ja) * 2008-05-27 2009-12-10 Nec Electronics Corp 半導体集積回路装置
US11205479B2 (en) 2020-05-13 2021-12-21 Micron Technology, Inc. Passive compensation for electrical distance

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1982002793A1 (en) * 1981-02-02 1982-08-19 Otoole James E Semiconductor memory redundant element identification circuit
JPS57179996A (en) * 1981-04-27 1982-11-05 Nippon Telegr & Teleph Corp <Ntt> Semiconductor storage device
JPS59132492A (ja) * 1982-12-22 1984-07-30 Fujitsu Ltd 半導体記憶装置
JPS59151396A (ja) * 1983-02-15 1984-08-29 Sharp Corp 半導体読み出し専用メモリ回路
JPS59151399A (ja) * 1983-02-17 1984-08-29 Mitsubishi Electric Corp 半導体記憶装置

Also Published As

Publication number Publication date
EP0195631A3 (en) 1988-06-22
US4734889A (en) 1988-03-29
JPS61217993A (ja) 1986-09-27
EP0195631A2 (de) 1986-09-24
EP0195631B1 (de) 1992-05-27

Similar Documents

Publication Publication Date Title
DE3873839D1 (de) Mos-leistungstransistoranordnung.
GB2071910B (en) Fabrication of complementary bipolar transistors with cmos devices with polysilicon gates
DE69120483D1 (de) Halbleiter-Speicher mit unterdrücktem Testmodus-Eingang während des Strom-Einschaltens
DE3381367D1 (de) Mos-transistor.
IT1115542B (it) Processo per la fabbricazione di transistori fet di potenza
FI860222A (fi) Puolijohdekomponentti sisältäen korkeajännite-MOS kanavatransistoreita ja matalajännite-MOS kanavatransistoreita
IT1213120B (it) Processo per la fabbricazione di transistori mos complementari a basse tensioni di soglia in circuiti integrati ad alta densita&#39; e struttura da esso risultante.
DE3685450D1 (de) Halbleiterspeicher.
IT8220661A0 (it) Processo per la fabbricazione di transistori mos complementari in circuiti integrati ad alta densita&#39; per tensioni elevate.
DE3676259D1 (de) Geschuetzte mos-transistorschaltung.
DE3850828D1 (de) Inverter mit bipolarem Transistor und komplementären MOS-Transistoren.
DE3884665D1 (de) Hochleistungstransistor mit Seitenwandemitter.
DE3463882D1 (de) Mos-transistor amplifier
DE3675927D1 (de) Multizellentransistor.
DE3886284D1 (de) Halbleiterspeicheranordnung mit nichtflüchtigen Speichertransistoren.
DE3671314D1 (de) Halbleiterspeicher mit erhoehter wortleitungspannung.
DE3480672D1 (de) Halbleiterspeicher mit einem spannungsverstaerker des ladungsgekoppelten typs.
GB1552729A (en) N-channel storage field-effect transistors
DE3177128D1 (de) Integrierbare leistungstransistoranordnung.
DE3673509D1 (de) Feldeffekttransistorverstaerkerschaltungen.
DE3370245D1 (de) A mos transistor
DE3585015D1 (de) Bipolarer transistor-direktzugriffsspeicher mit redundanzkonfiguration.
BR7901859A (pt) Circuito logico integrado de transistores
ES521503A0 (es) Perfeccionamientos en una unidad de base para conjuntos de compuertas logicas de circuito integrado.
IT1131710B (it) Divisore di tensione utilizzante transistori mos

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)