DE3685341D1 - Speicher-cmos-dekodier- und antriebsschaltung. - Google Patents

Speicher-cmos-dekodier- und antriebsschaltung.

Info

Publication number
DE3685341D1
DE3685341D1 DE8686300122T DE3685341T DE3685341D1 DE 3685341 D1 DE3685341 D1 DE 3685341D1 DE 8686300122 T DE8686300122 T DE 8686300122T DE 3685341 T DE3685341 T DE 3685341T DE 3685341 D1 DE3685341 D1 DE 3685341D1
Authority
DE
Germany
Prior art keywords
drive circuit
memory cmos
cmos decoding
decoding
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686300122T
Other languages
English (en)
Inventor
Barbara Alane Chappell
Thekkemadathil Ve Rajeevakumar
Stanley Everett Schuster
Lewis Madison Terman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3685341D1 publication Critical patent/DE3685341D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
DE8686300122T 1985-01-28 1986-01-09 Speicher-cmos-dekodier- und antriebsschaltung. Expired - Fee Related DE3685341D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/695,664 US4618784A (en) 1985-01-28 1985-01-28 High-performance, high-density CMOS decoder/driver circuit

Publications (1)

Publication Number Publication Date
DE3685341D1 true DE3685341D1 (de) 1992-06-25

Family

ID=24793971

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686300122T Expired - Fee Related DE3685341D1 (de) 1985-01-28 1986-01-09 Speicher-cmos-dekodier- und antriebsschaltung.

Country Status (5)

Country Link
US (1) US4618784A (de)
EP (1) EP0191544B1 (de)
JP (1) JPH0727716B2 (de)
CA (1) CA1223352A (de)
DE (1) DE3685341D1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3427454A1 (de) * 1984-07-25 1986-01-30 Siemens AG, 1000 Berlin und 8000 München Integrierte schaltung fuer einen in komplementaerer schaltungstechnik aufgebauten dynamischen halbleiterspeicher
US5587952A (en) * 1984-12-17 1996-12-24 Hitachi, Ltd. Dynamic random access memory including read preamplifiers activated before rewrite amplifiers
US5051959A (en) * 1985-08-14 1991-09-24 Fujitsu Limited Complementary semiconductor memory device including cell access transistor and word line driving transistor having channels of different conductivity type
US4755696A (en) * 1987-06-25 1988-07-05 Delco Electronics Corporation CMOS binary threshold comparator
US4843261A (en) * 1988-02-29 1989-06-27 International Business Machines Corporation Complementary output, high-density CMOS decoder/driver circuit for semiconductor memories
US4947059A (en) * 1988-05-19 1990-08-07 Samsung Electronics Co. Ltd. Method of dividing an input-output line by decoding
US5278802A (en) * 1988-10-28 1994-01-11 Texas Instruments Incorporated Decoding global drive/boot signals using local predecoders
US5159215A (en) * 1990-02-26 1992-10-27 Nec Corporation Decoder circuit
US5015881A (en) * 1990-03-02 1991-05-14 International Business Machines Corp. High speed decoding circuit with improved AND gate
US5075571A (en) * 1991-01-02 1991-12-24 International Business Machines Corp. PMOS wordline boost cricuit for DRAM
US5241511A (en) * 1991-08-28 1993-08-31 Motorola, Inc. BiCMOS memory word line driver
US5182727A (en) * 1991-10-09 1993-01-26 Mitsubishi Semiconductor America, Inc. Array layout structure for implementing large high-density address decoders for gate array memories
US5534797A (en) * 1994-12-23 1996-07-09 At&T Corp. Compact and fast row driver/decoder for semiconductor memory
KR0179553B1 (ko) * 1995-12-29 1999-04-15 김주용 로오 디코더 및 컬럼 디코더 회로
US5808500A (en) * 1996-06-28 1998-09-15 Cypress Semiconductor Corporation Block architecture semiconductor memory array utilizing non-inverting pass gate local wordline driver
JP2865080B2 (ja) * 1996-09-30 1999-03-08 日本電気株式会社 半導体記憶装置
US5995016A (en) * 1996-12-17 1999-11-30 Rambus Inc. Method and apparatus for N choose M device selection
US9715845B2 (en) 2009-09-16 2017-07-25 Semiconductor Energy Laboratory Co., Ltd. Semiconductor display device

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4156938A (en) * 1975-12-29 1979-05-29 Mostek Corporation MOSFET Memory chip with single decoder and bi-level interconnect lines
US4477739A (en) * 1975-12-29 1984-10-16 Mostek Corporation MOSFET Random access memory chip
US4194130A (en) * 1977-11-21 1980-03-18 Motorola, Inc. Digital predecoding system
US4344005A (en) * 1978-07-18 1982-08-10 Rca Corporation Power gated decoding
JPS5833633B2 (ja) * 1978-08-25 1983-07-21 シャープ株式会社 Ｍｏｓトランジスタ・デコ−ダ
US4264828A (en) * 1978-11-27 1981-04-28 Intel Corporation MOS Static decoding circuit
US4200917A (en) * 1979-03-12 1980-04-29 Motorola, Inc. Quiet column decoder
US4301535A (en) * 1979-07-02 1981-11-17 Mostek Corporation Programmable read only memory integrated circuit with bit-check and deprogramming modes and methods for programming and testing said circuit
JPS5619584A (en) * 1979-07-24 1981-02-24 Chiyou Lsi Gijutsu Kenkyu Kumiai Semiconductor memory
JPS5641579A (en) * 1979-09-10 1981-04-18 Toshiba Corp Address selector
JPS5641580A (en) * 1979-09-13 1981-04-18 Toshiba Corp Mos decoder circuit
US4259731A (en) * 1979-11-14 1981-03-31 Motorola, Inc. Quiet row selection circuitry
US4433257A (en) * 1980-03-03 1984-02-21 Tokyo Shibaura Denki Kabushiki Kaisha Voltage supply for operating a plurality of changing transistors in a manner which reduces minority carrier disruption of adjacent memory cells
JPS573289A (en) * 1980-06-04 1982-01-08 Hitachi Ltd Semiconductor storing circuit device
DE3177270D1 (de) * 1980-10-15 1992-02-27 Toshiba Kawasaki Kk Halbleiterspeicher mit datenprogrammierzeit.
JPS6042554B2 (ja) * 1980-12-24 1985-09-24 富士通株式会社 Ｃｍｏｓメモリデコ−ダ回路
JPS58146090A (ja) * 1982-02-22 1983-08-31 Ricoh Co Ltd Ｃｍｏｓ型デコ−ダ回路
JPS5911594A (ja) * 1982-07-12 1984-01-21 Nippon Gakki Seizo Kk アドレスデコ−ダ回路
US4471240A (en) * 1982-08-19 1984-09-11 Motorola, Inc. Power-saving decoder for memories
US4514829A (en) * 1982-12-30 1985-04-30 International Business Machines Corporation Word line decoder and driver circuits for high density semiconductor memory
US4538247A (en) * 1983-01-14 1985-08-27 Fairchild Research Center Redundant rows in integrated circuit memories

Also Published As

Publication number Publication date
EP0191544A2 (de) 1986-08-20
JPS61175994A (ja) 1986-08-07
US4618784A (en) 1986-10-21
CA1223352A (en) 1987-06-23
JPH0727716B2 (ja) 1995-03-29
EP0191544B1 (de) 1992-05-20
EP0191544A3 (en) 1989-08-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee