DE3683037D1 - Halbleiteranordnung. - Google Patents

Halbleiteranordnung.

Info

Publication number
DE3683037D1
DE3683037D1 DE8686905928T DE3683037T DE3683037D1 DE 3683037 D1 DE3683037 D1 DE 3683037D1 DE 8686905928 T DE8686905928 T DE 8686905928T DE 3683037 T DE3683037 T DE 3683037T DE 3683037 D1 DE3683037 D1 DE 3683037D1
Authority
DE
Germany
Prior art keywords
semiconductor arrangement
semiconductor
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686905928T
Other languages
English (en)
Inventor
Shiomidai Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3683037D1 publication Critical patent/DE3683037D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0744Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
    • H01L27/075Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
    • H01L27/0755Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/013Modifications for accelerating switching in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Logic Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electronic Switches (AREA)
DE8686905928T 1985-10-03 1986-10-03 Halbleiteranordnung. Expired - Fee Related DE3683037D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP60219171A JPS6281120A (ja) 1985-10-03 1985-10-03 半導体装置
PCT/JP1986/000505 WO1987002182A1 (en) 1985-10-03 1986-10-03 Semiconductor device

Publications (1)

Publication Number Publication Date
DE3683037D1 true DE3683037D1 (de) 1992-01-30

Family

ID=16731311

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686905928T Expired - Fee Related DE3683037D1 (de) 1985-10-03 1986-10-03 Halbleiteranordnung.

Country Status (6)

Country Link
US (1) US4943742A (de)
EP (1) EP0238671B1 (de)
JP (1) JPS6281120A (de)
KR (1) KR920003011B1 (de)
DE (1) DE3683037D1 (de)
WO (1) WO1987002182A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4988898A (en) * 1989-05-15 1991-01-29 National Semiconductor Corporation High speed ECL/CML to TTL translator circuit
US5150177A (en) * 1991-12-06 1992-09-22 National Semiconductor Corporation Schottky diode structure with localized diode well
DE69316134T2 (de) * 1992-09-22 1998-06-18 Nat Semiconductor Corp Verfahren zur Herstellung eines Schottky-Transistors mit retrogradierter n-Wannenkathode
JPH0679709U (ja) * 1993-04-21 1994-11-08 富栄 佐橋 着 物
US5930636A (en) * 1996-05-13 1999-07-27 Trw Inc. Method of fabricating high-frequency GaAs substrate-based Schottky barrier diodes
EP2782615B1 (de) 2011-11-23 2016-10-19 KCI Licensing, Inc. Druckreduzierte systeme, verfahren und vorrichtungen zur gleichzeitigen bearbeitung mehrerer gewebebereiche

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS548440B2 (de) * 1975-02-26 1979-04-16
DE2639799C2 (de) * 1976-09-03 1984-04-12 Siemens AG, 1000 Berlin und 8000 München Halbleiterverbundanordnung
US4165470A (en) * 1976-09-20 1979-08-21 Honeywell Inc. Logic gates with forward biased diode load impedences
JPS5915176B2 (ja) * 1976-09-30 1984-04-07 サンケン電気株式会社 ガラス被覆半導体素子の製造方法
GB1572797A (en) * 1977-01-05 1980-08-06 Texas Instruments Ltd High speed high density logic
NL7712649A (nl) * 1977-11-17 1979-05-21 Philips Nv Geientegreerde schakeling.
US4129790A (en) * 1977-12-21 1978-12-12 International Business Machines Corporation High density integrated logic circuit
US4330723A (en) * 1979-08-13 1982-05-18 Fairchild Camera And Instrument Corporation Transistor logic output device for diversion of Miller current
US4682057A (en) * 1981-09-14 1987-07-21 Harris Corporation Circuit design technique to prevent current hogging when minimizing interconnect stripes by paralleling STL or ISL gate inputs
FR2589296B1 (fr) * 1985-10-29 1987-11-27 Thomson Csf Circuit de commande en parallele d'un grand nombre de cellules logiques de type stl
JPH05198985A (ja) * 1992-01-23 1993-08-06 Toshiba Corp 部品実装装置
JPH05331976A (ja) * 1992-06-03 1993-12-14 Kubota Corp 屋根パネルの接続構造

Also Published As

Publication number Publication date
EP0238671B1 (de) 1991-12-18
JPS6281120A (ja) 1987-04-14
EP0238671A4 (de) 1988-02-03
KR880700467A (ko) 1988-03-15
US4943742A (en) 1990-07-24
KR920003011B1 (ko) 1992-04-13
WO1987002182A1 (en) 1987-04-09
EP0238671A1 (de) 1987-09-30

Similar Documents

Publication Publication Date Title
DE3684557D1 (de) Waferintegrierte halbleiteranordnung.
DE3683316D1 (de) Halbleiteranordnung.
DE3481957D1 (de) Halbleiteranordnung.
DE3583302D1 (de) Halbleiteranordnung.
DE3679108D1 (de) Halbleiteranordnungen.
DE3671570D1 (de) Soi-typ-halbleiteranordnung.
DE3650613D1 (de) Halbleiteranordnung
DE3650012T2 (de) Halbleitervorrichtung.
NL189326C (nl) Halfgeleiderinrichting.
DE3683492D1 (de) Reinraum.
DE3687322D1 (de) Halbleiterspeicheranordnung.
DE3688064D1 (de) Halbleitervorrichtung.
DE3667879D1 (de) Halbleiteranordnung.
DE3582653D1 (de) Halbleiteranordnung.
DE3684184D1 (de) Verkapselte halbleiteranordnung.
DE3682421D1 (de) Feldeffekt-halbleiteranordnung.
DE3680562D1 (de) Halbleiterspeicheranordnung.
DE3675445D1 (de) Halbleiterspeicheranordnung.
DE3680265D1 (de) Halbleiterschaltungsanordnung.
DE3686490D1 (de) Halbleiterstruktur.
DE3683783D1 (de) Halbleiterspeicheranordnung.
DE3687284T2 (de) Halbleiterspeicheranordnung.
DE3682346D1 (de) Halbleiterspeicheranordnung.
DE3685889T2 (de) Halbleiterspeicheranordnung.
DE3669793D1 (de) Halbleiterkreiseinrichtung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee