DE3679618D1 - Halbleiterbauelement mit einem abrupten uebergang und verfahren zu seiner herstellung mittels epitaxie. - Google Patents

Halbleiterbauelement mit einem abrupten uebergang und verfahren zu seiner herstellung mittels epitaxie.

Info

Publication number
DE3679618D1
DE3679618D1 DE8686306552T DE3679618T DE3679618D1 DE 3679618 D1 DE3679618 D1 DE 3679618D1 DE 8686306552 T DE8686306552 T DE 8686306552T DE 3679618 T DE3679618 T DE 3679618T DE 3679618 D1 DE3679618 D1 DE 3679618D1
Authority
DE
Germany
Prior art keywords
abrupted
epitaxy
transition
production
semiconductor component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8686306552T
Other languages
English (en)
Inventor
Masanori Inada
Kazuo Eda
Yorito Ota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP18690285A external-priority patent/JPS6247158A/ja
Priority claimed from JP19077785A external-priority patent/JPS6249656A/ja
Priority claimed from JP19078685A external-priority patent/JPS6249662A/ja
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE3679618D1 publication Critical patent/DE3679618D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73Bipolar junction transistors
    • H01L29/737Hetero-junction transistors
    • H01L29/7371Vertical transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/01Bipolar transistors-ion implantation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/072Heterojunctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Transistors (AREA)
DE8686306552T 1985-08-26 1986-08-22 Halbleiterbauelement mit einem abrupten uebergang und verfahren zu seiner herstellung mittels epitaxie. Expired - Lifetime DE3679618D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP18690285A JPS6247158A (ja) 1985-08-26 1985-08-26 ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JP19077785A JPS6249656A (ja) 1985-08-29 1985-08-29 ヘテロ接合バイポ−ラトランジスタおよびその製造方法
JP19078685A JPS6249662A (ja) 1985-08-29 1985-08-29 ヘテロ接合バイポ−ラトランジスタおよびその製造方法

Publications (1)

Publication Number Publication Date
DE3679618D1 true DE3679618D1 (de) 1991-07-11

Family

ID=27325809

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686306552T Expired - Lifetime DE3679618D1 (de) 1985-08-26 1986-08-22 Halbleiterbauelement mit einem abrupten uebergang und verfahren zu seiner herstellung mittels epitaxie.

Country Status (3)

Country Link
US (1) US5037769A (de)
EP (1) EP0214802B1 (de)
DE (1) DE3679618D1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2706080B1 (fr) * 1993-06-04 1995-07-21 Thomson Csf Transistor bipolaire à hétérojonction à sous-collecteur/collecteur enterré.
US5468659A (en) * 1994-03-10 1995-11-21 Hughes Aircraft Company Reduction of base-collector junction parasitic capacitance of heterojunction bipolar transistors
DE19533677A1 (de) * 1995-09-12 1997-03-13 Daimler Benz Ag Verfahren zur Herstellung eines Heterobipolartransistors
US6368930B1 (en) * 1998-10-02 2002-04-09 Ziptronix Self aligned symmetric process and device
US6573599B1 (en) 2000-05-26 2003-06-03 Skyworks Solutions, Inc. Electrical contact for compound semiconductor device and method for forming same

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE758682A (fr) * 1969-11-10 1971-05-10 Ibm Procede de fabrication d'un transistor a socle
US4055443A (en) * 1975-06-19 1977-10-25 Jury Stepanovich Akimov Method for producing semiconductor matrix of light-emitting elements utilizing ion implantation and diffusion heating
US4032951A (en) * 1976-04-13 1977-06-28 Bell Telephone Laboratories, Incorporated Growth of iii-v layers containing arsenic, antimony and phosphorus, and device uses
US4080617A (en) * 1976-06-09 1978-03-21 Northern Telecom Limited Optoelectronic devices with control of light propagation
DE2805008A1 (de) * 1978-02-06 1979-08-09 Siemens Ag Hochfrequenztransistor
US4237471A (en) * 1979-06-22 1980-12-02 Hamamatsu Corporation Method of producing a semiconductor photodiode of indium antimonide and device thereof
US4380774A (en) * 1980-12-19 1983-04-19 The United States Of America As Represented By The Secretary Of The Navy High-performance bipolar microwave transistor
JPS5932173A (ja) * 1982-08-16 1984-02-21 Toshiba Corp 電界効果トランジスタの製造方法
JPS59125680A (ja) * 1983-01-06 1984-07-20 Nec Corp 半導体発光素子
JPS59168677A (ja) * 1983-03-14 1984-09-22 Fujitsu Ltd 半導体装置及びその製造方法
JPS59217326A (ja) * 1983-05-25 1984-12-07 Canon Inc 半導体装置形成法
JPS60253283A (ja) * 1984-05-29 1985-12-13 Toshiba Corp 半導体発光素子
US4662058A (en) * 1984-11-05 1987-05-05 Honeywell Inc. Self-aligned gate process for ICS based on modulation doped (Al,Ga) As/GaAs FETs
US4593457A (en) * 1984-12-17 1986-06-10 Motorola, Inc. Method for making gallium arsenide NPN transistor with self-aligned base enhancement to emitter region and metal contact
US4651410A (en) * 1984-12-18 1987-03-24 Semiconductor Division Thomson-Csf Components Corporation Method of fabricating regions of a bipolar microwave integratable transistor

Also Published As

Publication number Publication date
EP0214802A3 (en) 1987-09-02
EP0214802B1 (de) 1991-06-05
EP0214802A2 (de) 1987-03-18
US5037769A (en) 1991-08-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee