DE3581143D1 - Verfahren zur schutzschichtlosen waermebehandlung von iii-v-verbindungshalbleitersubstraten. - Google Patents

Verfahren zur schutzschichtlosen waermebehandlung von iii-v-verbindungshalbleitersubstraten.

Info

Publication number
DE3581143D1
DE3581143D1 DE8585111123T DE3581143T DE3581143D1 DE 3581143 D1 DE3581143 D1 DE 3581143D1 DE 8585111123 T DE8585111123 T DE 8585111123T DE 3581143 T DE3581143 T DE 3581143T DE 3581143 D1 DE3581143 D1 DE 3581143D1
Authority
DE
Germany
Prior art keywords
iii
layer
heat treatment
semiconductor substrates
free heat
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585111123T
Other languages
English (en)
Inventor
Takao Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE3581143D1 publication Critical patent/DE3581143D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3245Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering of AIIIBV compounds
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/084Ion implantation of compound devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Element Separation (AREA)
  • Junction Field-Effect Transistors (AREA)
DE8585111123T 1984-09-06 1985-09-03 Verfahren zur schutzschichtlosen waermebehandlung von iii-v-verbindungshalbleitersubstraten. Expired - Fee Related DE3581143D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59186810A JPH0750692B2 (ja) 1984-09-06 1984-09-06 ▲iii▼―▲v▼族化合物半導体の熱処理方法

Publications (1)

Publication Number Publication Date
DE3581143D1 true DE3581143D1 (de) 1991-02-07

Family

ID=16194984

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585111123T Expired - Fee Related DE3581143D1 (de) 1984-09-06 1985-09-03 Verfahren zur schutzschichtlosen waermebehandlung von iii-v-verbindungshalbleitersubstraten.

Country Status (4)

Country Link
US (1) US4676840A (de)
EP (1) EP0174010B1 (de)
JP (1) JPH0750692B2 (de)
DE (1) DE3581143D1 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4830987A (en) * 1987-11-19 1989-05-16 Texas Instruments Incorporated Contactless annealing process using cover slices
US4939101A (en) * 1988-09-06 1990-07-03 General Electric Company Method of making direct bonded wafers having a void free interface
US4929564A (en) * 1988-10-21 1990-05-29 Nippon Mining Co., Ltd. Method for producing compound semiconductor single crystals and method for producing compound semiconductor devices
DE19547601A1 (de) * 1995-12-20 1997-06-26 Sel Alcatel Ag Vorrichtung zum Sintern von porösen Schichten
EP1739213B1 (de) 2005-07-01 2011-04-13 Freiberger Compound Materials GmbH Vorrichtung und Verfahren zum Tempern von III-V-Wafern sowie getemperte III-V-Halbleitereinkristallwafer
DE102005030851A1 (de) * 2005-07-01 2007-01-04 Freiberger Compound Materials Gmbh Vorrichtung und Verfahren zum Tempern von III-V-Wafern sowie getemperte III-V-Halbleitereinkristallwafer
US9147582B2 (en) * 2011-12-19 2015-09-29 First Solar, Inc. Manufacturing methods for semiconductor devices
CN103276451B (zh) * 2013-04-26 2015-07-29 中国科学院上海技术物理研究所 一种消除InAs单晶表面电荷积累层的热处理方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4174982A (en) * 1977-06-06 1979-11-20 Rockwell International Corporation Capless annealing compound semiconductors
GB2032895B (en) * 1978-10-25 1983-04-27 Cambridge Analysing Instr Direct synthesis of inter-metallic compounds
US4312681A (en) * 1980-04-23 1982-01-26 International Business Machines Corporation Annealing of ion implanted III-V compounds in the presence of another III-V
US4357180A (en) * 1981-01-26 1982-11-02 The United States Of America As Represented By The Secretary Of The Navy Annealing of ion-implanted GaAs and InP semiconductors
JPS5873112A (ja) * 1981-10-28 1983-05-02 Nippon Hoso Kyokai <Nhk> レ−ザアニ−ル方法
FR2525028A1 (fr) * 1982-04-09 1983-10-14 Chauffage Nouvelles Tech Procede de fabrication de transistors a effet de champ, en gaas, par implantations ioniques et transistors ainsi obtenus
US4473939A (en) * 1982-12-27 1984-10-02 Hughes Aircraft Company Process for fabricating GaAs FET with ion implanted channel layer
US4494995A (en) * 1983-03-01 1985-01-22 The United States Of America As Represented By The Secretary Of The Navy Dual species ion implantation of ternary compounds based on In-Ga-As
US4544417A (en) * 1983-05-27 1985-10-01 Westinghouse Electric Corp. Transient capless annealing process for the activation of ion implanted compound semiconductors
JPS6057923A (ja) * 1983-09-09 1985-04-03 Nippon Telegr & Teleph Corp <Ntt> 化合物半導体結晶の均質化方法

Also Published As

Publication number Publication date
US4676840A (en) 1987-06-30
EP0174010A3 (en) 1988-08-31
JPS6164126A (ja) 1986-04-02
EP0174010A2 (de) 1986-03-12
EP0174010B1 (de) 1990-12-27
JPH0750692B2 (ja) 1995-05-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee