DE3537037A1 - Merged nichtfluechtige memory cell - Google Patents

Merged nichtfluechtige memory cell

Info

Publication number
DE3537037A1
DE3537037A1 DE19853537037 DE3537037A DE3537037A1 DE 3537037 A1 DE3537037 A1 DE 3537037A1 DE 19853537037 DE19853537037 DE 19853537037 DE 3537037 A DE3537037 A DE 3537037A DE 3537037 A1 DE3537037 A1 DE 3537037A1
Authority
DE
Grant status
Application
Patent type
Prior art keywords
nichtfluechtige
merged
memory cell
cell
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19853537037
Other languages
German (de)
Inventor
Andrea Ravaglia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SGS Microelettronica SpA
Original Assignee
SGS Microelettronica SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7883Programmable transistors with only two possible levels of programmation charging by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
DE19853537037 1984-10-23 1985-10-17 Merged nichtfluechtige memory cell Withdrawn DE3537037A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IT2328284A IT1213229B (en) 1984-10-23 1984-10-23 A memory cell of nonvolatile merged type with floating gate superimposed to the control and selection gate.

Publications (1)

Publication Number Publication Date
DE3537037A1 true true DE3537037A1 (en) 1986-04-24

Family

ID=11205624

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19853537037 Withdrawn DE3537037A1 (en) 1984-10-23 1985-10-17 Merged nichtfluechtige memory cell

Country Status (5)

Country Link
JP (1) JPS61101079A (en)
DE (1) DE3537037A1 (en)
FR (1) FR2572211B1 (en)
GB (1) GB8524040D0 (en)
NL (1) NL8502732A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4020007A1 (en) * 1989-06-22 1991-01-10 Nippon Telegraph & Telephone Nichtfluechtiger memory

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5057886A (en) * 1988-12-21 1991-10-15 Texas Instruments Incorporated Non-volatile memory with improved coupling between gates

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5528555B2 (en) * 1975-11-20 1980-07-29
CA1119299A (en) * 1979-02-05 1982-03-02 Abd-El-Fattah A. Ibrahim Inverse floating gate semiconductor devices
US4336603A (en) * 1980-06-18 1982-06-22 International Business Machines Corp. Three terminal electrically erasable programmable read only memory
JPS5776878A (en) * 1980-10-31 1982-05-14 Fujitsu Ltd Semiconductor memory device
GB2116367B (en) * 1982-03-09 1985-10-02 Rca Corp An electrically alterable, nonvolatile floating gate memory device
JPS59500343A (en) * 1982-03-09 1984-03-01
GB2117177B (en) * 1982-03-09 1985-11-27 Rca Corp An electrically alterable, nonvolatile floating gate memory device
JPS59105371A (en) * 1982-12-08 1984-06-18 Hitachi Ltd Non-volatile semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4020007A1 (en) * 1989-06-22 1991-01-10 Nippon Telegraph & Telephone Nichtfluechtiger memory

Also Published As

Publication number Publication date Type
GB8524040D0 (en) 1985-11-06 grant
FR2572211B1 (en) 1991-09-13 grant
JPS61101079A (en) 1986-05-19 application
FR2572211A1 (en) 1986-04-25 application
NL8502732A (en) 1986-05-16 application
GB2165991A (en) 1986-04-23 application

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Legal Events

Date Code Title Description
8139 Disposal/non-payment of the annual fee