DE3485368D1 - Verfahren zur herstellung eines halbleiterlasers. - Google Patents

Verfahren zur herstellung eines halbleiterlasers.

Info

Publication number
DE3485368D1
DE3485368D1 DE8484307339T DE3485368T DE3485368D1 DE 3485368 D1 DE3485368 D1 DE 3485368D1 DE 8484307339 T DE8484307339 T DE 8484307339T DE 3485368 T DE3485368 T DE 3485368T DE 3485368 D1 DE3485368 D1 DE 3485368D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor laser
laser
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484307339T
Other languages
English (en)
Inventor
Hiroko C O Patent Div Nagasaka
Nawoto C O Patent Divis Motegi
Hideo C O Patent Divisi Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP58224077A external-priority patent/JPS60117631A/ja
Priority claimed from JP5813584A external-priority patent/JPS60202941A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3485368D1 publication Critical patent/DE3485368D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02019—Chemical etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H01L21/30621—Vapour phase etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
DE8484307339T 1983-11-30 1984-10-25 Verfahren zur herstellung eines halbleiterlasers. Expired - Lifetime DE3485368D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP58224077A JPS60117631A (ja) 1983-11-30 1983-11-30 化合物半導体のドライエッチング方法
JP5813584A JPS60202941A (ja) 1984-03-28 1984-03-28 化合物半導体のドライエツチング法

Publications (1)

Publication Number Publication Date
DE3485368D1 true DE3485368D1 (de) 1992-01-30

Family

ID=26399209

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484307339T Expired - Lifetime DE3485368D1 (de) 1983-11-30 1984-10-25 Verfahren zur herstellung eines halbleiterlasers.

Country Status (2)

Country Link
EP (1) EP0144142B1 (de)
DE (1) DE3485368D1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3078821B2 (ja) * 1990-05-30 2000-08-21 豊田合成株式会社 半導体のドライエッチング方法
WO1998054757A1 (de) * 1997-05-26 1998-12-03 Siemens Aktiengesellschaft Verfahren zum ätzen von iii-v-halbleitermaterial

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4403241A (en) * 1980-08-22 1983-09-06 Bell Telephone Laboratories, Incorporated Method for etching III-V semiconductors and devices made by this method
JPS58143530A (ja) * 1982-02-22 1983-08-26 Toshiba Corp 化合物半導体装置の製造方法

Also Published As

Publication number Publication date
EP0144142A2 (de) 1985-06-12
EP0144142B1 (de) 1991-12-18
EP0144142A3 (en) 1986-08-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee