DE3483807D1 - Wiederholungsmechanismus zur steuerungsfreigabe eines uebertragungsweges in einem digitalen rechnersystem. - Google Patents

Wiederholungsmechanismus zur steuerungsfreigabe eines uebertragungsweges in einem digitalen rechnersystem.

Info

Publication number
DE3483807D1
DE3483807D1 DE8484401883T DE3483807T DE3483807D1 DE 3483807 D1 DE3483807 D1 DE 3483807D1 DE 8484401883 T DE8484401883 T DE 8484401883T DE 3483807 T DE3483807 T DE 3483807T DE 3483807 D1 DE3483807 D1 DE 3483807D1
Authority
DE
Germany
Prior art keywords
computer system
transmission path
digital computer
control release
repeat mechanism
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484401883T
Other languages
English (en)
Inventor
Frank C Bomba
Stephen R Jenkins
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Digital Equipment Corp
Original Assignee
Digital Equipment Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Digital Equipment Corp filed Critical Digital Equipment Corp
Application granted granted Critical
Publication of DE3483807D1 publication Critical patent/DE3483807D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4213Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
  • Computer And Data Communications (AREA)
DE8484401883T 1983-09-22 1984-09-21 Wiederholungsmechanismus zur steuerungsfreigabe eines uebertragungsweges in einem digitalen rechnersystem. Expired - Fee Related DE3483807D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US53472083A 1983-09-22 1983-09-22

Publications (1)

Publication Number Publication Date
DE3483807D1 true DE3483807D1 (de) 1991-02-07

Family

ID=24131248

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8888201091T Expired - Fee Related DE3485980T2 (de) 1983-09-22 1984-09-21 Datenverarbeitungsapparat zur verbindung mit einem gemeinsamen uebertragungsbus in einem datenverarbeitungssystem.
DE8484401883T Expired - Fee Related DE3483807D1 (de) 1983-09-22 1984-09-21 Wiederholungsmechanismus zur steuerungsfreigabe eines uebertragungsweges in einem digitalen rechnersystem.

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8888201091T Expired - Fee Related DE3485980T2 (de) 1983-09-22 1984-09-21 Datenverarbeitungsapparat zur verbindung mit einem gemeinsamen uebertragungsbus in einem datenverarbeitungssystem.

Country Status (6)

Country Link
EP (2) EP0301610B1 (de)
JP (1) JPS60144850A (de)
KR (1) KR910001792B1 (de)
AU (1) AU564271B2 (de)
CA (1) CA1217280A (de)
DE (2) DE3485980T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110532211A (zh) * 2018-05-24 2019-12-03 新唐科技股份有限公司 总线系统

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2165726B (en) * 1984-10-05 1988-07-27 Mitsubishi Electric Corp Arbitration system for data bus
US4719622A (en) * 1985-03-15 1988-01-12 Wang Laboratories, Inc. System bus means for inter-processor communication
JPS6275860A (ja) * 1985-09-30 1987-04-07 Toshiba Corp デ−タ転送制御装置
GB2193066B (en) * 1986-07-07 1990-07-04 Perkin Elmer Corp Computer bus
US4807118A (en) * 1987-01-14 1989-02-21 Hewlett-Packard Company Method for handling slot requests over a network
US4817037A (en) * 1987-02-13 1989-03-28 International Business Machines Corporation Data processing system with overlap bus cycle operations
US4858116A (en) * 1987-05-01 1989-08-15 Digital Equipment Corporation Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
US4941083A (en) * 1987-05-01 1990-07-10 Digital Equipment Corporation Method and apparatus for initiating interlock read transactions on a multiprocessor computer system
DE3888353T2 (de) * 1987-05-01 1994-11-17 Digital Equipment Corp Unterbrechungsknoten zum vorsehen von unterbrechungsanforderungen auf einem anstehenden bus.
US4949239A (en) * 1987-05-01 1990-08-14 Digital Equipment Corporation System for implementing multiple lock indicators on synchronous pended bus in multiprocessor computer system
US4937733A (en) * 1987-05-01 1990-06-26 Digital Equipment Corporation Method and apparatus for assuring adequate access to system resources by processors in a multiprocessor computer system
US4953072A (en) * 1987-05-01 1990-08-28 Digital Equipment Corporation Node for servicing interrupt request messages on a pended bus
US5341510A (en) * 1987-05-01 1994-08-23 Digital Equipment Corporation Commander node method and apparatus for assuring adequate access to system resources in a multiprocessor
EP0346401B1 (de) * 1987-05-01 1993-09-29 Digital Equipment Corporation Steuerungsknotenverfahren und -anordnung zur sicherung eines angepassten zugriffs zu betriebsmitteln in einem multiprozessordatenverarbeitungssystem
US5060139A (en) * 1989-04-07 1991-10-22 Tektronix, Inc. Futurebus interrupt subsystem apparatus
JP2502932B2 (ja) * 1993-01-29 1996-05-29 インターナショナル・ビジネス・マシーンズ・コーポレイション デ―タ転送方法及びデ―タ処理システム
JP3261665B2 (ja) * 1993-01-29 2002-03-04 インターナショナル・ビジネス・マシーンズ・コーポレーション データ転送方法及びデータ処理システム
JP3348331B2 (ja) * 1995-04-21 2002-11-20 ソニー株式会社 電子機器及びその動作モード制御方法
EP0887741B1 (de) 1997-06-27 2005-04-13 Bull S.A. Schnittstellenbrücke zwischen einem Systembus und einem lokalen Bus zur Steuerung wenigstens eines Slave-Gerätes, wie ein ROM-Speicher
KR100519285B1 (ko) * 1998-03-20 2005-11-25 엘지전자 주식회사 버스 리셋 지연장치 및 그 방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4030075A (en) * 1975-06-30 1977-06-14 Honeywell Information Systems, Inc. Data processing system having distributed priority network
JPS594733B2 (ja) * 1975-11-10 1984-01-31 日本電気株式会社 キヨウツウバスセイギヨカイロ
CA1143854A (en) * 1979-03-12 1983-03-29 Paul Binder Apparatus for interconnecting the units of a data processing system
US4390944A (en) * 1980-05-13 1983-06-28 Bti Computer Systems System for controlling access to a common bus in a computer system
US4380798A (en) * 1980-09-15 1983-04-19 Motorola, Inc. Semaphore register including ownership bits

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110532211A (zh) * 2018-05-24 2019-12-03 新唐科技股份有限公司 总线系统
CN110532211B (zh) * 2018-05-24 2023-01-13 新唐科技股份有限公司 总线系统

Also Published As

Publication number Publication date
AU564271B2 (en) 1987-08-06
KR910001792B1 (ko) 1991-03-23
EP0301610A2 (de) 1989-02-01
AU3334984A (en) 1985-03-28
CA1217280A (en) 1987-01-27
EP0301610A3 (en) 1989-08-02
EP0138676A2 (de) 1985-04-24
EP0301610B1 (de) 1992-11-11
JPH0246974B2 (de) 1990-10-18
DE3485980T2 (de) 1993-06-09
KR850002619A (ko) 1985-05-15
JPS60144850A (ja) 1985-07-31
EP0138676A3 (en) 1986-11-05
DE3485980D1 (de) 1992-12-17
EP0138676B1 (de) 1991-01-02

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: GRUENECKER, KINKELDEY, STOCKMAIR & SCHWANHAEUSSER, 80538 MUENCHEN

8339 Ceased/non-payment of the annual fee