DE3481658D1 - Integrierter schaltkreis mit einem eingebauten datenverarbeitungsgeraet und einem festwertspeicher mit darin eingespeisten anwendersprogrammen. - Google Patents

Integrierter schaltkreis mit einem eingebauten datenverarbeitungsgeraet und einem festwertspeicher mit darin eingespeisten anwendersprogrammen.

Info

Publication number
DE3481658D1
DE3481658D1 DE8484303502T DE3481658T DE3481658D1 DE 3481658 D1 DE3481658 D1 DE 3481658D1 DE 8484303502 T DE8484303502 T DE 8484303502T DE 3481658 T DE3481658 T DE 3481658T DE 3481658 D1 DE3481658 D1 DE 3481658D1
Authority
DE
Germany
Prior art keywords
built
data processing
integrated circuit
processing device
fixed value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484303502T
Other languages
English (en)
Inventor
Shigeo C O Patent Divis Kamiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3481658D1 publication Critical patent/DE3481658D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
DE8484303502T 1983-05-23 1984-05-23 Integrierter schaltkreis mit einem eingebauten datenverarbeitungsgeraet und einem festwertspeicher mit darin eingespeisten anwendersprogrammen. Expired - Lifetime DE3481658D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58090290A JPS59216249A (ja) 1983-05-23 1983-05-23 集積回路装置

Publications (1)

Publication Number Publication Date
DE3481658D1 true DE3481658D1 (de) 1990-04-19

Family

ID=13994395

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484303502T Expired - Lifetime DE3481658D1 (de) 1983-05-23 1984-05-23 Integrierter schaltkreis mit einem eingebauten datenverarbeitungsgeraet und einem festwertspeicher mit darin eingespeisten anwendersprogrammen.

Country Status (4)

Country Link
US (1) US4672534A (de)
EP (1) EP0127440B1 (de)
JP (1) JPS59216249A (de)
DE (1) DE3481658D1 (de)

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US5450342A (en) * 1984-10-05 1995-09-12 Hitachi, Ltd. Memory device
US5448519A (en) * 1984-10-05 1995-09-05 Hitachi, Ltd. Memory device
US6028795A (en) 1985-09-24 2000-02-22 Hitachi, Ltd. One chip semiconductor integrated circuit device having two modes of data write operation and bits setting operation
US5923591A (en) * 1985-09-24 1999-07-13 Hitachi, Ltd. Memory circuit
JPS61169941A (ja) * 1985-01-22 1986-07-31 Sony Corp 記憶装置
KR950014553B1 (ko) * 1985-05-20 1995-12-05 1995년12월05일 논리기능을 가진 기억회로
US4918586A (en) * 1985-07-31 1990-04-17 Ricoh Company, Ltd. Extended memory device with instruction read from first control store containing information for accessing second control store
JPH0756636B2 (ja) * 1985-12-11 1995-06-14 株式会社日立製作所 データ処理方法
JPH0792782B2 (ja) * 1985-09-30 1995-10-09 富士通株式会社 処理実行システム
JPH01320544A (ja) * 1988-06-22 1989-12-26 Toshiba Corp テスト容易化回路
JPH0758502B2 (ja) * 1988-06-30 1995-06-21 三菱電機株式会社 Ｉｃカード
JP2501874B2 (ja) * 1988-06-30 1996-05-29 三菱電機株式会社 Ｉｃカ―ド
FR2656940A1 (fr) * 1990-01-09 1991-07-12 Sgs Thomson Microelectronics Circuit integre a microprocesseur fonctionnant en mode rom interne et eprom externe.
JPH04195546A (ja) * 1990-11-28 1992-07-15 Nec Corp マイクロコンピュータのテストモード設定回路
US5867727A (en) * 1992-06-24 1999-02-02 Fujitsu Limited System for judging read out transfer word is correct by comparing flag of transfer word and lower bit portion of read destination selection address
CN1130332A (zh) * 1994-11-11 1996-09-04 大宇电子株式会社 自我诊断电视接收机的方法
JP2918019B2 (ja) * 1995-08-30 1999-07-12 日本電気株式会社 シングルチップマイクロプロセッサのテスト回路
US5802071A (en) * 1995-11-17 1998-09-01 Fang; I Liang Micro-controller with a built-in test circuit and method for testing the same
GB2307568B (en) * 1995-11-22 1998-06-03 Holtek Microelectronics Inc A test method for testing a micro-controller
US5894424A (en) * 1997-05-15 1999-04-13 Matsushita Electrical Industrial Co., Ltd. Semiconductor testing apparatus
US5970005A (en) * 1998-04-27 1999-10-19 Ict, Inc. Testing structure and method for high density PLDs which have flexible logic built-in blocks
US6910133B1 (en) * 2000-04-11 2005-06-21 Cisco Technology, Inc. Reflected interrupt for hardware-based encryption
US20020194540A1 (en) * 2001-05-04 2002-12-19 Hugo Cheung Method and system for non-intrusive dynamic memory mapping
US7587642B2 (en) * 2003-07-08 2009-09-08 Texas Instruments Incorporated System and method for performing concurrent mixed signal testing on a single processor
DE10331872A1 (de) * 2003-07-14 2005-02-10 Robert Bosch Gmbh Verfahren zur Überwachung eines technischen Systems
US20060020413A1 (en) * 2004-07-26 2006-01-26 Septon Daven W Methods and apparatus for providing automated test equipment with a means to jump and return in a test program
US8510596B1 (en) * 2006-02-09 2013-08-13 Virsec Systems, Inc. System and methods for run time detection and correction of memory corruption
US8904189B1 (en) 2010-07-15 2014-12-02 The Research Foundation For The State University Of New York System and method for validating program execution at run-time using control flow signatures
CA2923231C (en) 2013-09-12 2020-06-02 Virsec Systems, Inc. Automated runtime detection of malware
AU2015279920B2 (en) 2014-06-24 2018-03-29 Virsec Systems, Inc. Automated root cause analysis of single or N-TIERED applications
WO2015200511A1 (en) 2014-06-24 2015-12-30 Virsec Systems, Inc. System and methods for automated detection of input and output validation and resource management vulnerability
JP6949951B2 (ja) 2016-06-16 2021-10-13 ヴァーセック システムズ，インコーポレイテッド コンピュータアプリケーション内のメモリ破損を修復するためのシステム及び方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49112548A (de) * 1973-02-23 1974-10-26
JPS5844642B2 (ja) * 1974-07-25 1983-10-04 日本曹達株式会社 シクロヘキサン誘導体除草剤
DE2442989A1 (de) * 1974-09-07 1976-03-25 Philips Patentverwaltung Anordnung zur pruefung eines rechners
US4127768A (en) * 1977-01-03 1978-11-28 Honeywell Information Systems Inc. Data processing system self-test enabling technique
US4355389A (en) * 1977-03-15 1982-10-19 Tokyo Shibaura Electric Co., Ltd. Microprogrammed information processing system having self-checking function
JPS5585265A (en) * 1978-12-23 1980-06-27 Toshiba Corp Function test evaluation device for integrated circuit
IT1117593B (it) * 1979-01-24 1986-02-17 Cselt Centro Studi Lab Telecom Sistema di aotodiagnosi per una apparecchiatura di controllo gestita da elaboratore
JPS55128641A (en) * 1979-03-23 1980-10-04 Nissan Motor Co Ltd Controlling system for vehicle
EP0018736A1 (de) * 1979-05-01 1980-11-12 Motorola, Inc. Selbstprüfender Microcomputer und Prüfverfahren
JPS5633741A (en) * 1979-08-27 1981-04-04 Hitachi Ltd Automatic self-diagnosing system for data processor
US4459666A (en) * 1979-09-24 1984-07-10 Control Data Corporation Plural microcode control memory
JPS56155452A (en) * 1980-05-02 1981-12-01 Matsushita Electronics Corp Testing method for large scale integrated circuit device
US4538269A (en) * 1983-04-18 1985-08-27 International Telephone And Telegraph Corporation Programmable coding and decoding arrangement

Also Published As

Publication number Publication date
JPS59216249A (ja) 1984-12-06
EP0127440A2 (de) 1984-12-05
US4672534A (en) 1987-06-09
EP0127440B1 (de) 1990-03-14
EP0127440A3 (en) 1987-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee