DE3277715D1 - Electrically programmable memory array - Google Patents

Electrically programmable memory array

Info

Publication number
DE3277715D1
DE3277715D1 DE8282107132T DE3277715T DE3277715D1 DE 3277715 D1 DE3277715 D1 DE 3277715D1 DE 8282107132 T DE8282107132 T DE 8282107132T DE 3277715 T DE3277715 T DE 3277715T DE 3277715 D1 DE3277715 D1 DE 3277715D1
Authority
DE
Germany
Prior art keywords
input
gate
memory array
programmable memory
electrically programmable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282107132T
Other languages
German (de)
English (en)
Inventor
Burkhard Dipl Ing Giebel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
ITT Inc
Original Assignee
Deutsche ITT Industries GmbH
ITT Industries Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH, ITT Industries Inc filed Critical Deutsche ITT Industries GmbH
Application granted granted Critical
Publication of DE3277715D1 publication Critical patent/DE3277715D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits

Landscapes

  • Read Only Memory (AREA)
  • Logic Circuits (AREA)
DE8282107132T 1982-08-06 1982-08-06 Electrically programmable memory array Expired DE3277715D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP82107132A EP0100772B1 (de) 1982-08-06 1982-08-06 Elektrisch programmierbare Speichermatrix

Publications (1)

Publication Number Publication Date
DE3277715D1 true DE3277715D1 (en) 1987-12-23

Family

ID=8189163

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282107132T Expired DE3277715D1 (en) 1982-08-06 1982-08-06 Electrically programmable memory array

Country Status (5)

Country Link
US (1) US4597064A (enExample)
EP (1) EP0100772B1 (enExample)
JP (1) JPS59132495A (enExample)
AU (1) AU559066B2 (enExample)
DE (1) DE3277715D1 (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0743948B2 (ja) * 1985-08-16 1995-05-15 三菱電機株式会社 半導体記憶装置
US5448517A (en) * 1987-06-29 1995-09-05 Kabushiki Kaisha Toshiba Electrically programmable nonvolatile semiconductor memory device with NAND cell structure
US5253200A (en) * 1987-12-15 1993-10-12 Sony Corporation Electrically erasable and programmable read only memory using stacked-gate cell
JPH01158777A (ja) * 1987-12-15 1989-06-21 Sony Corp フローティングゲート型不揮発性メモリ
JPH0233799A (ja) * 1988-07-22 1990-02-02 Toshiba Corp 半導体記録装置のデコード方法およびその装置
JPH02270196A (ja) * 1989-04-11 1990-11-05 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US5065364A (en) * 1989-09-15 1991-11-12 Intel Corporation Apparatus for providing block erasing in a flash EPROM
US5097444A (en) * 1989-11-29 1992-03-17 Rohm Corporation Tunnel EEPROM with overerase protection
KR100192430B1 (ko) * 1995-08-21 1999-06-15 구본준 비휘발성 메모리 및 이 비휘발성 메모리를 프로그램하는 방법
JP2882370B2 (ja) * 1996-06-28 1999-04-12 日本電気株式会社 半導体記憶装置
JP2006048749A (ja) * 2004-07-30 2006-02-16 Seiko Epson Corp 不揮発性記憶装置及び不揮発性記憶装置のデータ書き込み方法
JP2007220218A (ja) * 2006-02-17 2007-08-30 Fujitsu Ltd 半導体記憶装置およびその制御方法
JP2015053094A (ja) * 2013-09-06 2015-03-19 株式会社東芝 半導体記憶装置

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4266283A (en) * 1979-02-16 1981-05-05 Intel Corporation Electrically alterable read-mostly memory
DE3103807A1 (de) * 1980-02-04 1981-12-24 Texas Instruments Inc., 75222 Dallas, Tex. "1-aus-n-decoder fuer einen halbleiterspeicher o.dgl., verfahren zum auswaehlen von einer aus n leitungen in einer matrix und adressdecodierschaltungsanordnung"
US4317110A (en) * 1980-06-30 1982-02-23 Rca Corporation Multi-mode circuit
IE54406B1 (en) * 1980-12-23 1989-09-27 Fujitsu Ltd Electrically programmable non-colatile semiconductor memory device
US4434478A (en) * 1981-11-27 1984-02-28 International Business Machines Corporation Programming floating gate devices
DE3267974D1 (en) * 1982-03-17 1986-01-30 Itt Ind Gmbh Deutsche Electrically erasable memory matrix (eeprom)

Also Published As

Publication number Publication date
EP0100772A1 (de) 1984-02-22
EP0100772B1 (de) 1987-11-19
AU559066B2 (en) 1987-02-19
JPH0325879B2 (enExample) 1991-04-09
US4597064A (en) 1986-06-24
AU1746783A (en) 1984-02-09
JPS59132495A (ja) 1984-07-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee