DE3113334C2 - - Google Patents

Info

Publication number
DE3113334C2
DE3113334C2 DE19813113334 DE3113334A DE3113334C2 DE 3113334 C2 DE3113334 C2 DE 3113334C2 DE 19813113334 DE19813113334 DE 19813113334 DE 3113334 A DE3113334 A DE 3113334A DE 3113334 C2 DE3113334 C2 DE 3113334C2
Authority
DE
Germany
Prior art keywords
etched
resin
layer
printed circuit
circuit boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE19813113334
Other languages
German (de)
English (en)
Other versions
DE3113334A1 (de
Inventor
Hans-Hermann Dipl.-Ing. 8900 Augsburg De Merkenschlager
Georg 8901 Rettenbergen De Mueller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE19813113334 priority Critical patent/DE3113334A1/de
Publication of DE3113334A1 publication Critical patent/DE3113334A1/de
Application granted granted Critical
Publication of DE3113334C2 publication Critical patent/DE3113334C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0154—Polyimide
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
    • H05K2203/0759—Forming a polymer layer by liquid coating, e.g. a non-metallic protective coating or an organic bonding layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE19813113334 1981-04-02 1981-04-02 Verfahren zur herstellung von mehrlagenleiterplatten Granted DE3113334A1 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE19813113334 DE3113334A1 (de) 1981-04-02 1981-04-02 Verfahren zur herstellung von mehrlagenleiterplatten

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813113334 DE3113334A1 (de) 1981-04-02 1981-04-02 Verfahren zur herstellung von mehrlagenleiterplatten

Publications (2)

Publication Number Publication Date
DE3113334A1 DE3113334A1 (de) 1982-10-28
DE3113334C2 true DE3113334C2 (OSRAM) 1989-03-23

Family

ID=6129163

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813113334 Granted DE3113334A1 (de) 1981-04-02 1981-04-02 Verfahren zur herstellung von mehrlagenleiterplatten

Country Status (1)

Country Link
DE (1) DE3113334A1 (OSRAM)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2362037A (en) * 2000-05-03 2001-11-07 Bancha Ongkosit Printed circuit board manufacture
DE10126002A1 (de) * 2000-06-24 2002-01-31 Rotra Leiterplatten Produktion Mehrlagen-Leiterplatten-Verbundkörper und Verfahren zu dessen Herstellung
JP3903701B2 (ja) * 2000-08-17 2007-04-11 松下電器産業株式会社 多層回路基板とその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3681171A (en) * 1968-08-23 1972-08-01 Hitachi Ltd Apparatus for producing a multilayer printed circuit plate assembly

Also Published As

Publication number Publication date
DE3113334A1 (de) 1982-10-28

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee