DE3103615A1 - Verfahren zur erzeugung von extremen feinstrukturen - Google Patents

Verfahren zur erzeugung von extremen feinstrukturen

Info

Publication number
DE3103615A1
DE3103615A1 DE19813103615 DE3103615A DE3103615A1 DE 3103615 A1 DE3103615 A1 DE 3103615A1 DE 19813103615 DE19813103615 DE 19813103615 DE 3103615 A DE3103615 A DE 3103615A DE 3103615 A1 DE3103615 A1 DE 3103615A1
Authority
DE
Germany
Prior art keywords
layer
titanium
deposited
layers
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19813103615
Other languages
German (de)
English (en)
Inventor
Friedrich Dr. rer. nat. 8012 Riemerling Kraus
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Priority to DE19813103615 priority Critical patent/DE3103615A1/de
Priority to EP81108138A priority patent/EP0057254B1/de
Priority to DE8181108138T priority patent/DE3175038D1/de
Priority to JP57015454A priority patent/JPS57147240A/ja
Publication of DE3103615A1 publication Critical patent/DE3103615A1/de
Priority to US06/514,857 priority patent/US4529686A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/951—Lift-off

Landscapes

  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
DE19813103615 1981-02-03 1981-02-03 Verfahren zur erzeugung von extremen feinstrukturen Withdrawn DE3103615A1 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE19813103615 DE3103615A1 (de) 1981-02-03 1981-02-03 Verfahren zur erzeugung von extremen feinstrukturen
EP81108138A EP0057254B1 (de) 1981-02-03 1981-10-09 Verfahren zur Erzeugung von extremen Feinstrukturen
DE8181108138T DE3175038D1 (en) 1981-02-03 1981-10-09 Method of producing extremely fine features
JP57015454A JPS57147240A (en) 1981-02-03 1982-02-02 Method of producing extrefine structure
US06/514,857 US4529686A (en) 1981-02-03 1983-07-18 Method for the manufacture of extremely fine structures

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813103615 DE3103615A1 (de) 1981-02-03 1981-02-03 Verfahren zur erzeugung von extremen feinstrukturen

Publications (1)

Publication Number Publication Date
DE3103615A1 true DE3103615A1 (de) 1982-09-09

Family

ID=6123940

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19813103615 Withdrawn DE3103615A1 (de) 1981-02-03 1981-02-03 Verfahren zur erzeugung von extremen feinstrukturen
DE8181108138T Expired DE3175038D1 (en) 1981-02-03 1981-10-09 Method of producing extremely fine features

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8181108138T Expired DE3175038D1 (en) 1981-02-03 1981-10-09 Method of producing extremely fine features

Country Status (4)

Country Link
US (1) US4529686A (enExample)
EP (1) EP0057254B1 (enExample)
JP (1) JPS57147240A (enExample)
DE (2) DE3103615A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3727825A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschichtsolarmodul aus kristallinem silizium
DE3727826A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschicht-solarmodul aus kristallinem silizium

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0082588A3 (en) * 1981-11-02 1983-10-26 Konica Corporation Photolithographic elements for the production of metal images
JPS59124172A (ja) * 1982-12-30 1984-07-18 インタ−ナシヨナル　ビジネス　マシ−ンズ　コ−ポレ−シヨン Ｆｅｔ製造方法
US4532532A (en) * 1982-12-30 1985-07-30 International Business Machines Corporation Submicron conductor manufacturing
US4542577A (en) * 1982-12-30 1985-09-24 International Business Machines Corporation Submicron conductor manufacturing
IT1185964B (it) * 1985-10-01 1987-11-18 Sgs Microelettronica Spa Procedimento e relativa apparecchiatura per realizzare contatti metallo-semiconduttore di tipo ohmico
US4687730A (en) * 1985-10-30 1987-08-18 Rca Corporation Lift-off technique for producing metal pattern using single photoresist processing and oblique angle metal deposition
US4679311A (en) * 1985-12-12 1987-07-14 Allied Corporation Method of fabricating self-aligned field-effect transistor having t-shaped gate electrode, sub-micron gate length and variable drain to gate spacing
US4737828A (en) * 1986-03-17 1988-04-12 General Electric Company Method for gate electrode fabrication and symmetrical and non-symmetrical self-aligned inlay transistors made therefrom
US4707218A (en) * 1986-10-28 1987-11-17 International Business Machines Corporation Lithographic image size reduction
JPH03245527A (ja) * 1990-02-23 1991-11-01 Rohm Co Ltd 微細加工方法
US5411824A (en) * 1993-01-21 1995-05-02 Sematech, Inc. Phase shifting mask structure with absorbing/attenuating sidewalls for improved imaging
WO1994017449A1 (en) * 1993-01-21 1994-08-04 Sematech, Inc. Phase shifting mask structure with multilayer optical coating for improved transmission
US5418095A (en) * 1993-01-21 1995-05-23 Sematech, Inc. Method of fabricating phase shifters with absorbing/attenuating sidewalls using an additive process
US6331680B1 (en) 1996-08-07 2001-12-18 Visteon Global Technologies, Inc. Multilayer electrical interconnection device and method of making same
US6194268B1 (en) * 1998-10-30 2001-02-27 International Business Machines Corporation Printing sublithographic images using a shadow mandrel and off-axis exposure
EP1357602A1 (de) * 2002-03-19 2003-10-29 Scheuten Glasgroep Selbstjustierende Serienverschaltung von Dünnschichten und Verfahren zur Herstellung
KR100738056B1 (ko) * 2005-05-18 2007-07-12 삼성에스디아이 주식회사 Ｆｅｄ의 제조방법
US20070134943A2 (en) * 2006-04-02 2007-06-14 Dunnrowicz Clarence J Subtractive - Additive Edge Defined Lithography
WO2009029302A2 (en) * 2007-05-08 2009-03-05 University Of Washington Shadow edge lithography for nanoscale patterning and manufacturing
KR101437924B1 (ko) * 2010-01-22 2014-09-11 한국생명공학연구원 경사 증착을 이용한 리소그래피 방법
GB201718897D0 (en) * 2017-11-15 2017-12-27 Microsoft Technology Licensing Llc Superconductor-semiconductor fabrication

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3387360A (en) * 1965-04-01 1968-06-11 Sony Corp Method of making a semiconductor device
US3567508A (en) * 1968-10-31 1971-03-02 Gen Electric Low temperature-high vacuum contact formation process
US4218532A (en) * 1977-10-13 1980-08-19 Bell Telephone Laboratories, Incorporated Photolithographic technique for depositing thin films

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3727825A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschichtsolarmodul aus kristallinem silizium
DE3727826A1 (de) * 1987-08-20 1989-03-02 Siemens Ag Serienverschaltetes duennschicht-solarmodul aus kristallinem silizium

Also Published As

Publication number Publication date
EP0057254A3 (en) 1982-09-01
DE3175038D1 (en) 1986-09-04
US4529686A (en) 1985-07-16
EP0057254B1 (de) 1986-07-30
JPS57147240A (en) 1982-09-11
EP0057254A2 (de) 1982-08-11
JPH0136250B2 (enExample) 1989-07-31

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Legal Events

Date Code Title Description
8140 Disposal/non-payment of the annual fee for main application