DE2828607C3 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung

Info

Publication number
DE2828607C3
DE2828607C3 DE2828607A DE2828607A DE2828607C3 DE 2828607 C3 DE2828607 C3 DE 2828607C3 DE 2828607 A DE2828607 A DE 2828607A DE 2828607 A DE2828607 A DE 2828607A DE 2828607 C3 DE2828607 C3 DE 2828607C3
Authority
DE
Germany
Prior art keywords
resistance
crystal
crystal axis
layer
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2828607A
Other languages
German (de)
English (en)
Other versions
DE2828607A1 (de
DE2828607B2 (de
Inventor
Satoshi Tokyo Takahashi
Masao Yokohama Wakatsuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7662177A external-priority patent/JPS5412576A/ja
Priority claimed from JP8359277A external-priority patent/JPS5419379A/ja
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of DE2828607A1 publication Critical patent/DE2828607A1/de
Publication of DE2828607B2 publication Critical patent/DE2828607B2/de
Application granted granted Critical
Publication of DE2828607C3 publication Critical patent/DE2828607C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40Crystalline structures
    • H10D62/405Orientations of crystalline planes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00Resistors, capacitors or inductors
    • H10D1/40Resistors
    • H10D1/43Resistors having PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE2828607A 1977-06-29 1978-06-29 Halbleitervorrichtung Expired DE2828607C3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7662177A JPS5412576A (en) 1977-06-29 1977-06-29 Semiconductor device
JP8359277A JPS5419379A (en) 1977-07-14 1977-07-14 Semiconductor device

Publications (3)

Publication Number Publication Date
DE2828607A1 DE2828607A1 (de) 1979-01-04
DE2828607B2 DE2828607B2 (de) 1981-02-05
DE2828607C3 true DE2828607C3 (de) 1982-08-12

Family

ID=26417758

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2828607A Expired DE2828607C3 (de) 1977-06-29 1978-06-29 Halbleitervorrichtung

Country Status (3)

Country Link
DE (1) DE2828607C3 (enrdf_load_stackoverflow)
FR (1) FR2396418A1 (enrdf_load_stackoverflow)
GB (1) GB2000638B (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56122134A (en) * 1980-02-29 1981-09-25 Toshiba Corp Resin-sealed type semiconductor device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1465112A1 (de) * 1963-10-04 1969-01-23 Anritsu Electric Company Ltd Im Vakuum niedergeschlagene Halbleiterschichten fuer Elasto-Widerstandselemente
NL154867B (nl) * 1964-02-13 1977-10-17 Hitachi Ltd Werkwijze voor de vervaardiging van een halfgeleiderinrichting, alsmede volgens deze werkwijze vervaardigde veldeffect-transistor en planaire transistor.
US3612960A (en) * 1968-10-15 1971-10-12 Tokyo Shibaura Electric Co Semiconductor device
GB1249317A (en) * 1968-11-19 1971-10-13 Mullard Ltd Semiconductor devices
NL7306948A (enrdf_load_stackoverflow) * 1973-05-18 1974-11-20
US3965453A (en) * 1974-12-27 1976-06-22 Bell Telephone Laboratories, Incorporated Piezoresistor effects in semiconductor resistors
DE2828605C3 (de) * 1977-06-29 1982-01-14 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Halbleitervorrichtung

Also Published As

Publication number Publication date
FR2396418B1 (enrdf_load_stackoverflow) 1985-02-15
DE2828607A1 (de) 1979-01-04
DE2828607B2 (de) 1981-02-05
GB2000638B (en) 1982-01-20
FR2396418A1 (fr) 1979-01-26
GB2000638A (en) 1979-01-10

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
8263 Opposition against grant of a patent
C3 Grant after two publication steps (3rd publication)
8328 Change in the person/name/address of the agent

Free format text: HENKEL, G., DR.PHIL. FEILER, L., DR.RER.NAT. HAENZEL, W., DIPL.-ING., PAT.-ANW., 8000 MUENCHEN

8320 Willingness to grant licences declared (paragraph 23)
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

8339 Ceased/non-payment of the annual fee