DE2702830C2 - - Google Patents
Info
- Publication number
- DE2702830C2 DE2702830C2 DE2702830A DE2702830A DE2702830C2 DE 2702830 C2 DE2702830 C2 DE 2702830C2 DE 2702830 A DE2702830 A DE 2702830A DE 2702830 A DE2702830 A DE 2702830A DE 2702830 C2 DE2702830 C2 DE 2702830C2
- Authority
- DE
- Germany
- Prior art keywords
- bit
- lines
- word
- pulse
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/24—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using capacitors
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/35—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices with charge storage in a depletion layer, e.g. charge coupled devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/672,196 US4040016A (en) | 1976-03-31 | 1976-03-31 | Twin nodes capacitance memory |
Publications (2)
Publication Number | Publication Date |
---|---|
DE2702830A1 DE2702830A1 (de) | 1977-10-13 |
DE2702830C2 true DE2702830C2 (US06277897-20010821-C00009.png) | 1987-12-03 |
Family
ID=24697545
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19772702830 Granted DE2702830A1 (de) | 1976-03-31 | 1977-01-25 | Kapazitive speicherzelle |
Country Status (5)
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4230954A (en) * | 1978-12-29 | 1980-10-28 | International Business Machines Corporation | Permanent or semipermanent charge transfer storage systems |
US4574365A (en) * | 1983-04-18 | 1986-03-04 | International Business Machines Corporation | Shared access lines memory cells |
US4652898A (en) * | 1984-07-19 | 1987-03-24 | International Business Machines Corporation | High speed merged charge memory |
US4648073A (en) * | 1984-12-31 | 1987-03-03 | International Business Machines Corporation | Sequential shared access lines memory cells |
US5610573A (en) * | 1995-09-13 | 1997-03-11 | Lsi Logic Corporation | Method and apparatus for detecting assertion of multiple signals |
KR100393201B1 (ko) * | 2001-04-16 | 2003-07-31 | 페어차일드코리아반도체 주식회사 | 낮은 온 저항과 높은 브레이크다운 전압을 갖는 고전압수평형 디모스 트랜지스터 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4836190U (US06277897-20010821-C00009.png) * | 1971-09-02 | 1973-04-28 | ||
DE2431079C3 (de) * | 1974-06-28 | 1979-12-13 | Ibm Deutschland Gmbh, 7000 Stuttgart | Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen |
US3987474A (en) * | 1975-01-23 | 1976-10-19 | Massachusetts Institute Of Technology | Non-volatile charge storage elements and an information storage apparatus employing such elements |
US3986180A (en) * | 1975-09-22 | 1976-10-12 | International Business Machines Corporation | Depletion mode field effect transistor memory system |
-
1976
- 1976-03-31 US US05/672,196 patent/US4040016A/en not_active Expired - Lifetime
-
1977
- 1977-01-25 DE DE19772702830 patent/DE2702830A1/de active Granted
- 1977-02-18 FR FR7705176A patent/FR2346809A1/fr active Granted
- 1977-02-25 JP JP1940677A patent/JPS52119876A/ja active Granted
- 1977-03-22 BR BR7701809A patent/BR7701809A/pt unknown
Also Published As
Publication number | Publication date |
---|---|
BR7701809A (pt) | 1978-01-24 |
JPS52119876A (en) | 1977-10-07 |
US4040016A (en) | 1977-08-02 |
JPS579157B2 (US06277897-20010821-C00009.png) | 1982-02-19 |
FR2346809A1 (fr) | 1977-10-28 |
FR2346809B1 (US06277897-20010821-C00009.png) | 1980-01-11 |
DE2702830A1 (de) | 1977-10-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8110 | Request for examination paragraph 44 | ||
D2 | Grant after examination | ||
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |