DE2637346C2 - Steuerschaltung für Daten - Google Patents

Steuerschaltung für Daten

Info

Publication number
DE2637346C2
DE2637346C2 DE2637346A DE2637346A DE2637346C2 DE 2637346 C2 DE2637346 C2 DE 2637346C2 DE 2637346 A DE2637346 A DE 2637346A DE 2637346 A DE2637346 A DE 2637346A DE 2637346 C2 DE2637346 C2 DE 2637346C2
Authority
DE
Germany
Prior art keywords
control
data
memory
processor
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2637346A
Other languages
German (de)
English (en)
Other versions
DE2637346A1 (de
Inventor
Kazuyuki Koganei Tokio/Toyko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Publication of DE2637346A1 publication Critical patent/DE2637346A1/de
Application granted granted Critical
Publication of DE2637346C2 publication Critical patent/DE2637346C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
    • G06F15/7835—Architectures of general purpose stored program computers comprising a single central processing unit without memory on more than one IC chip
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Executing Machine-Instructions (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)
DE2637346A 1975-08-21 1976-08-19 Steuerschaltung für Daten Expired DE2637346C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP50101497A JPS5225538A (en) 1975-08-21 1975-08-21 Input control system of control use data

Publications (2)

Publication Number Publication Date
DE2637346A1 DE2637346A1 (de) 1977-03-03
DE2637346C2 true DE2637346C2 (de) 1987-03-26

Family

ID=14302270

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2637346A Expired DE2637346C2 (de) 1975-08-21 1976-08-19 Steuerschaltung für Daten

Country Status (3)

Country Link
US (1) US4087640A (cg-RX-API-DMAC10.html)
JP (1) JPS5225538A (cg-RX-API-DMAC10.html)
DE (1) DE2637346C2 (cg-RX-API-DMAC10.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3035197A1 (de) * 1980-09-18 1982-04-29 Robert Bosch Gmbh, 7000 Stuttgart Anschlussvorrichtung einer speichereinrichtung an einen datenbus

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249254A (en) * 1979-02-02 1981-02-03 U.S. Philips Corporation Arrangement for restituting selection signals

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3691538A (en) * 1971-06-01 1972-09-12 Ncr Co Serial read-out memory system
US3821477A (en) * 1971-08-07 1974-06-28 Tokai Rika Co Ltd System for multiplex transmission of electrical signals utilizing synchronized ring counters
US3821480A (en) * 1973-05-29 1974-06-28 Datatrol Inc Multiplexer system
US3952298A (en) * 1975-04-17 1976-04-20 Spectradyne, Inc. Clock gated digital data encoding circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3035197A1 (de) * 1980-09-18 1982-04-29 Robert Bosch Gmbh, 7000 Stuttgart Anschlussvorrichtung einer speichereinrichtung an einen datenbus

Also Published As

Publication number Publication date
JPS5248448B2 (cg-RX-API-DMAC10.html) 1977-12-09
US4087640A (en) 1978-05-02
DE2637346A1 (de) 1977-03-03
JPS5225538A (en) 1977-02-25

Similar Documents

Publication Publication Date Title
DE3543911C2 (cg-RX-API-DMAC10.html)
DE3687787T2 (de) Speicherzugriff-steuerungsschaltung.
DE2813128C2 (de) Steuereinrichtung für Mikroprogrammspeicher
DE69325119T2 (de) Taktsynchronisierter Halbleiterspeicheranordnung und Zugriffsverfahren
DE2819571A1 (de) Datenverarbeitungsanlage mit mehreren prozessoren
DE2855673C2 (cg-RX-API-DMAC10.html)
DE2224389A1 (de) Speichersystem
DE2151472A1 (de) Mikroprogrammspeicher fuer Elektronenrechner
DE1288144B (cg-RX-API-DMAC10.html)
DE2854782A1 (de) Datenverarbeitungssystem
EP0013697A1 (de) Auffrischung benötigendes seitenorganisiertes Speichersystem
DE1499178A1 (de) Steuerbarer Datenspeicher mit Verzoegerungsleitung
EP0217122B1 (de) Schaltungsanordung mit einer matrixförmigen Speicheranordnung zur variabel einstellbaren Verzögerung digitaler Signale
DE3930313A1 (de) Vektorprozessor
DE3788783T2 (de) Multiplexer für Taktsignale.
DE3650508T2 (de) Speicheranordnung zur Simulation eines Schieberegisters
DE3314139C2 (cg-RX-API-DMAC10.html)
DE3024153A1 (de) Speicher-subsystem
DE1119567B (de) Geraet zur Speicherung von Informationen
EP0213584B1 (de) Schaltungsanordnung mit einer matrixförmigen Speicheranordnung zur variabel einstellbaren Verzögerung digitaler Signale
DE69123725T2 (de) Elektrischer Schaltkreis zum Generieren von Impulsreihen
DE3883822T2 (de) Halbleiterspeichervorrichtung.
DE2637346C2 (de) Steuerschaltung für Daten
DE3018509A1 (de) Schieberegister mit latch-schaltung
EP0195940A1 (de) Schaltungsanordnung mit einer matrixförmigen Speicheranordnung zur variabel einstellbaren Verzögerung digitaler Signale

Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8125 Change of the main classification

Ipc: G06F 13/00

D2 Grant after examination
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP

8364 No opposition during term of opposition