DE2556273C2 - Gruppenweise zu einer logischen Schaltung zusammengefaßte logische Schaltkreise - Google Patents

Gruppenweise zu einer logischen Schaltung zusammengefaßte logische Schaltkreise

Info

Publication number
DE2556273C2
DE2556273C2 DE2556273A DE2556273A DE2556273C2 DE 2556273 C2 DE2556273 C2 DE 2556273C2 DE 2556273 A DE2556273 A DE 2556273A DE 2556273 A DE2556273 A DE 2556273A DE 2556273 C2 DE2556273 C2 DE 2556273C2
Authority
DE
Germany
Prior art keywords
lines
output
signals
tables
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2556273A
Other languages
German (de)
English (en)
Other versions
DE2556273A1 (de
Inventor
Arnold Poughkeepsie N.Y. Weinberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2556273A1 publication Critical patent/DE2556273A1/de
Application granted granted Critical
Publication of DE2556273C2 publication Critical patent/DE2556273C2/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
    • H03K19/17708Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
  • Electronic Switches (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
DE2556273A 1974-12-30 1975-12-13 Gruppenweise zu einer logischen Schaltung zusammengefaßte logische Schaltkreise Expired DE2556273C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/537,217 US3975623A (en) 1974-12-30 1974-12-30 Logic array with multiple readout tables

Publications (2)

Publication Number Publication Date
DE2556273A1 DE2556273A1 (de) 1976-07-08
DE2556273C2 true DE2556273C2 (de) 1982-04-15

Family

ID=24141723

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2556273A Expired DE2556273C2 (de) 1974-12-30 1975-12-13 Gruppenweise zu einer logischen Schaltung zusammengefaßte logische Schaltkreise

Country Status (7)

Country Link
US (1) US3975623A (cg-RX-API-DMAC7.html)
JP (1) JPS5523507B2 (cg-RX-API-DMAC7.html)
CA (1) CA1060959A (cg-RX-API-DMAC7.html)
DE (1) DE2556273C2 (cg-RX-API-DMAC7.html)
FR (1) FR2296968A1 (cg-RX-API-DMAC7.html)
GB (1) GB1473030A (cg-RX-API-DMAC7.html)
IT (1) IT1050025B (cg-RX-API-DMAC7.html)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4029970A (en) * 1975-11-06 1977-06-14 Ibm Corporation Changeable decoder structure for a folded logic array
US4084152A (en) * 1976-06-30 1978-04-11 International Business Machines Corporation Time shared programmable logic array
US4195352A (en) * 1977-07-08 1980-03-25 Xerox Corporation Split programmable logic array
US4139907A (en) * 1977-08-31 1979-02-13 Bell Telephone Laboratories, Incorporated Integrated read only memory
US4123669A (en) * 1977-09-08 1978-10-31 International Business Machines Corporation Logical OR circuit for programmed logic arrays
JPS54148360A (en) * 1978-05-12 1979-11-20 Nec Corp Logic array circuit
JPS562739A (en) * 1979-06-20 1981-01-13 Nec Corp Pla logical operation circuit
US4357678A (en) * 1979-12-26 1982-11-02 International Business Machines Corporation Programmable sequential logic array mechanism
US4506341A (en) * 1982-06-10 1985-03-19 International Business Machines Corporation Interlaced programmable logic array having shared elements
US4531200A (en) * 1982-12-02 1985-07-23 International Business Machines Corporation Indexed-indirect addressing using prefix codes
US4644191A (en) * 1985-09-19 1987-02-17 Harris Corporation Programmable array logic with shared product terms
ATE57803T1 (de) * 1986-05-30 1990-11-15 Siemens Ag Programmierbare schaltungsanordnung.
US5189320A (en) * 1991-09-23 1993-02-23 Atmel Corporation Programmable logic device with multiple shared logic arrays
US7030408B1 (en) 1999-03-29 2006-04-18 Hewlett-Packard Development Company, L.P. Molecular wire transistor (MWT)
US6128214A (en) * 1999-03-29 2000-10-03 Hewlett-Packard Molecular wire crossbar memory
US6459095B1 (en) 1999-03-29 2002-10-01 Hewlett-Packard Company Chemically synthesized and assembled electronics devices
US6256767B1 (en) * 1999-03-29 2001-07-03 Hewlett-Packard Company Demultiplexer for a molecular wire crossbar network (MWCN DEMUX)
US6518156B1 (en) 1999-03-29 2003-02-11 Hewlett-Packard Company Configurable nanoscale crossbar electronic circuits made by electrochemical reaction
US6314019B1 (en) 1999-03-29 2001-11-06 Hewlett-Packard Company Molecular-wire crossbar interconnect (MWCI) for signal routing and communications
US6458621B1 (en) * 2001-08-01 2002-10-01 Hewlett-Packard Company Batch fabricated molecular electronic devices with cost-effective lithographic electrodes
US7092310B2 (en) * 2003-12-19 2006-08-15 International Business Machines Corporation Memory array with multiple read ports
US8661394B1 (en) 2008-09-24 2014-02-25 Iowa State University Research Foundation, Inc. Depth-optimal mapping of logic chains in reconfigurable fabrics
US8438522B1 (en) 2008-09-24 2013-05-07 Iowa State University Research Foundation, Inc. Logic element architecture for generic logic chains in programmable devices
JP6975430B2 (ja) * 2019-02-08 2021-12-01 マコー株式会社 ワーク表面処理装置及びワーク表面処理方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3699534A (en) * 1970-12-15 1972-10-17 Us Navy Cellular arithmetic array
US3761902A (en) * 1971-12-30 1973-09-25 Ibm Functional memory using multi-state associative cells
US3816725A (en) * 1972-04-28 1974-06-11 Gen Electric Multiple level associative logic circuits
US3818452A (en) * 1972-04-28 1974-06-18 Gen Electric Electrically programmable logic circuits
US3849638A (en) * 1973-07-18 1974-11-19 Gen Electric Segmented associative logic circuits

Also Published As

Publication number Publication date
GB1473030A (en) 1977-05-11
FR2296968A1 (fr) 1976-07-30
DE2556273A1 (de) 1976-07-08
IT1050025B (it) 1981-03-10
JPS5523507B2 (cg-RX-API-DMAC7.html) 1980-06-23
FR2296968B1 (cg-RX-API-DMAC7.html) 1978-05-12
US3975623A (en) 1976-08-17
JPS5178951A (cg-RX-API-DMAC7.html) 1976-07-09
CA1060959A (en) 1979-08-21

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Legal Events

Date Code Title Description
OD Request for examination
8125 Change of the main classification
D2 Grant after examination
8339 Ceased/non-payment of the annual fee