DE2530424C2 - Logisches Gatter - Google Patents

Logisches Gatter

Info

Publication number
DE2530424C2
DE2530424C2 DE2530424A DE2530424A DE2530424C2 DE 2530424 C2 DE2530424 C2 DE 2530424C2 DE 2530424 A DE2530424 A DE 2530424A DE 2530424 A DE2530424 A DE 2530424A DE 2530424 C2 DE2530424 C2 DE 2530424C2
Authority
DE
Germany
Prior art keywords
transistor
collector
resistor
connection
supply potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2530424A
Other languages
German (de)
English (en)
Other versions
DE2530424A1 (de
Inventor
Ronald Dipl.-Ing. 8021 Taufkirchen Rathbone
Peter Dipl.-Ing. 8000 München Rydval
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE2530424A priority Critical patent/DE2530424C2/de
Priority to AT618275A priority patent/AT336929B/de
Priority to GB19307/76A priority patent/GB1553588A/en
Priority to CA253,901A priority patent/CA1059644A/en
Priority to US05/700,734 priority patent/US4048517A/en
Priority to FR7619765A priority patent/FR2317817A2/fr
Priority to IT24956/76A priority patent/IT1066956B/it
Publication of DE2530424A1 publication Critical patent/DE2530424A1/de
Application granted granted Critical
Publication of DE2530424C2 publication Critical patent/DE2530424C2/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0744—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common without components of the field effect type
    • H01L27/075—Bipolar transistors in combination with diodes, or capacitors, or resistors, e.g. lateral bipolar transistor, and vertical bipolar transistor and resistor
    • H01L27/0755—Vertical bipolar transistor in combination with diodes, or capacitors, or resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
    • H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
    • H01L27/0233—Integrated injection logic structures [I2L]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/013—Modifications for accelerating switching in bipolar transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/12—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using diode rectifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
DE2530424A 1975-07-08 1975-07-08 Logisches Gatter Expired DE2530424C2 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE2530424A DE2530424C2 (de) 1975-07-08 1975-07-08 Logisches Gatter
AT618275A AT336929B (de) 1975-07-08 1975-08-08 Integrierte schaltung
GB19307/76A GB1553588A (en) 1975-07-08 1976-05-11 Electrical circuit logic elements
CA253,901A CA1059644A (en) 1975-07-08 1976-06-02 Electrical circuit logic elements
US05/700,734 US4048517A (en) 1975-07-08 1976-06-28 Logic element
FR7619765A FR2317817A2 (fr) 1975-07-08 1976-06-29 Element logique
IT24956/76A IT1066956B (it) 1975-07-08 1976-07-02 Elemento logico specie porta bipolare per un circuito lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2530424A DE2530424C2 (de) 1975-07-08 1975-07-08 Logisches Gatter

Publications (2)

Publication Number Publication Date
DE2530424A1 DE2530424A1 (de) 1977-01-27
DE2530424C2 true DE2530424C2 (de) 1981-10-29

Family

ID=5950958

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2530424A Expired DE2530424C2 (de) 1975-07-08 1975-07-08 Logisches Gatter

Country Status (7)

Country Link
US (1) US4048517A (US07922777-20110412-C00004.png)
AT (1) AT336929B (US07922777-20110412-C00004.png)
CA (1) CA1059644A (US07922777-20110412-C00004.png)
DE (1) DE2530424C2 (US07922777-20110412-C00004.png)
FR (1) FR2317817A2 (US07922777-20110412-C00004.png)
GB (1) GB1553588A (US07922777-20110412-C00004.png)
IT (1) IT1066956B (US07922777-20110412-C00004.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4656498A (en) * 1980-10-27 1987-04-07 Texas Instruments Incorporated Oxide-isolated integrated Schottky logic

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3610953A (en) * 1970-03-03 1971-10-05 Gordon Eng Co Switching system
US3742250A (en) * 1971-04-07 1973-06-26 Signetics Corp Active region logic circuit
JPS555295B2 (US07922777-20110412-C00004.png) * 1971-09-10 1980-02-05

Also Published As

Publication number Publication date
DE2530424A1 (de) 1977-01-27
CA1059644A (en) 1979-07-31
IT1066956B (it) 1985-03-12
FR2317817A2 (fr) 1977-02-04
US4048517A (en) 1977-09-13
FR2317817B2 (US07922777-20110412-C00004.png) 1982-11-19
GB1553588A (en) 1979-09-26
ATA618275A (de) 1976-09-15
AT336929B (de) 1977-06-10

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Legal Events

Date Code Title Description
D2 Grant after examination
8339 Ceased/non-payment of the annual fee