DE2437048A1 - Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil - Google Patents

Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil

Info

Publication number
DE2437048A1
DE2437048A1 DE2437048A DE2437048A DE2437048A1 DE 2437048 A1 DE2437048 A1 DE 2437048A1 DE 2437048 A DE2437048 A DE 2437048A DE 2437048 A DE2437048 A DE 2437048A DE 2437048 A1 DE2437048 A1 DE 2437048A1
Authority
DE
Germany
Prior art keywords
etching
tablets
semiconductor
contact electrode
edge profile
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE2437048A
Other languages
German (de)
English (en)
Inventor
Horst Schaefer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semikron GmbH and Co KG
Original Assignee
Semikron GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron GmbH and Co KG filed Critical Semikron GmbH and Co KG
Priority to DE2437048A priority Critical patent/DE2437048A1/de
Priority to CH616275A priority patent/CH593558A5/xx
Publication of DE2437048A1 publication Critical patent/DE2437048A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102—Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/104—Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)
DE2437048A 1974-08-01 1974-08-01 Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil Withdrawn DE2437048A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE2437048A DE2437048A1 (de) 1974-08-01 1974-08-01 Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil
CH616275A CH593558A5 (enrdf_load_html_response) 1974-08-01 1975-05-13

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2437048A DE2437048A1 (de) 1974-08-01 1974-08-01 Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil

Publications (1)

Publication Number Publication Date
DE2437048A1 true DE2437048A1 (de) 1976-02-12

Family

ID=5922140

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2437048A Withdrawn DE2437048A1 (de) 1974-08-01 1974-08-01 Verfahren zur herstellung von halbleitertabletten mit definiertem randprofil

Country Status (2)

Country Link
CH (1) CH593558A5 (enrdf_load_html_response)
DE (1) DE2437048A1 (enrdf_load_html_response)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1178526A3 (en) * 2000-07-31 2004-03-03 Mitsubishi Chemical Corporation Mixed acid solution in etching process, process for producing the same, etching process using the same and process for producing semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1178526A3 (en) * 2000-07-31 2004-03-03 Mitsubishi Chemical Corporation Mixed acid solution in etching process, process for producing the same, etching process using the same and process for producing semiconductor device

Also Published As

Publication number Publication date
CH593558A5 (enrdf_load_html_response) 1977-12-15

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Legal Events

Date Code Title Description
8139 Disposal/non-payment of the annual fee