DE2402720A1 - Isolierverfahren fuer elektrische schaltungs-leitungszuege - Google Patents

Isolierverfahren fuer elektrische schaltungs-leitungszuege

Info

Publication number
DE2402720A1
DE2402720A1 DE2402720A DE2402720A DE2402720A1 DE 2402720 A1 DE2402720 A1 DE 2402720A1 DE 2402720 A DE2402720 A DE 2402720A DE 2402720 A DE2402720 A DE 2402720A DE 2402720 A1 DE2402720 A1 DE 2402720A1
Authority
DE
Germany
Prior art keywords
film
anodically
insulating film
run
isolation method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2402720A
Other languages
German (de)
English (en)
Inventor
Osamu Asai
Moriaki Fuyama
Masanobu Hanazono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of DE2402720A1 publication Critical patent/DE2402720A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/127Structure or manufacture of heads, e.g. inductive
    • G11B5/31Structure or manufacture of heads, e.g. inductive using thin films
    • G11B5/3163Fabrication methods or processes specially adapted for a particular head structure, e.g. using base layers for electroplating, using functional layers for masking, using energy or particle beams for shaping the structure or modifying the properties of the basic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/147Semiconductor insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894Materials of the insulating layers or coatings
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4685Manufacturing of cross-over conductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Electrodes Of Semiconductors (AREA)
DE2402720A 1973-01-22 1974-01-21 Isolierverfahren fuer elektrische schaltungs-leitungszuege Pending DE2402720A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP860573A JPS49100970A (enrdf_load_stackoverflow) 1973-01-22 1973-01-22

Publications (1)

Publication Number Publication Date
DE2402720A1 true DE2402720A1 (de) 1974-08-22

Family

ID=11697580

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2402720A Pending DE2402720A1 (de) 1973-01-22 1974-01-21 Isolierverfahren fuer elektrische schaltungs-leitungszuege

Country Status (2)

Country Link
JP (1) JPS49100970A (enrdf_load_stackoverflow)
DE (1) DE2402720A1 (enrdf_load_stackoverflow)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3407784A1 (de) * 1984-03-02 1985-09-12 Brown, Boveri & Cie Ag, 6800 Mannheim Duennschichthybridschaltung
DE10343279A1 (de) * 2003-09-18 2005-04-21 Eupec Gmbh & Co Kg Elektrisches Leitungssystem

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51126079A (en) * 1975-04-25 1976-11-02 Hitachi Ltd Growth method of many layer wiring

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS529857B2 (enrdf_load_stackoverflow) * 1972-07-28 1977-03-18

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3407784A1 (de) * 1984-03-02 1985-09-12 Brown, Boveri & Cie Ag, 6800 Mannheim Duennschichthybridschaltung
DE10343279A1 (de) * 2003-09-18 2005-04-21 Eupec Gmbh & Co Kg Elektrisches Leitungssystem
DE10343279B4 (de) * 2003-09-18 2007-02-15 Thomas Passe Elektrisches Leitungssystem

Also Published As

Publication number Publication date
JPS49100970A (enrdf_load_stackoverflow) 1974-09-24

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