DE2348660C3 - Verfahren zum Herstellen integrierter Hybrid-Mikroschal tungen - Google Patents

Verfahren zum Herstellen integrierter Hybrid-Mikroschal tungen

Info

Publication number
DE2348660C3
DE2348660C3 DE2348660A DE2348660A DE2348660C3 DE 2348660 C3 DE2348660 C3 DE 2348660C3 DE 2348660 A DE2348660 A DE 2348660A DE 2348660 A DE2348660 A DE 2348660A DE 2348660 C3 DE2348660 C3 DE 2348660C3
Authority
DE
Germany
Prior art keywords
nickel
layer
remove
etching
subjected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2348660A
Other languages
German (de)
English (en)
Other versions
DE2348660B2 (de
DE2348660A1 (de
Inventor
Bernard Lee Simi Burton
Gordon James Agoura Estep
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bendix Corp
Original Assignee
Bendix Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bendix Corp filed Critical Bendix Corp
Publication of DE2348660A1 publication Critical patent/DE2348660A1/de
Publication of DE2348660B2 publication Critical patent/DE2348660B2/de
Application granted granted Critical
Publication of DE2348660C3 publication Critical patent/DE2348660C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/167Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed resistors
    • H10P95/00
    • H10W20/40
    • H10W70/05
    • H10W70/66
    • H10W70/692
    • H10W99/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0302Properties and characteristics in general
    • H05K2201/0317Thin film conductor layer; Thin film passive component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0347Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0361Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703Plating
    • H05K2203/072Electroless plating, e.g. finish plating or initial plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061Etching masks
    • H05K3/064Photoresists
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H10W72/5524

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
DE2348660A 1972-10-02 1973-09-27 Verfahren zum Herstellen integrierter Hybrid-Mikroschal tungen Expired DE2348660C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US29398872A 1972-10-02 1972-10-02

Publications (3)

Publication Number Publication Date
DE2348660A1 DE2348660A1 (de) 1974-04-11
DE2348660B2 DE2348660B2 (de) 1978-08-10
DE2348660C3 true DE2348660C3 (de) 1979-04-19

Family

ID=23131412

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2348660A Expired DE2348660C3 (de) 1972-10-02 1973-09-27 Verfahren zum Herstellen integrierter Hybrid-Mikroschal tungen

Country Status (3)

Country Link
JP (1) JPS4972657A (enExample)
DE (1) DE2348660C3 (enExample)
GB (1) GB1387089A (enExample)

Also Published As

Publication number Publication date
GB1387089A (en) 1975-03-12
DE2348660B2 (de) 1978-08-10
JPS4972657A (enExample) 1974-07-13
DE2348660A1 (de) 1974-04-11

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee