DE2230749C3 - Verfahren zum Herstellen von Halbleiterbauelementen - Google Patents
Verfahren zum Herstellen von HalbleiterbauelementenInfo
- Publication number
- DE2230749C3 DE2230749C3 DE2230749A DE2230749A DE2230749C3 DE 2230749 C3 DE2230749 C3 DE 2230749C3 DE 2230749 A DE2230749 A DE 2230749A DE 2230749 A DE2230749 A DE 2230749A DE 2230749 C3 DE2230749 C3 DE 2230749C3
- Authority
- DE
- Germany
- Prior art keywords
- diffusion
- gold
- carried out
- period
- hydrofluoric acid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/101—Integrated devices comprising main components and built-in components, e.g. IGBT having built-in freewheel diode
- H10D84/131—Thyristors having built-in components
- H10D84/135—Thyristors having built-in components the built-in components being diodes
- H10D84/136—Thyristors having built-in components the built-in components being diodes in anti-parallel configurations, e.g. reverse current thyristor [RCT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
- H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
- H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/151—Simultaneous diffusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S252/00—Compositions
- Y10S252/95—Doping agent source material
- Y10S252/951—Doping agent source material for vapor transport
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thyristors (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2230749A DE2230749C3 (de) | 1972-06-23 | 1972-06-23 | Verfahren zum Herstellen von Halbleiterbauelementen |
| BE132534A BE801229A (fr) | 1972-06-23 | 1973-06-21 | Procede pour l'execution de composants a semi-conducteurs |
| JP48069911A JPS4964371A (en:Method) | 1972-06-23 | 1973-06-22 | |
| GB2989273A GB1440234A (en) | 1972-06-23 | 1973-06-22 | Method of producing a semiconductor component |
| US373274A US3867203A (en) | 1972-06-23 | 1973-06-25 | Method for producing semiconductor devices |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE2230749A DE2230749C3 (de) | 1972-06-23 | 1972-06-23 | Verfahren zum Herstellen von Halbleiterbauelementen |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| DE2230749A1 DE2230749A1 (de) | 1974-01-10 |
| DE2230749B2 DE2230749B2 (de) | 1978-03-30 |
| DE2230749C3 true DE2230749C3 (de) | 1978-11-30 |
Family
ID=5848579
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE2230749A Expired DE2230749C3 (de) | 1972-06-23 | 1972-06-23 | Verfahren zum Herstellen von Halbleiterbauelementen |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3867203A (en:Method) |
| JP (1) | JPS4964371A (en:Method) |
| BE (1) | BE801229A (en:Method) |
| DE (1) | DE2230749C3 (en:Method) |
| GB (1) | GB1440234A (en:Method) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2610942C2 (de) * | 1976-03-16 | 1983-04-28 | Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt | Verfahren zum Herstellen eines Halbleiterbauelements mit in einem Halbleiterkörper monolithisch integrierten Halbleiterelementeinheiten |
| FR2514558A1 (fr) * | 1981-10-13 | 1983-04-15 | Silicium Semiconducteur Ssc | Procede de fabrication de thyristor asymetrique a diode de conduction inverse par diffusion au phosphure de gallium |
| US5223442A (en) * | 1988-04-08 | 1993-06-29 | Kabushiki Kaisha Toshiba | Method of making a semiconductor device of a high withstand voltage |
| DE3815615A1 (de) * | 1988-05-07 | 1989-11-16 | Bosch Gmbh Robert | Verfahren zur herstellung einer hochsperrenden leistungsdiode |
| US5504016A (en) * | 1991-03-29 | 1996-04-02 | National Semiconductor Corporation | Method of manufacturing semiconductor device structures utilizing predictive dopant-dopant interactions |
| JP2006126234A (ja) * | 2004-10-26 | 2006-05-18 | Sony Corp | 撮像装置、光量調整機構、光量制御羽根及び光量制御羽根の製造方法 |
| US7541250B2 (en) * | 2006-03-07 | 2009-06-02 | Atmel Corporation | Method for forming a self-aligned twin well region with simplified processing |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3109760A (en) * | 1960-02-15 | 1963-11-05 | Cievite Corp | P-nu junction and method |
| US3484313A (en) * | 1965-03-25 | 1969-12-16 | Hitachi Ltd | Method of manufacturing semiconductor devices |
-
1972
- 1972-06-23 DE DE2230749A patent/DE2230749C3/de not_active Expired
-
1973
- 1973-06-21 BE BE132534A patent/BE801229A/xx unknown
- 1973-06-22 GB GB2989273A patent/GB1440234A/en not_active Expired
- 1973-06-22 JP JP48069911A patent/JPS4964371A/ja active Pending
- 1973-06-25 US US373274A patent/US3867203A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS4964371A (en:Method) | 1974-06-21 |
| GB1440234A (en) | 1976-06-23 |
| DE2230749A1 (de) | 1974-01-10 |
| US3867203A (en) | 1975-02-18 |
| BE801229A (fr) | 1973-10-15 |
| DE2230749B2 (de) | 1978-03-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C3 | Grant after two publication steps (3rd publication) | ||
| 8320 | Willingness to grant licences declared (paragraph 23) | ||
| 8339 | Ceased/non-payment of the annual fee |