DE2224738A1 - Schaltungsanordnung zur Vermeidung unkontrollierter Ausgangssignale in Iso herschicht FET Treiberschaltungen - Google Patents

Schaltungsanordnung zur Vermeidung unkontrollierter Ausgangssignale in Iso herschicht FET Treiberschaltungen

Info

Publication number
DE2224738A1
DE2224738A1 DE19722224738 DE2224738A DE2224738A1 DE 2224738 A1 DE2224738 A1 DE 2224738A1 DE 19722224738 DE19722224738 DE 19722224738 DE 2224738 A DE2224738 A DE 2224738A DE 2224738 A1 DE2224738 A1 DE 2224738A1
Authority
DE
Germany
Prior art keywords
unit
fet
inverter
capacitance
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19722224738
Other languages
German (de)
English (en)
Inventor
Ying Luh Mahopac NY Yao (V St A )
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2224738A1 publication Critical patent/DE2224738A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/003—Changing the DC level

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
  • Shift Register Type Memory (AREA)
DE19722224738 1971-06-15 1972-05-20 Schaltungsanordnung zur Vermeidung unkontrollierter Ausgangssignale in Iso herschicht FET Treiberschaltungen Pending DE2224738A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US15332371A 1971-06-15 1971-06-15

Publications (1)

Publication Number Publication Date
DE2224738A1 true DE2224738A1 (de) 1972-12-21

Family

ID=22546716

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19722224738 Pending DE2224738A1 (de) 1971-06-15 1972-05-20 Schaltungsanordnung zur Vermeidung unkontrollierter Ausgangssignale in Iso herschicht FET Treiberschaltungen

Country Status (5)

Country Link
US (1) US3708688A (enExample)
JP (1) JPS5213898B1 (enExample)
DE (1) DE2224738A1 (enExample)
FR (1) FR2142457A5 (enExample)
GB (1) GB1364799A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2734008A1 (de) * 1976-08-25 1978-03-09 Rockwell International Corp Schaltkreis zur verminderung positiver rauscheffekte
DE2830436A1 (de) * 1977-07-11 1979-01-18 Rockwell International Corp Mehrfachphasen-taktueberwachungsschaltung

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3794856A (en) * 1972-11-24 1974-02-26 Gen Instrument Corp Logical bootstrapping in shift registers
US3857045A (en) * 1973-04-17 1974-12-24 Nasa Four-phase logic systems
JPS50154130A (enExample) * 1974-06-06 1975-12-11
US4048518A (en) * 1976-02-10 1977-09-13 Intel Corporation MOS buffer circuit
JPS52115637A (en) * 1976-03-24 1977-09-28 Sharp Corp Mos transistor circuit
US4996454A (en) * 1989-06-30 1991-02-26 Honeywell Inc. Hot clock complex logic
US7230447B2 (en) * 2003-10-31 2007-06-12 Texas Instruments Incorporated Fault tolerant selection of die on wafer
KR102093909B1 (ko) * 2011-05-19 2020-03-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 회로 및 회로의 구동 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3567968A (en) * 1967-02-27 1971-03-02 North American Rockwell Gating system for reducing the effects of positive feedback noise in multiphase gating devices
US3564299A (en) * 1969-01-16 1971-02-16 Gen Instrument Corp Clock generator
US3588537A (en) * 1969-05-05 1971-06-28 Shell Oil Co Digital differential circuit means

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2734008A1 (de) * 1976-08-25 1978-03-09 Rockwell International Corp Schaltkreis zur verminderung positiver rauscheffekte
DE2830436A1 (de) * 1977-07-11 1979-01-18 Rockwell International Corp Mehrfachphasen-taktueberwachungsschaltung

Also Published As

Publication number Publication date
US3708688A (en) 1973-01-02
GB1364799A (en) 1974-08-29
JPS4814259A (enExample) 1973-01-22
FR2142457A5 (enExample) 1973-01-26
JPS5213898B1 (enExample) 1977-04-18

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Legal Events

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