DE2142721A1 - Integrierte bistabile Speicherzelle - Google Patents

Integrierte bistabile Speicherzelle

Info

Publication number
DE2142721A1
DE2142721A1 DE19712142721 DE2142721A DE2142721A1 DE 2142721 A1 DE2142721 A1 DE 2142721A1 DE 19712142721 DE19712142721 DE 19712142721 DE 2142721 A DE2142721 A DE 2142721A DE 2142721 A1 DE2142721 A1 DE 2142721A1
Authority
DE
Germany
Prior art keywords
memory cell
charge transfer
transistor
charge
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19712142721
Other languages
German (de)
English (en)
Inventor
Gerald John Waterford Burke Hubert Kemper Schenectady N Y Michon (V St A)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of DE2142721A1 publication Critical patent/DE2142721A1/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/402—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh
    • G11C11/4023—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration individual to each memory cell, i.e. internal refresh using field effect transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356—Bistable circuits
    • H03K3/356017—Bistable circuits using additional transistors in the input circuit
    • H03K3/356052—Bistable circuits using additional transistors in the input circuit using pass gates
    • H03K3/35606—Bistable circuits using additional transistors in the input circuit using pass gates with synchronous operation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83125—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having shared source or drain regions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
DE19712142721 1970-08-28 1971-08-26 Integrierte bistabile Speicherzelle Pending DE2142721A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US6774770A 1970-08-28 1970-08-28

Publications (1)

Publication Number Publication Date
DE2142721A1 true DE2142721A1 (de) 1972-03-02

Family

ID=22078128

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19712142721 Pending DE2142721A1 (de) 1970-08-28 1971-08-26 Integrierte bistabile Speicherzelle

Country Status (4)

Country Link
US (1) US3662356A (enExample)
DE (1) DE2142721A1 (enExample)
FR (1) FR2103592A1 (enExample)
NL (1) NL7111877A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2430947A1 (de) * 1974-06-27 1976-01-15 Siemens Ag Halbleiter-speicher- beziehungsweise logikeinheit

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL7117525A (enExample) * 1971-02-11 1972-08-15
US3795898A (en) * 1972-11-03 1974-03-05 Advanced Memory Syst Random access read/write semiconductor memory
US3983414A (en) * 1975-02-10 1976-09-28 Fairchild Camera And Instrument Corporation Charge cancelling structure and method for integrated circuits
US4003034A (en) * 1975-05-23 1977-01-11 Fairchild Camera And Instrument Corporation Sense amplifier circuit for a random access memory
US4091460A (en) * 1976-10-05 1978-05-23 The United States Of America As Represented By The Secretary Of The Air Force Quasi static, virtually nonvolatile random access memory cell
JPS5819143B2 (ja) * 1977-09-30 1983-04-16 株式会社東芝 半導体メモリ装置
US4449224A (en) * 1980-12-29 1984-05-15 Eliyahou Harari Dynamic merged load logic (MLL) and merged load memory (MLM)
US4825409A (en) * 1985-05-13 1989-04-25 Wang Laboratories, Inc. NMOS data storage cell for clocked shift register applications
DE69914142T2 (de) * 1998-03-18 2004-10-28 Koninklijke Philips Electronics N.V. Halbleiteranordnung mit einer speicherzelle
US6038163A (en) 1998-11-09 2000-03-14 Lucent Technologies Inc. Capacitor loaded memory cell
US20080273366A1 (en) * 2007-05-03 2008-11-06 International Business Machines Corporation Design structure for improved sram device performance through double gate topology
US7408800B1 (en) * 2007-05-03 2008-08-05 International Business Machines Corporation Apparatus and method for improved SRAM device performance through double gate topology
US9218511B2 (en) * 2011-06-07 2015-12-22 Verisiti, Inc. Semiconductor device having features to prevent reverse engineering

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3588846A (en) * 1968-12-05 1971-06-28 Ibm Storage cell with variable power level

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2430947A1 (de) * 1974-06-27 1976-01-15 Siemens Ag Halbleiter-speicher- beziehungsweise logikeinheit

Also Published As

Publication number Publication date
FR2103592A1 (enExample) 1972-04-14
NL7111877A (enExample) 1972-03-01
US3662356A (en) 1972-05-09

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