DE2141695B2 - Verfahren zum herstellen eines monolithischen halbleiterbauelementes - Google Patents
Verfahren zum herstellen eines monolithischen halbleiterbauelementesInfo
- Publication number
- DE2141695B2 DE2141695B2 DE19712141695 DE2141695A DE2141695B2 DE 2141695 B2 DE2141695 B2 DE 2141695B2 DE 19712141695 DE19712141695 DE 19712141695 DE 2141695 A DE2141695 A DE 2141695A DE 2141695 B2 DE2141695 B2 DE 2141695B2
- Authority
- DE
- Germany
- Prior art keywords
- layer
- zones
- doped
- conductivity type
- semiconductor body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H10P32/141—
-
- H10P32/171—
-
- H10P95/00—
-
- H10W74/40—
-
- H10W74/43—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/036—Diffusion, nonselective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/151—Simultaneous diffusion
Landscapes
- Element Separation (AREA)
- Bipolar Transistors (AREA)
- Formation Of Insulating Films (AREA)
- Semiconductor Integrated Circuits (AREA)
- Thyristors (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US6701670A | 1970-08-26 | 1970-08-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE2141695A1 DE2141695A1 (de) | 1972-04-20 |
| DE2141695B2 true DE2141695B2 (de) | 1976-12-02 |
Family
ID=22073185
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE19712141695 Pending DE2141695B2 (de) | 1970-08-26 | 1971-08-20 | Verfahren zum herstellen eines monolithischen halbleiterbauelementes |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US3730787A (enExample) |
| JP (1) | JPS5026915B1 (enExample) |
| BE (1) | BE771636A (enExample) |
| DE (1) | DE2141695B2 (enExample) |
| FR (1) | FR2103520B1 (enExample) |
| GB (1) | GB1366892A (enExample) |
| NL (1) | NL7111703A (enExample) |
| SE (1) | SE361982B (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3892609A (en) * | 1971-10-07 | 1975-07-01 | Hughes Aircraft Co | Production of mis integrated devices with high inversion voltage to threshold voltage ratios |
| US3888706A (en) * | 1973-08-06 | 1975-06-10 | Rca Corp | Method of making a compact guard-banded mos integrated circuit device using framelike diffusion-masking structure |
| JPS5128762A (enExample) * | 1974-09-04 | 1976-03-11 | Tokyo Shibaura Electric Co | |
| GB1503223A (en) * | 1975-07-26 | 1978-03-08 | Int Computers Ltd | Formation of buried layers in a substrate |
| US4035823A (en) * | 1975-10-06 | 1977-07-12 | Honeywell Inc. | Stress sensor apparatus |
| US4047220A (en) * | 1975-12-24 | 1977-09-06 | General Electric Company | Bipolar transistor structure having low saturation resistance |
| US4092662A (en) * | 1976-09-29 | 1978-05-30 | Honeywell Inc. | Sensistor apparatus |
| JPS543479A (en) * | 1977-06-09 | 1979-01-11 | Toshiba Corp | Semiconductor device and its manufacture |
| US4209350A (en) * | 1978-11-03 | 1980-06-24 | International Business Machines Corporation | Method for forming diffusions having narrow dimensions utilizing reactive ion etching |
| FR2956242A1 (fr) * | 2010-02-05 | 2011-08-12 | Commissariat Energie Atomique | Procede de realisation de premier et second volumes dopes dans un substrat |
| TWI501292B (zh) | 2012-09-26 | 2015-09-21 | 財團法人工業技術研究院 | 形成圖案化摻雜區的方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3566517A (en) * | 1967-10-13 | 1971-03-02 | Gen Electric | Self-registered ig-fet devices and method of making same |
| US3541676A (en) * | 1967-12-18 | 1970-11-24 | Gen Electric | Method of forming field-effect transistors utilizing doped insulators as activator source |
-
1970
- 1970-08-26 US US00067016A patent/US3730787A/en not_active Expired - Lifetime
-
1971
- 1971-08-19 SE SE10558/71A patent/SE361982B/xx unknown
- 1971-08-20 DE DE19712141695 patent/DE2141695B2/de active Pending
- 1971-08-23 BE BE771636A patent/BE771636A/xx unknown
- 1971-08-25 JP JP46064504A patent/JPS5026915B1/ja active Pending
- 1971-08-25 GB GB3978671A patent/GB1366892A/en not_active Expired
- 1971-08-25 NL NL7111703A patent/NL7111703A/xx unknown
- 1971-08-25 FR FR7130807A patent/FR2103520B1/fr not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| DE2141695A1 (de) | 1972-04-20 |
| SE361982B (enExample) | 1973-11-19 |
| GB1366892A (en) | 1974-09-18 |
| US3730787A (en) | 1973-05-01 |
| BE771636A (fr) | 1971-12-31 |
| FR2103520A1 (enExample) | 1972-04-14 |
| JPS5026915B1 (enExample) | 1975-09-04 |
| FR2103520B1 (enExample) | 1974-10-18 |
| NL7111703A (enExample) | 1972-02-29 |
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