DE1639241A1 - Halbleiteranordnung und Verfahren zum Herstellen derselben - Google Patents

Halbleiteranordnung und Verfahren zum Herstellen derselben

Info

Publication number
DE1639241A1
DE1639241A1 DE19681639241 DE1639241A DE1639241A1 DE 1639241 A1 DE1639241 A1 DE 1639241A1 DE 19681639241 DE19681639241 DE 19681639241 DE 1639241 A DE1639241 A DE 1639241A DE 1639241 A1 DE1639241 A1 DE 1639241A1
Authority
DE
Germany
Prior art keywords
layer
opening
oxide layer
areas
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19681639241
Other languages
German (de)
English (en)
Inventor
Muller Warren Harry
Wanlass Frank Marion
Aldo Mecchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Arris Technology Inc
Original Assignee
Arris Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Arris Technology Inc filed Critical Arris Technology Inc
Publication of DE1639241A1 publication Critical patent/DE1639241A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
DE19681639241 1967-02-08 1968-01-16 Halbleiteranordnung und Verfahren zum Herstellen derselben Pending DE1639241A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US61471567A 1967-02-08 1967-02-08

Publications (1)

Publication Number Publication Date
DE1639241A1 true DE1639241A1 (de) 1970-01-22

Family

ID=24462425

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19681639241 Pending DE1639241A1 (de) 1967-02-08 1968-01-16 Halbleiteranordnung und Verfahren zum Herstellen derselben

Country Status (8)

Country Link
US (1) US3503124A (enExample)
JP (1) JPS4811671B1 (enExample)
CH (1) CH477094A (enExample)
DE (1) DE1639241A1 (enExample)
FR (1) FR1551444A (enExample)
GB (1) GB1207370A (enExample)
NL (1) NL141030B (enExample)
SE (1) SE350367B (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS575052B1 (enExample) * 1971-06-16 1982-01-28
JPS567305B2 (enExample) * 1973-01-19 1981-02-17
US3976524A (en) * 1974-06-17 1976-08-24 Ibm Corporation Planarization of integrated circuit surfaces through selective photoresist masking
US4003126A (en) * 1974-09-12 1977-01-18 Canadian Patents And Development Limited Method of making metal oxide semiconductor devices
US4137109A (en) * 1976-04-12 1979-01-30 Texas Instruments Incorporated Selective diffusion and etching method for isolation of integrated logic circuit
US4821094A (en) * 1985-11-08 1989-04-11 Lockheed Missiles & Space Company, Inc. Gate alignment procedure in fabricating semiconductor devices
US5140387A (en) * 1985-11-08 1992-08-18 Lockheed Missiles & Space Company, Inc. Semiconductor device in which gate region is precisely aligned with source and drain regions
DE19743342C2 (de) * 1997-09-30 2002-02-28 Infineon Technologies Ag Feldeffekttransistor hoher Packungsdichte und Verfahren zu seiner Herstellung
US8844826B2 (en) * 2006-07-10 2014-09-30 Nxp B.V. Integrated circuit transponder, method of producing an integrated circuit and method of producing a transponder

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL251064A (enExample) * 1955-11-04
US2981877A (en) * 1959-07-30 1961-04-25 Fairchild Semiconductor Semiconductor device-and-lead structure
US3247428A (en) * 1961-09-29 1966-04-19 Ibm Coated objects and methods of providing the protective coverings therefor
US3309585A (en) * 1963-11-29 1967-03-14 Westinghouse Electric Corp Junction transistor structure with interdigitated configuration having features to minimize localized heating
US3280391A (en) * 1964-01-31 1966-10-18 Fairchild Camera Instr Co High frequency transistors
US3298863A (en) * 1964-05-08 1967-01-17 Joseph H Mccusker Method for fabricating thin film transistors
US3372063A (en) * 1964-12-22 1968-03-05 Hitachi Ltd Method for manufacturing at least one electrically isolated region of a semiconductive material
US3341743A (en) * 1965-10-21 1967-09-12 Texas Instruments Inc Integrated circuitry having discrete regions of semiconductor material isolated by an insulating material

Also Published As

Publication number Publication date
SE350367B (enExample) 1972-10-23
GB1207370A (en) 1970-09-30
NL6801748A (enExample) 1968-08-09
JPS4811671B1 (enExample) 1973-04-14
CH477094A (fr) 1969-08-15
NL141030B (nl) 1974-01-15
FR1551444A (enExample) 1968-12-27
US3503124A (en) 1970-03-31

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Legal Events

Date Code Title Description
SH Request for examination between 03.10.1968 and 22.04.1971