DE1539648A1 - Isolierendes Stuetzglied fuer Halbleiterbauelemente - Google Patents

Isolierendes Stuetzglied fuer Halbleiterbauelemente

Info

Publication number
DE1539648A1
DE1539648A1 DE19661539648 DE1539648A DE1539648A1 DE 1539648 A1 DE1539648 A1 DE 1539648A1 DE 19661539648 DE19661539648 DE 19661539648 DE 1539648 A DE1539648 A DE 1539648A DE 1539648 A1 DE1539648 A1 DE 1539648A1
Authority
DE
Germany
Prior art keywords
old
support member
ltlttndtn
titv
arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19661539648
Other languages
German (de)
English (en)
Inventor
Chandler John Arthur
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Associated Electrical Industries Ltd
Original Assignee
Associated Electrical Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Associated Electrical Industries Ltd filed Critical Associated Electrical Industries Ltd
Publication of DE1539648A1 publication Critical patent/DE1539648A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Thyristors (AREA)
DE19661539648 1965-05-27 1966-05-24 Isolierendes Stuetzglied fuer Halbleiterbauelemente Pending DE1539648A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2260365A GB1084894A (en) 1965-05-27 1965-05-27 Improvements relating to the mounting of semi-conductor devices

Publications (1)

Publication Number Publication Date
DE1539648A1 true DE1539648A1 (de) 1969-07-24

Family

ID=10182114

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19661539648 Pending DE1539648A1 (de) 1965-05-27 1966-05-24 Isolierendes Stuetzglied fuer Halbleiterbauelemente

Country Status (3)

Country Link
DE (1) DE1539648A1 (https=)
GB (1) GB1084894A (https=)
NL (1) NL6607300A (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5600183A (en) * 1994-11-15 1997-02-04 Hughes Electronics Multi-layer film adhesive for electrically isolating and grounding an integrated circuit chip to a printed circuit substrate

Also Published As

Publication number Publication date
NL6607300A (https=) 1966-11-28
GB1084894A (en) 1967-09-27

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