DE1524873B2 - Monolithische integrierte Speicherzelle mit kleiner Ruheleistung - Google Patents

Monolithische integrierte Speicherzelle mit kleiner Ruheleistung

Info

Publication number
DE1524873B2
DE1524873B2 DE19671524873 DE1524873A DE1524873B2 DE 1524873 B2 DE1524873 B2 DE 1524873B2 DE 19671524873 DE19671524873 DE 19671524873 DE 1524873 A DE1524873 A DE 1524873A DE 1524873 B2 DE1524873 B2 DE 1524873B2
Authority
DE
Germany
Prior art keywords
collector
transistor
emitter
memory cell
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19671524873
Other languages
German (de)
English (en)
Other versions
DE1524873A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
S K Wiedmann Dipl-Ing Dr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
Original Assignee
IBM Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH filed Critical IBM Deutschland GmbH
Publication of DE1524873B2 publication Critical patent/DE1524873B2/de
Publication of DE1524873A1 publication Critical patent/DE1524873A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/35—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar semiconductor devices with more than two PN junctions, or more than three electrodes, or more than one electrode connected to the same conductivity region
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/012—Modifications of generator to improve response time or to decrease power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/288—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable using additional transistors in the input circuit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/10—SRAM devices comprising bipolar components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Static Random-Access Memory (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
DE19671524873 1967-10-05 1967-10-05 Monolithische integrierte Speicherzelle mit kleiner Ruheleistung Withdrawn DE1524873B2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEJ0034731 1967-10-05

Publications (2)

Publication Number Publication Date
DE1524873B2 true DE1524873B2 (de) 1970-12-23
DE1524873A1 DE1524873A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1970-12-23

Family

ID=7205185

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19671524873 Withdrawn DE1524873B2 (de) 1967-10-05 1967-10-05 Monolithische integrierte Speicherzelle mit kleiner Ruheleistung

Country Status (4)

Country Link
US (1) US3505573A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE1524873B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR1582993A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB1234434A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1524892B1 (de) * 1967-12-15 1970-09-03 Ibm Deutschland Halbleiterspeicherzelle mit kreuzgekoppelten Multie mittertransistoren
US3621302A (en) * 1969-01-15 1971-11-16 Ibm Monolithic-integrated semiconductor array having reduced power consumption
DE1938468C3 (de) * 1969-07-29 1974-04-25 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Dynamische Schaltungsanordnung
US3626390A (en) * 1969-11-13 1971-12-07 Ibm Minimemory cell with epitaxial layer resistors and diode isolation
US3610967A (en) * 1970-02-27 1971-10-05 Ibm Integrated memory cell circuit
US3680061A (en) * 1970-04-30 1972-07-25 Ncr Co Integrated circuit bipolar random access memory system with low stand-by power consumption
JPS5240171B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1970-06-12 1977-10-11
NL7108048A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1970-06-12 1971-12-14
US3723837A (en) * 1970-09-22 1973-03-27 Ibm Resistor bed structure for monolithic memory
US3688280A (en) * 1970-09-22 1972-08-29 Ibm Monolithic memory system with bi-level powering for reduced power consumption
US3736569A (en) * 1971-10-13 1973-05-29 Ibm System for controlling power consumption in a computer
FR2304991A1 (fr) * 1975-03-15 1976-10-15 Ibm Agencement de circuits pour memoire semi-conductrice et son procede de fonctionnement
DE2739283A1 (de) * 1977-08-31 1979-03-15 Siemens Ag Integrierbare halbleiterspeicherzelle
NL188721C (nl) * 1978-12-22 1992-09-01 Philips Nv Halfgeleidergeheugenschakeling voor een statisch geheugen.
US4297598A (en) * 1979-04-05 1981-10-27 General Instrument Corporation I2 L Sensing circuit with increased sensitivity

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL298196A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1962-09-22
US3359432A (en) * 1964-11-05 1967-12-19 Bell Telephone Labor Inc Trigger circuit employing common-base transistors as steering means as in a flip-flop circuit for example

Also Published As

Publication number Publication date
FR1582993A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1969-10-10
GB1234434A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1971-06-03
US3505573A (en) 1970-04-07
DE1524873A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1970-12-23

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Legal Events

Date Code Title Description
E77 Valid patent as to the heymanns-index 1977
8339 Ceased/non-payment of the annual fee