DE1424755A1 - Adressier-System - Google Patents

Adressier-System

Info

Publication number
DE1424755A1
DE1424755A1 DE19621424755 DE1424755A DE1424755A1 DE 1424755 A1 DE1424755 A1 DE 1424755A1 DE 19621424755 DE19621424755 DE 19621424755 DE 1424755 A DE1424755 A DE 1424755A DE 1424755 A1 DE1424755 A1 DE 1424755A1
Authority
DE
Germany
Prior art keywords
address
signal
register
control
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19621424755
Other languages
German (de)
English (en)
Inventor
Breslin Mary Anne
Schmitt William Francis
Moore Mary Lou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Unisys Corp
Original Assignee
Sperry Rand Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sperry Rand Corp filed Critical Sperry Rand Corp
Publication of DE1424755A1 publication Critical patent/DE1424755A1/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/35—Indirect addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)
  • Storage Device Security (AREA)
DE19621424755 1961-08-17 1962-07-31 Adressier-System Pending DE1424755A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US132044A US3201761A (en) 1961-08-17 1961-08-17 Indirect addressing system

Publications (1)

Publication Number Publication Date
DE1424755A1 true DE1424755A1 (de) 1969-09-25

Family

ID=22452185

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19621424755 Pending DE1424755A1 (de) 1961-08-17 1962-07-31 Adressier-System

Country Status (6)

Country Link
US (1) US3201761A (en:Method)
BE (1) BE621075A (en:Method)
CH (1) CH407598A (en:Method)
DE (1) DE1424755A1 (en:Method)
GB (1) GB1003924A (en:Method)
NL (1) NL282242A (en:Method)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3284640A (en) * 1963-02-28 1966-11-08 Ampex Memory addressing register comprising bistable circuit with current steering means having disabling means
US3428951A (en) * 1963-02-28 1969-02-18 Ampex Memory addressing apparatus
GB1115551A (en) * 1965-11-11 1968-05-29 Automatic Telephone & Elect Improvements in or relating to data processing systems
US3435420A (en) * 1966-01-03 1969-03-25 Ibm Contiguous bulk storage addressing
NO119615B (en:Method) * 1966-02-25 1970-06-08 Ericsson Telefon Ab L M
US3454933A (en) * 1966-06-27 1969-07-08 Gen Electric Data processing system
NL6815506A (en:Method) * 1968-10-31 1970-05-04
US3611310A (en) * 1969-07-30 1971-10-05 Burroughs Corp Discriminating store operator method and apparatus for data processors
US3614741A (en) * 1970-03-23 1971-10-19 Digital Equipment Corp Data processing system with instruction addresses identifying one of a plurality of registers including the program counter
US3718912A (en) * 1970-12-22 1973-02-27 Ibm Instruction execution unit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3048333A (en) * 1957-12-26 1962-08-07 Ibm Fast multiply apparatus in an electronic digital computer
US3029414A (en) * 1958-08-11 1962-04-10 Honeywell Regulator Co Information handling apparatus

Also Published As

Publication number Publication date
US3201761A (en) 1965-08-17
BE621075A (en:Method)
CH407598A (de) 1966-02-15
GB1003924A (en) 1965-09-08
NL282242A (en:Method)

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Legal Events

Date Code Title Description
SH Request for examination between 03.10.1968 and 22.04.1971