DE112006003556A5 - Halbleiterbauelement mit ladungskompensationsstruktur und verfahren zur herstellung desselben - Google Patents

Halbleiterbauelement mit ladungskompensationsstruktur und verfahren zur herstellung desselben Download PDF

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Publication number
DE112006003556A5
DE112006003556A5 DE112006003556T DE112006003556T DE112006003556A5 DE 112006003556 A5 DE112006003556 A5 DE 112006003556A5 DE 112006003556 T DE112006003556 T DE 112006003556T DE 112006003556 T DE112006003556 T DE 112006003556T DE 112006003556 A5 DE112006003556 A5 DE 112006003556A5
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Germany
Prior art keywords
producing
same
semiconductor component
load compensation
compensation structure
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DE112006003556T
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German (de)
English (en)
Inventor
Stefan Sedlmaier
Anton Mauder
Frank Pfirsch
Hans-Joachim Schulze
Helmut Strack
Armin Willmeroth
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Infineon Technologies Austria AG
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Infineon Technologies Austria AG
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
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    • H01L29/063—Reduced surface field [RESURF] pn-junction structures
    • H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Recrystallisation Techniques (AREA)
DE112006003556T 2005-10-24 2006-10-23 Halbleiterbauelement mit ladungskompensationsstruktur und verfahren zur herstellung desselben Ceased DE112006003556A5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102005051180 2005-10-24
DE102005051180.5 2005-10-24
PCT/DE2006/001879 WO2007048393A2 (de) 2005-10-24 2006-10-23 Halbleiterbauelement mit ladungskompensationsstruktur und verfahren zur herstellung desselben

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DE112006003556A5 true DE112006003556A5 (de) 2008-09-25

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JP (2) JP5102214B2 (ja)
DE (1) DE112006003556A5 (ja)
WO (1) WO2007048393A2 (ja)

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Publication number Priority date Publication date Assignee Title
JP5533067B2 (ja) * 2010-03-15 2014-06-25 富士電機株式会社 超接合半導体装置の製造方法
JP6526579B2 (ja) 2016-01-15 2019-06-05 株式会社東芝 半導体装置
CN111855706B (zh) * 2020-07-28 2023-08-15 哈尔滨工业大学 半导体材料辐射诱导位移缺陷的检测方法
EP3955310A1 (en) 2020-08-11 2022-02-16 Infineon Technologies Austria AG Method for producing a superjunction device

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JP3112102B2 (ja) * 1991-08-01 2000-11-27 キヤノン株式会社 半導体装置
JP3684962B2 (ja) * 1999-12-01 2005-08-17 富士電機デバイステクノロジー株式会社 半導体装置の製造方法
GB9929613D0 (en) * 1999-12-15 2000-02-09 Koninkl Philips Electronics Nv Manufacture of semiconductor material and devices using that material
DE10120656C2 (de) * 2001-04-27 2003-07-10 Infineon Technologies Ag Halbleiterbauelement mit erhöhter Avalanche-Festigkeit
US6521954B1 (en) * 2001-12-21 2003-02-18 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing method thereof
DE10245049B4 (de) * 2002-09-26 2007-07-05 Infineon Technologies Ag Kompensationshalbleiterbauelement
JP2004342660A (ja) * 2003-05-13 2004-12-02 Toshiba Corp 半導体装置及びその製造方法

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WO2007048393A2 (de) 2007-05-03
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