DE102005014627A1 - Flashspeicher, Halbleiterbauelement, Seitenpuffer und Schaltung für einen Flashspeicher - Google Patents

Flashspeicher, Halbleiterbauelement, Seitenpuffer und Schaltung für einen Flashspeicher Download PDF

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Publication number
DE102005014627A1
DE102005014627A1 DE102005014627A DE102005014627A DE102005014627A1 DE 102005014627 A1 DE102005014627 A1 DE 102005014627A1 DE 102005014627 A DE102005014627 A DE 102005014627A DE 102005014627 A DE102005014627 A DE 102005014627A DE 102005014627 A1 DE102005014627 A1 DE 102005014627A1
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DE
Germany
Prior art keywords
bit lines
overlap
orthogonal direction
wise manner
page buffers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE102005014627A
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English (en)
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DE102005014627B4 (de
Inventor
Dae-Seok Byeon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020040020424A external-priority patent/KR100543474B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102005014627A1 publication Critical patent/DE102005014627A1/de
Application granted granted Critical
Publication of DE102005014627B4 publication Critical patent/DE102005014627B4/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits

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  • Read Only Memory (AREA)

Abstract

Die Erfindung bezieht sich auf einen Flashspeicher mit einem ersten Seitenpuffer (PB0), welcher ein erstes Bitleitungspaar (BL0_E, BL0_O) umfasst, und mit einem zweiten Seitenpuffer (PB1), welcher ein zweites Bitleitungspaar (BL1_E, BL1_O) umfasst, wobei jeder Seitenpuffer eine Schaltung (22) für hohe Spannung zum Auswählen einer der Bitleitungen der Bitleitungspaare und eine Niedrigspannungsschaltung (26) zum Abtasten der Speicherzellendaten über die ausgewählte Bitleitung beinhaltet, auf ein zugehöriges Halbleiterbauelement, auf einen zugehörigen Seitenpuffer und auf eine Schaltung für einen Flashspeicher. DOLLAR A Erfindungsgemäß umfasst wenigstens einer der Seitenpuffer einen Schalttransistor (LT4), welcher mit einer Abtastleitung (SO0, SO1) verbunden ist, wobei die Abtastleitungen des ersten und zweiten Seitenpuffers stufenweise versetzt angeordnet sind, so dass sie in einer Richtung orthogonal zu den Bitleitungen nicht überlappen. DOLLAR A Verwendung z. B. für Flashspeicher in Multimediaanwendungen.
DE102005014627A 2004-03-25 2005-03-24 Flashspeicher und Halbleiterbauelement Active DE102005014627B4 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR10-2004-0020424 2004-03-25
KR1020040020424A KR100543474B1 (ko) 2004-03-25 2004-03-25 감지 라인들 사이의 커플링 노이즈로 인한 읽기 에러를방지할 수 있는 플래시 메모리 장치
US10/915,555 US7190618B2 (en) 2004-03-25 2004-08-11 Semiconductor device for reducing coupling noise
US10/915,555 2004-08-11

Publications (2)

Publication Number Publication Date
DE102005014627A1 true DE102005014627A1 (de) 2005-10-20
DE102005014627B4 DE102005014627B4 (de) 2009-07-09

Family

ID=35034292

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102005014627A Active DE102005014627B4 (de) 2004-03-25 2005-03-24 Flashspeicher und Halbleiterbauelement

Country Status (3)

Country Link
JP (1) JP4772350B2 (de)
CN (1) CN100568389C (de)
DE (1) DE102005014627B4 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100666184B1 (ko) * 2006-02-02 2007-01-09 삼성전자주식회사 하부 비트라인들과 상부 비트라인들이 전압제어블락을공유하는 3-레벨 불휘발성 반도체 메모리 장치
US7817470B2 (en) 2006-11-27 2010-10-19 Mosaid Technologies Incorporated Non-volatile memory serial core architecture
KR20120136533A (ko) * 2011-06-09 2012-12-20 에스케이하이닉스 주식회사 반도체 장치 및 이의 동작방법
CN103700400B (zh) * 2012-09-28 2017-10-31 上海华虹集成电路有限责任公司 用于Flash EEPROM的数据锁存电路
CN107437427B (zh) * 2017-08-07 2020-06-23 上海兆芯集成电路有限公司 读取电路和读取方法
KR20210059081A (ko) * 2019-11-13 2021-05-25 유니텍 메모리 테크놀로지 리미티드 낸드 플래시 메모리의 비트라인 스위치 회로

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4170604B2 (ja) * 2001-04-18 2008-10-22 株式会社東芝 不揮発性半導体メモリ
KR100399353B1 (ko) * 2001-07-13 2003-09-26 삼성전자주식회사 시분할 감지 기능을 구비한 불 휘발성 반도체 메모리 장치및 그것의 읽기 방법
JP4004811B2 (ja) * 2002-02-06 2007-11-07 株式会社東芝 不揮発性半導体記憶装置
KR100562508B1 (ko) * 2003-12-01 2006-03-21 삼성전자주식회사 비트 라인의 고전압이 누설되는 것을 막아주는 불휘발성반도체 메모리 장치

Also Published As

Publication number Publication date
CN100568389C (zh) 2009-12-09
DE102005014627B4 (de) 2009-07-09
JP2005276422A (ja) 2005-10-06
CN1674158A (zh) 2005-09-28
JP4772350B2 (ja) 2011-09-14

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