CN2724199Y - 用于晶片封装的大晶片涂胶装置 - Google Patents

用于晶片封装的大晶片涂胶装置 Download PDF

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CN2724199Y
CN2724199Y CN2004200771735U CN200420077173U CN2724199Y CN 2724199 Y CN2724199 Y CN 2724199Y CN 2004200771735 U CN2004200771735 U CN 2004200771735U CN 200420077173 U CN200420077173 U CN 200420077173U CN 2724199 Y CN2724199 Y CN 2724199Y
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wafer
glue
utility
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费耀祺
陈昶华
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D-Tek Technology Co Ltd
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Changlin Sci & Tech Co Ltd
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Abstract

本实用新型涉及一种用于晶片封装的大晶片涂胶装置,其具有改善传统晶片封装技术的能力,以大晶片正面涂胶方法印刷黏胶于大晶片上,可以网印或钢板印刷方式进行,再将大晶片切割后贴附于基材上,之后通过传统的晶片封装技术生产线,将晶片装设于基材上,能提升对位精度,提升生产优良率,节省工时成本,包含下列组成:大晶片,具有正面及背面,且该正面具有半导体电路;及印刷胶层,位于该大晶片的正面。其中,该半导体电路层为多个区块所形成;其中各区块具有无胶区。

Description

用于晶片封装的大晶片涂胶装置
技术领域
本实用新型有关于一种用于晶片封装的大晶片涂胶装置,特别是涉及一种能提升对位精度,提升生产优良率,节省工时成本,可用于大多数晶片封装生产线的场所的晶片封装的大晶片涂胶装置。
背景技术
如一般相关业界所认知的,晶片封装生产线生产能力提升是近年来各种的晶片封装及代工厂商积极研发及建构的项目,其所使用的技术方式如生产流程改善或新材料的使用等等可适用于各种晶片封装的场所,以使得降低成本及工时成本需求得以实现;目前为止生产流程改善可以说是非常重要的改善项目,因为晶片封装的机台多为精密工业专门制做的机械,略有更改,往往代价高昂,但是可以配合固有的机台特性做出周边流程的改善,相对成本较低而且成效显著。
在IC基板方面(包括BGA(球型栅状阵列基板)、CSP(晶片规格封装基板)、Flip Chip(覆晶基板)三大类),其中IC基板近年成长幅度大;近年来台湾、南韩及大陆等地并积极扩充增层基板的产量及持续投资激光钻孔机设备,使其增加基板生产上的竞争力。未来由于便携式电子产品轻薄短小的需求趋势,将促使电路板朝向细线化及微孔技术发展,加上小型封装技术的进步,也使得高阶IC基板的需求提高,连带使小尺寸晶片封装前景一片看好。为了满足手机板、通讯产品及汽车工业的需求,预期未来小尺寸晶片封装将会再持续发展。
BGA、CSP与Flip chip构装结构虽然变化不少,与传统Lead frame型机装比较最大的差异在于有机材料的大量应用;从基板、Solder mask、封装材料都可以发现Polyimide、BT、Epoxy等有机材料的踪影。从这些材料的相关制备方法观察,其技术内涵极为丰富;大略可分为基板制作(包括如原材料开发、压合、蚀刻、增层、电镀等)、液态封胶配方开发、构装产品应用与可靠度测试分析等技术。无论对原材料开发者(化学品厂)、基板制作者(基板厂)、或封装设计与制造者(半导体厂、封装厂),了解这些材料及其制备方法,进一步适当的设计与选用材料,应是掌握终极BGA、CSP与Flip chip构装的不二法门。尤其制备方法的改善更是台湾科技业的专长。
如图1A或图1B所示,在公知的晶片基板封装生产线中,有一种晶片基板组合件,其具有两层或一层装配晶片的需求(彼此构造类似),且该两片的晶片14及16等零件通常为以薄胶膜17黏合,而一般为IC(Integral Circuit)晶片配置,该图中的结构为上层晶片14以薄膜胶17(film type)黏合下层晶片16,且下层晶片16再以薄胶膜17黏合基材18,并且在黏合后打上接线12(一般为金线),进一步加以灌封装材料10及沾附焊锡19,以形成完整的晶片封装零件,然而薄膜胶17在贴附于基材18的过程中极易产生空洞,且贴附的过程须使用较高精度的机具,要贴附对位精准,因此成本较高,因此为适应产品特性,生产流程安排常难以达到高效能操作晶片封装机台的目标。
发明内容
本实用新型的主要目的在于提供一种晶片封装的大晶片涂胶装置,也就是新生产流程方法产生的构造,而且可以成本低廉的架构及以配合相关的较方便专用周边自动机施行,可用于多种晶片封装产品的应用场所,可以提供低成本高品质的效果。
为了达到上述目的,本实用新型将公知的整片大晶片以印刷方式涂上黏胶,避开公知薄胶膜的不易处理问题,配合使用后续晶片封装专用机来完成晶片封装,更经济地定义出有益于实际应用的晶片封装构造,与公知技术比较更具实用价值。
根据本实用新型提供的装置包含:大晶片,具有正面及背面,且该正面具有半导体电路层;及印刷胶层,位于该大晶片的正面;其中该半导体电路层为多个区块所形成,且各该区块间具有容许切割间隔;其中各区块具有无胶区。
根据本实用新型的构思,该大晶片具有定位标记。
根据本实用新型的构思,该印刷胶层为网板印刷所形成。
根据本实用新型的构思,该印刷胶层为钢板印刷所形成。
根据本实用新型的构思,该印刷胶层厚度为10-150μm。
根据本实用新型的构思,各该区块的无胶区具有接线区。
根据本实用新型的构思,该接线区位于区块的中央或边缘区域。
本实用新型配合实际状态研发新生产流程而以印刷黏胶方式将黏胶直接以印刷方式直接涂布于大晶片上,再进入晶片封装生产线使得组装优良率提高,因为在大晶片切割成晶片后贴附于基材或其它层晶片时为具有压力的贴合方式使得空洞被压合消失;并且因为使用印刷方式上胶,对位精度高,而成本降低、优良率提升,配合进一步架构各周边机具,并符合工业工程的流程排配原理,使设备成本减少,并能够持续高效率运作,还能够使制备方法简化。
附图说明
图1A为公知的晶片封装截面的一示意图;
图1B为公知的晶片封装截面的二示意图;
图2为本实用新型较佳实施例一种用于晶片封装的大晶片黏合构造示意图;
图3为本实用新型使用的大晶片外观示意图;及
图4为本实用新型进行涂胶时的示意图。
其中,附图标记说明如下:
10-封装材料;12-接线;14-上层晶片;16-下层晶片;
17-薄胶膜;18-基材;19-焊锡;20-大晶片;21-正面;
22-半导体电路层;23-背面;24-印刷胶层;26-区块;
28-切割间隔;29-定位标记;30-刮刀;32-黏胶;34-印刷工具。
具体实施方式
请参考以下所述为本实用新型运作原理,其中本实用新型为利用黏胶印刷涂布于大晶片上的原理,以方便在大晶片切割成晶片后进行晶片贴合的生产流程,进一步以简单的方式来描述本实用新型的流程即为:大晶片制成、印刷黏胶、裁切成晶片后层叠于基材上、打连接线(一般为金线)、封装,且印刷对位减少累积位误差以助于对位精度,故晶片对基材而言放置对位容易,加上周边配合辅助机台,能节省成本地定义出有益于实际应用的晶片封装生产系统。
请参考图4为本实用新型实施的印刷涂胶步骤,其中大晶片20的正面具有一印刷工具34(如网板或钢板),可用一刮刀30对大晶片表面印刷黏胶32,以形成印刷胶层24。此为本实用新型的方法与公知技术的最大不同点。
请参考图3为本实用新型实施的大晶片20的表面外观说明,一般而言,大晶片表面具有多个区块26,并且每一区块26具有半导体电路,因此该大晶片20可被切割成多个晶片,其中为使区块26得到适当的保护不被切割刀具破坏,须设置切割间隔28;且定位标记29可作为印刷黏胶32时的定位;本实用新型的基本构造适用于多种半导体产品的大晶片,使得本实用新型可以广泛应用。
本实用新型用于晶片封装的大晶片黏合构造如图2所示,因为切割大晶片20的方便考虑,一般位于大晶片20正面21的半导体电路层22上涂布的印刷胶层24应该设置无胶的切割间隔28,及位于区块26的中央区域或边缘的接线区;此外,印刷胶层24亦可增设于大晶片20的背面23,以用于叠合其它晶片之用。
请参考图2为本实用新型较佳实施例的状况,为一种用于晶片封装的大晶片黏合构造,其中构造包含:大晶片,具有正面及背面,且该正面具有半导体电路层;及印刷胶层,位于该大晶片的正面;其中该半导体电路层为多个区块所形成,且各该区块间具有允许切割间隔;其中各区块具有无胶区。本实用新型的重点为建构一有特别特征的大晶片构造,可方便裁切成晶片后用于晶片封装。
为明白显示出本实用新型的次要特征,本实用新型依其特性可分为以下各种实施状态;其中该切割间隔一般可为无胶状态或有胶状态,以防止切割刀具影响涂胶精度;又其中该大晶片可具有定位标记,以方便印刷涂胶工具的定位,亦可为人工定位不需要定位标记;且其中该印刷胶层可为网板印刷所形成,以方便各封装厂商的现存设备或熟悉技术人员来施行;或其中该印刷胶层为钢板印刷所形成,以方便现存设备及治具厂商的实作专长技术应用;为求晶片的堆叠,其中该大晶片的背面亦可有印刷胶层,以使该晶片可以因应双面黏合需求;为求印刷方便,其中该印刷胶层厚度可为20-100μm,并进一步该印刷胶层厚度较佳可为30-50μm(含40μm此一常用标准值);为使现存设备刀具可派上用场,其中该切割间格所在的材料可容许钻石刀切开;为求接线(打金线)的方便,其中各该区块的无胶区具有接线区,且其中该接线区位于区块的中央区域或边缘区域。
以一整条晶片(或晶粒)封装生产配置的先后顺序而言,其中该印刷涂胶位于封装生产线的中段,该大晶片于涂胶后,先经过裁切的动作再经过夹持工具取起再压合于基材上,因此利用本实用新型构造有利于对位压合及低成本印刷,使生产成本得以降低,而大量生产时会使得优良率提升明显,尤其是一般具晶片封装生产线的代工或制造厂商,往往是24小时连续操作至一批次工件完成才停止产线,因此产能改善效果显著。
本实用新型具有以下的优点:
1.对位精准,优良率提升:此点由大晶片印刷黏胶及压合于基材的上得到验证,可减少定位误差,进而提升取置机的优良率,获得较好的经济效果。
2.空洞减少,优良率提升:大晶片压合时,本实用新型经高压减少空洞于黏胶中产生。
3.制备机器设备成本低:制备方法方便施行,使设备成本自然减少而易于取得。
4.制备方法简化:可减少传统贴胶膜设备的人力及工时。
以上所述仅为本实用新型的较佳可行实施例,非因此即限制本实用新型的专利保护范围,故凡应用本实用新型说明书或附图内容所为的等效变化,均同理皆包含于本实用新型的保护范围内。

Claims (7)

1、一种用于晶片封装的大晶片涂胶装置,其特征是包含:
大晶片,具有正面及背面,且该正面具有半导体电路层;及
印刷胶层,位于该大晶片的正面;
其中该半导体电路层为多个区块所形成;
其中各区块具有无胶区。
2、如权利要求1所述用于晶片封装的大晶片涂胶装置,其特征是该大晶片具有定位标记。
3、如权利要求1所述用于晶片封装的大晶片涂胶装置,其特征是该印刷胶层为网板印刷所形成。
4、如权利要求1所述用于晶片封装的大晶片涂胶装置,其特征是该印刷胶层为钢板印刷所形成。
5、如权利要求1所述用于晶片封装的大晶片涂胶装置,其特征是该印刷胶层厚度为10-150μm。
6、如权利要求1所述用于晶片封装的大晶片涂胶装置,其特征是各该区块的无胶区具有接线区。
7、如权利要求6所述用于晶片封装的大晶片涂胶装置,其特征是该接线区位于区块的中央或边缘区域。
CN2004200771735U 2004-08-19 2004-08-19 用于晶片封装的大晶片涂胶装置 Expired - Fee Related CN2724199Y (zh)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102024687A (zh) * 2010-09-17 2011-04-20 沈阳芯源微电子设备有限公司 一种提高涂胶产能的方法
CN107887492A (zh) * 2017-10-26 2018-04-06 佛山市国星光电股份有限公司 Led封装方法、led模组及其led器件
CN115871357A (zh) * 2022-12-23 2023-03-31 盐城东山精密制造有限公司 一种改善bt板封装切割的工艺

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102024687A (zh) * 2010-09-17 2011-04-20 沈阳芯源微电子设备有限公司 一种提高涂胶产能的方法
CN107887492A (zh) * 2017-10-26 2018-04-06 佛山市国星光电股份有限公司 Led封装方法、led模组及其led器件
CN115871357A (zh) * 2022-12-23 2023-03-31 盐城东山精密制造有限公司 一种改善bt板封装切割的工艺

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