CN219457622U

CN219457622U - IGBT chip structure with composite function

Info

Publication number: CN219457622U
Application number: CN202320548193.9U
Authority: CN
Inventors: 翟露青; 马青翠
Original assignee: ZIBO MICRO COMMERCIAL COMPONENTS CORP
Current assignee: ZIBO MICRO COMMERCIAL COMPONENTS CORP
Priority date: 2023-03-21
Filing date: 2023-03-21
Publication date: 2023-08-01
Anticipated expiration: 2033-03-21

Abstract

The utility model provides an IGBT chip structure with a composite function, and relates to the field of semiconductor device manufacturing. The semiconductor device comprises a semiconductor substrate, wherein a built-in temperature sensor structure is arranged in the semiconductor substrate, the built-in temperature sensor structure comprises a groove, a thermistor structure is arranged in the groove, and a polysilicon gate is arranged above the thermistor structure; the thermistor structure comprises a separate gate polysilicon layer which is independently segmented, and an ultrathin metal layer connected with the separate gate polysilicon layer is arranged above the separate gate polysilicon layer. According to the utility model, the separated gate polycrystalline silicon layers which are independently segmented are arranged in the grooves, and are connected with the ultrathin metal layer to form a thermistor structure, so that the temperature of an IGBT chip (inside) can be monitored in real time; therefore, the problems of low temperature monitoring accuracy and poor sensitivity existing in the existing temperature sensor structure integrated on the IGBT chip are solved; meanwhile, the utility model can reduce the Miller capacitance in the IGBT chip to a certain extent, thereby effectively improving the performance of the chip and ensuring the normal operation of the chip.

Description

IGBT chip structure with composite function

Technical Field

The utility model relates to the field of semiconductor device manufacturing, in particular to an IGBT chip structure with a composite function.

Background

The insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT) is a compound full-control voltage-driven power semiconductor device consisting of a metal oxide semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor, MOSFET) and a bipolar junction transistor (Bipolar Junction Transistor, BJT), and integrates the advantages of simple gate voltage driving of the MOSFET and low on-resistance of the BJT; the IGBT has been widely used in the fields of communication, traffic, home appliances, industry, new energy, and the like by virtue of its advantages of high blocking voltage, large current capacity, small driving power, and the like.

In order to ensure that the IGBT chip can work normally, it is necessary to integrate a temperature sensor structure on the chip to monitor the temperature of the IGBT chip in real time, thereby preventing the occurrence of chip damage or shortened life due to excessive temperature. At present, two main forms of temperature sensor structures integrated on IGBT chips are: firstly, a temperature sensor (such as a thermistor) and an IGBT chip are packaged together, but in the structure, a certain distance is needed between the temperature sensor and the IGBT chip, so that the heat of the IGBT chip can only be partially conducted to the temperature sensor, the response speed of temperature detection is low, and certain hysteresis is provided, so that the accuracy of temperature monitoring is low; secondly, the temperature sensor structure is built in the IGBT chip, the specific implementation mode of the structure is that the polysilicon layer of the temperature sensor is arranged above the grid polysilicon, however, the sensitivity of the structure in actual use is poor, and the step height difference between the polysilicon layer of the temperature sensor and the grid polysilicon can cause the contact hole shape of the polysilicon layer to be poor, so that the temperature sensor can only measure the temperature of the surface of the IGBT chip.

In addition, the Miller capacitance exists in the IGBT chip, and the Miller effect can enable the chip to form a platform voltage in the grid driving process, so that the problems of long switching time, increased switching loss and the like are caused, and negative influence is brought to the normal operation of the IGBT chip; therefore, how to reduce the miller capacitance in the chip as much as possible is also a worthy of research and discussion.

Disclosure of Invention

The utility model aims to provide an IGBT chip structure with a composite function, which solves the problems of low temperature monitoring accuracy and poor sensitivity existing in the existing temperature sensor structure integrated on an IGBT chip; meanwhile, the utility model can reduce the Miller capacitance in the IGBT chip to a certain extent, thereby effectively improving the performance of the chip and ensuring the normal operation of the chip.

The utility model is realized by adopting the following technical scheme:

the IGBT chip structure with the composite function comprises a semiconductor substrate, wherein a built-in temperature sensor structure is arranged in the semiconductor substrate, the built-in temperature sensor structure comprises a groove, a thermistor structure is arranged in the groove, and a polycrystalline silicon grid is arranged above the thermistor structure; the thermistor structure comprises a separate gate polysilicon layer which is independently segmented, and an ultrathin metal layer connected with the separate gate polysilicon layer is arranged above the separate gate polysilicon layer.

In the utility model, the built-in temperature sensor structure of the IGBT chip is mainly formed by the separated gate polysilicon layer which is independently segmented in the groove; specifically, the temperature of the IGBT chip (inside) can be monitored in real time by the thermistor structure, and the built-in temperature sensor structure can be uniformly distributed at different positions inside the IGBT. Compared with a conventional integrated structure, in the IGBT chip structure, no space exists between the IGBT chip and the temperature sensor structure, so that the one-sided property and the hysteresis of temperature monitoring are avoided; the polysilicon layer in the built-in temperature sensor structure is not required to be arranged above the grid polysilicon, so that the situation that the temperature sensor polysilicon layer (namely the separated grid polysilicon layer) is isolated from the semiconductor substrate by the grid polysilicon layer is avoided, namely the detection precision of the temperature sensor is improved, and the monitoring of the built-in temperature sensor is not easily influenced by the external environment of the chip; therefore, the method and the device can effectively improve the position accuracy and the numerical accuracy of temperature monitoring in the IGBT chip, thereby ensuring the normal operation of the IGBT chip. Meanwhile, the separated gate polysilicon layer is connected with the ultrathin metal layer to form a thermistor structure, the temperature of the IGBT chip can be reflected through the resistance characteristic of the separated gate polysilicon layer, and the transmission efficiency of charges in the gate source oxide layer can be greatly improved due to the existence of the metal layer, so that the Miller capacitance in the chip can be reduced to the greatest extent, and the performance of the IGBT chip is effectively improved.

Further, the trench is formed in the semiconductor substrate, a first oxide layer is arranged on the bottom and the side wall of the trench and the upper surface of the semiconductor substrate, and a thermistor structure is arranged above the first oxide layer in the trench. It should be noted that the present built-in temperature sensor structure is not limited to silicon-based materials, but is also applicable to semiconductor materials such as silicon carbide and gallium nitride.

Further, a second oxide layer is arranged above the thermistor structure, and extends from the inside of the groove to the upper surface of the first oxide layer.

Further, a polysilicon gate is arranged above the second oxide layer in the groove, and the upper end of the polysilicon gate is flush with the upper surface of the second oxide layer.

Further, the grooves are bar-shaped, but not limited to bar-shaped grooves, square-shaped grooves, regular hexagonal-shaped grooves and the like are also suitable.

Further, the first oxide layer and the second oxide layer are made of silicon dioxide.

The beneficial effects achieved by the utility model are as follows:

the utility model provides an IGBT chip structure with complex function, through set up the separation gate polycrystalline silicon layer of independent segmentation in the slot inside to make separation gate polycrystalline silicon layer be connected with ultra-thin metal layer, constitute thermistor structure, and then can real-time supervision IGBT chip (inside) temperature, and this built-in temperature sensor structure can evenly distributed in the inside different positions of IGBT. Compared with a conventional integrated structure, the utility model can avoid the one-sided performance and hysteresis of temperature monitoring and improve the detection precision of the temperature sensor structure, thereby effectively improving the position accuracy and the numerical accuracy of temperature monitoring in the IGBT chip, ensuring the working stability and the reliability of the IGBT chip and providing great convenience for the application and failure analysis of the IGBT chip. Meanwhile, the Miller capacitance in the chip can be reduced to the greatest extent by the aid of the metal layer, so that the performance of the IGBT chip is improved effectively.

Drawings

FIG. 1 is a schematic cross-sectional view of an internal temperature sensor structure according to an embodiment of the present utility model;

FIG. 2 is a schematic plan view of the interior of a built-in temperature sensor structure according to an embodiment of the present utility model;

FIG. 3 is a schematic view of the vertical longitudinal section of the three sections (5, 6, A) of FIG. 2;

FIG. 4 is a schematic view of the transverse longitudinal section of FIG. 2;

fig. 5 is a schematic diagram of a distribution position of a built-in temperature sensor structure in an IGBT chip according to an embodiment of the utility model;

FIG. 6 is a schematic cross-sectional view of the step 1 according to the embodiment of the present utility model;

FIG. 7 is a schematic cross-sectional view of the step 2 according to the embodiment of the present utility model;

FIG. 8 is a schematic cross-sectional view of the step 3 according to the embodiment of the present utility model;

FIG. 9 is a schematic cross-sectional view of the step 4 according to the embodiment of the present utility model;

FIG. 10 is a schematic cross-sectional view of the embodiment of the present utility model after the step 5 is performed;

in the figure: 1. a substrate; 2. a groove; 3. a first oxide layer; 4. a first polysilicon layer; 5. a split gate polysilicon layer; 6. a metal layer; 7. a second oxide layer; 8. a second polysilicon layer; 9. a polysilicon gate.

Detailed Description

For clarity of explanation of the solution of the present utility model, the following will be further explained with reference to the accompanying drawings:

referring to fig. 1 to 10, an IGBT chip structure with a composite function includes a semiconductor substrate 1, wherein a built-in temperature sensor structure is provided in the semiconductor substrate 1, the built-in temperature sensor structure includes a trench 2, a thermistor structure is provided in the trench 2, and a polysilicon gate 9 is provided above the thermistor structure; the thermistor structure comprises a separate gate polysilicon layer 5 which is independently segmented, and an ultrathin metal layer 6 connected with the separate gate polysilicon layer 5 is arranged above the separate gate polysilicon layer. Specifically:

as shown in fig. 1, a first oxide layer 3 is arranged on the bottom and the side wall of the groove 2 and the upper surface of the semiconductor substrate 1, and a thermistor structure is arranged above the first oxide layer 3 in the groove 2; a second oxide layer 7 is arranged above the thermistor structure, and the second oxide layer 7 extends from the inside of the groove 2 to the upper surface of the first oxide layer 3; a polysilicon gate 9 is arranged above the second oxide layer 7 in the trench 2, and the upper end of the polysilicon gate 9 is flush with the upper surface of the second oxide layer 7. The grooves 2 are strip-shaped, and the first oxide layer 3 and the second oxide layer 7 are made of silicon dioxide. As shown in fig. 5, a plurality of built-in temperature sensor structures (i.e., several small squares in fig. 5) may be uniformly distributed in the IGBT chip.

The IGBT chip structure is prepared through the following steps:

step 1: as shown in fig. 6, a stripe-shaped trench 2 is formed in a semiconductor substrate 1, a first oxide layer 3 is formed at the bottom, side walls, and upper surface of the trench 2 and a first polysilicon layer 4 is deposited in the trench 2 and on the upper surface of the first oxide layer 3; the material of the first oxide layer 3 is silicon dioxide, and is formed by a thermal oxidation process or a chemical vapor deposition process.

Step 2: as shown in fig. 7, a pattern of the first polysilicon layer 4 is defined by using photoresist, and then the first polysilicon layer 4 is etched by using an anisotropic dry etching process, so that the first oxide layer 3 leaks out, and the first polysilicon layer 4 is kept within the trench 2 for a certain length, so as to form the split gate polysilicon layer 5.

Step 3: as shown in fig. 8, an ultra-thin metal layer 6 is deposited into the trench 2 and onto the upper surface of the first oxide layer 3.

Step 4: as shown in fig. 9, a pattern of the metal layer 6 is defined by using photoresist, and then the redundant metal layer 6 on the upper surface of the first oxide layer 3, the side wall of the trench 2 and the surface of the split gate polysilicon layer 5 is etched by adopting a twice oblique directional etching process; the operation procedure of performing the first oblique directional etching process and the structure obtained after the process are shown in fig. 9 (a), and the operation procedure of performing the second oblique directional etching process and the structure obtained after the process are shown in fig. 9 (b).

Step 5: as shown in fig. 10, a second oxide layer 7 is formed in the trench 2 and on the upper surface of the first oxide layer 3 by a thermal oxidation process or a chemical vapor deposition process, and then a second polysilicon layer 8 is deposited in the trench 2 and on the upper surface of the second oxide layer 7.

Step 6: as shown in fig. 1, the excess portion of the second polysilicon layer 8 is etched away by an etching process, and dry etched back to a level position on the upper surface of the second oxide layer 7, thereby forming a polysilicon gate 9. The process flow is the same as the conventional IGBT separation gate manufacturing process, and will not be repeated.

More specifically, as shown in fig. 2 (where a portion a in fig. 2 represents a contact area between the metal layer 6 and the split gate polysilicon layer 5), it can be intuitively seen from a top view that the metal layer 6 is connected to the split gate polysilicon layer 5 to form a thermistor structure, and the temperature of the IGBT chip can be reflected by the resistance characteristic of the split gate polysilicon layer 5, so as to realize real-time monitoring of the chip temperature. The metal layer 6, the split gate polysilicon layer 5 and the a portion in fig. 2 are slit vertically, so as to obtain 3 cross-sectional structure diagrams as shown in fig. 3; the structure of fig. 2 is slit in the transverse direction to obtain a schematic cross-sectional structure as shown in fig. 4.

Compared with a conventional integrated structure, in the IGBT chip structure, no space exists between the IGBT chip and the built-in temperature sensor structure, so that the one-sided property and the hysteresis of temperature monitoring are avoided; the polysilicon layer in the built-in temperature sensor structure is not required to be arranged above the grid polysilicon, so that the situation that the built-in temperature sensor polysilicon layer (namely the separated grid polysilicon layer 5) is isolated from the semiconductor substrate 1 by the grid polysilicon layer is avoided, namely the detection precision of the built-in temperature sensor is improved, and the monitoring of the built-in temperature sensor is not easily influenced by the external environment of the chip; therefore, the method and the device can effectively improve the position accuracy and the numerical accuracy of temperature monitoring in the IGBT chip, thereby ensuring the normal operation of the IGBT chip. Meanwhile, the existence of the metal layer 6 can also greatly improve the transmission efficiency of charges in the gate-source oxide layer, so that the Miller capacitance in the chip can be reduced to the greatest extent, and the performance of the IGBT chip is effectively improved.

Of course, the foregoing is merely preferred embodiments of the present utility model and is not to be construed as limiting the scope of the embodiments of the present utility model. The present utility model is not limited to the above examples, and those skilled in the art will appreciate that the present utility model is capable of equally varying and improving within the spirit and scope of the present utility model.

Claims

1. An IGBT chip structure with composite function, its characterized in that: the semiconductor device comprises a semiconductor substrate (1), wherein a built-in temperature sensor structure is arranged in the semiconductor substrate (1), the built-in temperature sensor structure comprises a groove (2), a thermistor structure is arranged in the groove (2), and a polysilicon gate (9) is arranged above the thermistor structure; the thermistor structure comprises a separate gate polysilicon layer (5) which is independently segmented, and an ultrathin metal layer (6) connected with the separate gate polysilicon layer (5) is arranged above the separate gate polysilicon layer.

2. The IGBT chip structure with composite functions according to claim 1, wherein: the trench (2) is formed in the semiconductor substrate (1), a first oxide layer (3) is arranged on the bottom and the side wall of the trench (2) and the upper surface of the semiconductor substrate (1), and a thermistor structure is arranged above the first oxide layer (3) in the trench (2).

3. The IGBT chip structure with composite functions according to claim 2, wherein: a second oxide layer (7) is arranged above the thermistor structure, and the second oxide layer (7) extends from the inside of the groove (2) to the upper surface of the first oxide layer (3).

4. The IGBT chip structure with composite functions according to claim 3, wherein: and a polysilicon gate (9) is arranged above the second oxide layer (7) in the groove (2), and the upper end of the polysilicon gate (9) is flush with the upper surface of the second oxide layer (7).

5. The IGBT chip structure with composite functions according to claim 1, wherein: the grooves (2) are strip-shaped, square or regular hexagon.

6. The IGBT chip structure with composite functions according to claim 3, wherein: the first oxide layer (3) and the second oxide layer (7) are made of silicon dioxide.