CN218243981U - Depth limit testing structure for depth-controlled milling of circuit board - Google Patents
Depth limit testing structure for depth-controlled milling of circuit board Download PDFInfo
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- CN218243981U CN218243981U CN202221949462.4U CN202221949462U CN218243981U CN 218243981 U CN218243981 U CN 218243981U CN 202221949462 U CN202221949462 U CN 202221949462U CN 218243981 U CN218243981 U CN 218243981U
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Abstract
The utility model provides a circuit board accuse mills degree of depth boundary test structure deeply, including the first copper layer, first tie coat, second copper layer, second tie coat, third copper layer, the third tie coat that are used for forming the blind groove of the dark milling of first test accuse that from top to bottom combines in proper order and be used for forming the fourth copper layer of the blind groove of the dark milling of second test accuse, be formed with the different first region of a plurality of incomplete copper rates on the second copper layer, be formed with the different second region of a plurality of incomplete copper rates on the third copper layer, the copper thickness of first copper layer, second copper layer, third copper layer, fourth copper layer is 140um. Utility model not only can reflect when the inlayer copper is thick > 3OZ, H safe distance ability, but also can test out the different incomplete copper rate of inlayer respectively and correspond H minimum distance ability to provide the powerful foundation for the design of printed wiring board.
Description
Technical Field
The utility model relates to a circuit board field of making, in particular to circuit board accuse mills degree of depth boundary test structure deeply.
Background
More than 3OZ belongs to a thick copper plate, and when the plate has the structure requirement of a depth control blind groove, the method for manufacturing the blind groove basically forms the blind groove by depth control milling at present. The minimum distance capability of the conventional H (the distance from the depth limit of the H-finger to the copper of the non-milled sublayer) in the industry is more than or equal to 0.15mm; but the thickness of H is more than or equal to 0.15mm, the method is only practically suitable for non-thick copper plates with the inner layer copper thickness of less than or equal to 3 OZ; and when the inner layer copper thickness is larger than 3OZ, the inner layer glue filling amount is large, the plate thickness uniformity is poor, different residual copper rates are caused, the medium thickness is different, the calculated theoretical H value is not matched with the actual value, and the H minimum distance capability is not clearly defined in the industry when the inner layer copper thickness is larger than 3 OZ. If the control method is manufactured according to the control method with H being more than or equal to 0.15mm, which is relatively common in the current industry, the control method has the following defects: (1) Calculating that the theoretical H value is not matched with the actual value, and deeply milling the copper penetrating the sublayer to cause open-circuit risk; (2) And (4) the calculated theoretical H value is not matched with the actual value, and the depth control milling deep copper is exposed, so that the electric leakage risk is caused.
SUMMERY OF THE UTILITY MODEL
The utility model provides a circuit board accuse mills degree of depth boundary test structure deeply to solve at least one above-mentioned technical problem.
For solving the problem, as an aspect of the utility model provides a circuit board accuse mills degree of depth boundary test structure deeply, include the first copper layer, first tie coat, second copper layer, second tie coat, third copper layer, the third tie coat that are used for forming the blind groove of the dark milling of first test accuse that from top to bottom combines in proper order and be used for forming the fourth copper layer of the blind groove of the dark milling of second test accuse, be formed with the different first region of a plurality of incomplete copper rates on the second copper layer, be formed with the different second region of a plurality of incomplete copper rates on the third copper layer, the copper thickness of first copper layer, second copper layer, third copper layer, fourth copper layer is 140um.
Preferably, the residual copper rates of the plurality of first regions are 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, respectively.
Preferably, the residual copper rates of the plurality of second regions are 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, respectively.
Since the technical scheme is used, the utility model discloses when not only can reflecting the inlayer copper thickness > 3OZ, H safe distance ability, but also can test out the different incomplete copper rate of inlayer respectively and correspond H minimum distance ability to provide powerful foundation for the design of printed wiring board.
Drawings
Fig. 1 schematically shows a schematic view of a first copper layer;
figure 2 schematically shows a cross-sectional view of the invention;
fig. 3 schematically shows a schematic view of a second copper layer.
Reference numbers in the figures: 1. a first copper layer; 2. a first adhesive layer; 3. a second copper layer; 4. a second adhesive layer; 5. a third copper layer; 6. a third adhesive layer; 7. a fourth copper layer; 8. a first region; 9. a second region; 10. and the first test depth control milling of blind grooves.
Detailed Description
The embodiments of the invention are described in detail below, but the invention can be implemented in many different ways, which are defined and covered by the claims.
As an aspect of the utility model provides a circuit board accuse mills degree of depth boundary test structure deeply, including the first copper layer 1, first tie coat 2, second copper layer 3, second tie coat 4, third copper layer 5, the third tie coat 6 that are used for forming the blind groove 10 of the blind groove of the first test accuse mill deeply that from top to bottom combines in proper order and be used for forming the fourth copper layer 7 of the blind groove of the second test accuse mill deeply, be formed with the different first region 8 of a plurality of incomplete copper rates on the second copper layer 3, be formed with the different second region 9 of a plurality of incomplete copper rates on the third copper layer 5, the copper thickness of first copper layer 1, second copper layer 3, third copper layer 5, fourth copper layer 7 is 140um.
Preferably, the residual copper ratio of the plurality of first regions 8 is 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, respectively.
Preferably, the second regions have a copper residue ratio of 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, respectively.
As shown in fig. 1, the graph of the first copper layer is divided into six modules (each dashed box is a module, each module has a plurality of first test depth-control milling blind grooves 10), which are all circuit graphs with the same design, and correspond to depth-control conditions of six different regions. As shown in fig. 2, the utility model discloses form by rigid PCB board, including first copper layer 1, first tie coat 2, second copper layer 3, second tie coat 4, third copper layer 5, third tie coat 6 and fourth copper layer 7, first tie coat 2, third tie coat 6 comprise 4 3313 adhesive material layers (1 bonding sheet thickness 0.17 mm), and H is the depth control limit to not milling the inferior layer copper distance in the picture, wherein: the theoretical value of H design of the six modules can be respectively 0.15mm, 0.2mm, 0.25mm, 0.3mm, 0.35mm and 0.4mm.
As shown in fig. 3, the first copper layer is also divided into 6 modules, which are all designed with the same circuit pattern and respectively correspond to the 6 modules of the first copper layer. The residual copper rates of the individual modules were 20%, 30%, 40%, 50%, 60%, 70%, 80%, and 90%, respectively.
When the test is needed, the laminated structure in the application is formed firstly, then depth control milling is carried out on the first copper layer and the fourth copper layer, the relation between the different residual copper rates corresponding to the H minimum distance capability can be seen through observation of all the modules, and the H minimum distance capability corresponding to the different residual copper rates can be obtained.
Since the technical scheme is used, the utility model discloses when not only can reflecting the inlayer copper thickness > 3OZ, H safe distance ability, but also can test out the different incomplete copper rate of inlayer respectively and correspond H minimum distance ability to provide powerful foundation for the design of printed wiring board.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. The utility model provides a circuit board accuse mills degree of depth limit test structure deeply, its characterized in that, including first copper layer (1), first tie coat (2), second copper layer (3), second tie coat (4), third copper layer (5), third tie coat (6) that are used for forming first test accuse mills blind groove deeply (10) from top to bottom combining in proper order and be used for forming fourth copper layer (7) of second test accuse milling blind groove deeply, be formed with the different first region (8) of a plurality of incomplete copper rates on second copper layer (3), be formed with the different second region (9) of a plurality of incomplete copper rates on third copper layer (5), the copper thickness of first copper layer (1), second copper layer (3), third copper layer (5), fourth copper layer (7) is 140um.
2. The circuit board depth-control milling depth boundary test structure according to claim 1, wherein the residual copper rates of the plurality of first regions (8) are respectively 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%.
3. The circuit board depth-controlled milling depth boundary testing structure according to claim 1, wherein the copper residue rates of the plurality of second regions are 20%, 30%, 40%, 50%, 60%, 70%, 80% and 90%, respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202221949462.4U CN218243981U (en) | 2022-07-25 | 2022-07-25 | Depth limit testing structure for depth-controlled milling of circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202221949462.4U CN218243981U (en) | 2022-07-25 | 2022-07-25 | Depth limit testing structure for depth-controlled milling of circuit board |
Publications (1)
Publication Number | Publication Date |
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CN218243981U true CN218243981U (en) | 2023-01-06 |
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CN202221949462.4U Active CN218243981U (en) | 2022-07-25 | 2022-07-25 | Depth limit testing structure for depth-controlled milling of circuit board |
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2022
- 2022-07-25 CN CN202221949462.4U patent/CN218243981U/en active Active
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