CN101309558B - Manufacturing method of multi-layer printed circuit board and the circuit board - Google Patents
Manufacturing method of multi-layer printed circuit board and the circuit board Download PDFInfo
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- CN101309558B CN101309558B CN200810099927XA CN200810099927A CN101309558B CN 101309558 B CN101309558 B CN 101309558B CN 200810099927X A CN200810099927X A CN 200810099927XA CN 200810099927 A CN200810099927 A CN 200810099927A CN 101309558 B CN101309558 B CN 101309558B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
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- Microelectronics & Electronic Packaging (AREA)
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- Optics & Photonics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention provides a method of manufacturing multilayer printed circuit boards stably with low cost for deploying the centers of the upper hole and the lower hole of a step passage for interlayer connection on approximately equal position and a circuit board thereof. An outer stacking layer (18b) is cascaded on the upper layer of the core substrate (15), and an opening is formed on the copper foil of the outer stacking layer, thereby forming a stacked circuit base material (24) on which holes for conducting the step passage holes (23a) are formed to achieve interlayer connection. For the stacked circuit base material, a copper foil opening of which diameter is approximately equal to that of the lower hole of the step passage holes is formed on the forming part of the holes (21a, 21b) for conducting at the outer layer side, and the approximate center of the opening is irradiated with laser by the beams which are approximately equal to the diameter of the upper hole of the step passage hole; perforations are formed in the copper foil of the outer stacking layer, interlayer insulated resin and the like; the conductive layer at the laser irradiation plane side in the core substrate is irradiated with laser directly, while a through hole (52c) of which diameter is approximately equal to that of the lower hole of the step passage holes is formed on the forming part of the holes for conducting at the outer layer side.
Description
Technical field
The present invention relates to the manufacture method of stacked multilayer board and the structure of circuit board, particularly have the manufacture method of multilayer board of step access structure and the structure of circuit board at the interlayer connecting portion.
Background technology
Such trend has appearred in recent years, electronic equipment especially miniaturization, the high performance of mobile phone attracts people's attention, element on the multi-layer flexible printed circuit board is installed CSP (chip size packages) mode that also thereupon changed into, because high-density packages need not to strengthen substrate size and just can add high function.
Therefore, in order to realize high-density packages, be interior core substrate with two-sided or multi-layer flexible printed circuit board, the stacked multi-layer flexible printed circuit board that is provided with the stack layer about 1～2 layer at two-sided or single face is practicability also.
Just can realize the scheme that connects between high-density layer as not increasing operation, propose scheme in the patent documentation 1 (p3, Fig. 1) step via hole and the combination of step via hole.
This is the method that can carry out the interlayer connection of sandwich construction in the lump, wherein, consider factors such as offset, along with the metal light shield of laser processing being used to entering of internal layer, the diameter of conformal light shield reduce, form conducting by laser processing and use the hole, arrive interlayer by plating and connect.
But, have some problems aspect the formation of this step via hole.At first be to have such situation: consider offset as mentioned above, need to form the conformal light shield of outer layer side bigger, because the relation of the positional precision of stacked grade may not necessarily be carried out highdensity interlayer and be connected.In addition, during the ragged center of the conformal light shield of each layer, the conformal light shield of outer layer side constitutes penthouse and becomes the bad reason of internal layer side laser processing, the instability of coating layer periphery when carrying out plating after causing conducting to form with the hole.
Therefore, also become the cause of following problem: defectives such as plating space take place easily; The step via hole that obtains by plating becomes unsymmetric structure; The thermal stress that takes place in the step via hole during temperature cycling test etc. becomes big at regional area; The reliability decrease that interlayer connects.
Based on such reason, for the reliability of via hole, needing increases plated thickness, in case plated thickness increases, conductor layer thickness just increases, and the result just is difficult to form meticulous circuit.
In order to ensure being the connection reliability of the via hole of two-sided interior core substrate electrical connection with stack layer and internal layer, the coating thickness of the wall of the via hole of stack layer also needs to increase.Therefore, be difficult to form fine circuitry, can not satisfy the requirement of high-density installation.Therefore, in order to remedy the deficiency that fine circuitry forms ability, also proposed to carry out the method that pile up the second level by increasing the number of plies.
No. 2562373 communique of [patent documentation 1] special permission
[patent documentation 2] spy opens the 2001-177248 communique
Summary of the invention
But have such problem, make secondary stacked multi-layer flexible printed circuit board in this way, need repeat stackedly one by one, therefore, it is complicated that technology becomes along with the increase of the number of plies, and product qualified rate reduces.
About the problems referred to above, describe with Fig. 3.As shown in Figure 3, there is following problem in combined stack lamination 122 on interior core substrate 121 and constituting when having the multilayer board 124 of multicore cable portion 123.
The conformal light shield 112 that the laser processing that forms on the core substrate 121 in conformal light shield 111 during with the laser processing made in advance and internal layer two-sided is used carries out laser processing, carries out plating afterwards and forms the conducting that constitutes via hole with hole 101a, 101b.
About conducting hole 101a, consider the offset between conformal light shield 111 and the conformal light shield 112, the diameter that the diameter of conformal light shield 111 is made as 250 μ m, conformal light shield 112 is made as 50 μ m.
At this moment, as shown in Figure 3, because occurrence positions skew when stacked, the center between conformal light shield 111 and the conformal light shield 112 is alignment not.Offset about the most about 100 μ m takes place, and therefore, is difficult to carry out the stable laser processing of conducting with the hole of hole 110a downside.
Secondly, has the plating of carrying out on the multilayer circuit base material of conducting with hole 101a, 101b about 25～30 μ m, step via hole 102a that formation is obtained with hole 101a by conducting and the via hole 102b that is obtained with hole 101b by conducting realize interlayer conduction with these via holes.
At this moment, as mentioned above, the center between conformal light shield 111 and the conformal light shield 112 produces the offset about the most about 100 μ m, therefore, causes the instability of conducting with the coating layer periphery in the hole of the downside of hole 101a.
Therefore, the defective in easy generation plating space etc. 103, it is asymmetric that the step via hole that obtains through plating structurally becomes, therefore, the thermal stress that takes place at step via hole 102a place when carrying out temperature cycling test etc. is local to become big, and this also becomes the reason of interlayer connection reliability variation.In addition, the situation of the local attenuation of plated thickness takes place easily, this also is the reason of interlayer connection reliability variation when carrying out temperature cycling test etc.
According to above-mentioned situation, but occur can be at a low price and stably make the method for the multilayer board of the multicore cable portion with high-density installation in expectation.
The present invention considers the premises and proposes, its purpose is to provide can at a low price and stablize the method for making multilayer board, comprise in the multilayer board of step access structure at the interlayer connecting portion, the center between the last hole of the step path of this multilayer board and the following hole is configured in position about equally.
For reaching above-mentioned purpose, the application provides each following invention.
The application's the 1st invention provides the manufacture method of multilayer board, comprises following operation: a) on the insulating substrate of being made up of resin film, prepare to have the interior core substrate of at least 1 layer of conductive layer; B) will be layered on the above-mentioned interior core substrate with adhesives by the outer stack layer that at least one mask has the copper foil laminate of conductive layer to constitute; C), on the Copper Foil of conducting with the formation position in hole of the conductive layer that is positioned at above-mentioned copper foil laminate, form opening, thereby form lamination circuit base material in stacked front and back; D) hole is used in the conducting that formation step via hole is used on above-mentioned lamination circuit base material; And e) form the interlayer connection that comprises above-mentioned step via hole by above-mentioned conducting is made the conductionization processing electroplating of going forward side by side with the hole, it is characterized in that,
Form the operation d of above-mentioned conducting with the hole) in,
For above-mentioned lamination circuit base material, form the following aperture Copper Foil opening about equally of its aperture and above-mentioned step via hole with the formation position in hole in the conducting of above-mentioned outer layer side;
Approximate the rough center of opening of the above-mentioned Copper Foil of laser beam irradiation last aperture, that copper can be removed of above-mentioned step via hole with its beam diameter, on Copper Foil, interlaminar insulating resin and the above-mentioned adhesives of above-mentioned outer stack layer, form perforation; And
The above-mentioned laser of irradiation on the conductive layer of the shadow surface side of the above-mentioned laser in above-mentioned in the core substrate, by not by means of the direct processing of perforation, form following aperture about equally the through hole of the conducting of aperture and above-mentioned outer layer side with the above-mentioned step via hole at the formation position in hole with the Copper Foil opening.
In addition, the printed circuit board (PCB) that the application's the 2nd invention provides has the structure of having folded outer stack layer on interior core substrate upper strata, interlayer between above-mentioned outer stack layer and the above-mentioned interior core substrate connects, by the interlayer that carries out the wiring layer more than 3 layers connect more to the outer layer side conducting with the big more step via hole in the aperture in hole with only do the blind via hole realization that outermost layer is connected with the interlayer of wiring layer below one deck, it is characterized in that
Accepting area conductor thickness for core substrate in above-mentioned step via hole above-mentioned is thinner than the accepting area conductor thickness of above-mentioned blind via hole.
The present invention obtains following effect by these features.
Multilayer board with multicore cable portion of the present invention, form the copper thickness of accepting area that connects the step via hole of 3 layers of wiring layer thinner than the copper thickness of the accepting area of the blind via hole of the interlayer connection of only between outermost layer and the wiring layer below one deck, doing, thereby can be when the step via hole forms, only at the conformal light shield of outermost formation, and by direct laser processing therein the heart suitably form the following hole of step via hole, realize therefore guaranteeing that rate of finished products is improved and the reduction of the thickness of coating that reliability is required.
Its result, can provide a kind of manufacture method that is difficult to realize with classical production process according to the present invention, can be at a low price and stably be manufactured in the multilayer board that the interlayer connecting portion comprises the step access structure multilayer board that disposes on the position about equally, center in the last hole of step path and following hole with this method.
Description of drawings
Figure 1A is the notion sectional view of part operation in the manufacture method of expression 4 stratotype multilayer boards of the present invention.
Figure 1B is the notion sectional view of part operation in the manufacture method of expression 4 stratotype multilayer boards of the present invention.
Fig. 1 C is the notion sectional view of part operation in the manufacture method of expression 4 stratotype multilayer boards of the present invention.
Fig. 1 D is the notion sectional view of part operation in the manufacture method of expression 4 stratotype multilayer boards of the present invention.
Fig. 2 A is the notion sectional view of part operation in the manufacture method of expression 6 stratotype multilayer boards of the present invention.
Fig. 2 B is the notion sectional view of part operation in the manufacture method of expression 6 stratotype multilayer boards of the present invention.
Fig. 3 is the inappropriate situation key diagram during the via in the traditional stacked multilayer board of expression forms.
[description of reference numerals]
1 flexible insulation base material; 2,3 Copper Foils; 4 two-sided copper foil laminates; The hole is used in 5 conductings; The barrier layer is used in 6 parcel platings; 7 through holes; 8 are positioned at the part of accepting area; 9 circuit patterns; 10a, 10b accepting area, 11 two-sided sandwich layer substrates; 12 polyimide films; 13 adhesivess; 14 cover layers; 15 two-sided sandwich layer substrates; 16 flexible insulation base materials; The 17a Copper Foil; 17b, the conformal light shield of 17b; 18a single face copper foil laminate; The 18b stack layer; 19 adhesivess; 20 multilayer circuit base materials; 21a, the hole is used in the 21b conducting; The 21c conducting lower-side hole of hole 21a; 22 multilayer circuit base materials; 23a step via hole; The 23b via hole; 24 have realized the multilayer circuit base material of interlayer conduction; 25 outer circuit patterns; 26 4 stratotype multilayer boards; 46 flexible insulation base materials; The 47a Copper Foil; 47b, 47c, the conformal light shield of 47d; The 48a Copper Foil; The 48b accepting area; 49a single face copper foil laminate; The 49b stack layer; 50 adhesivess; 51 multilayer circuit base materials; 52a, the hole is used in the 52b conducting; The hole of hole 52a downside is used in the 52c conducting; The hole is used in the 52d conducting; 53 multilayer circuit base materials; 54a, 54b step via hole; The 54c via hole; 55 have realized the multilayer circuit base material of interlayer conduction; 56 outer circuit patterns; 57 6 stratotype multilayer boards; 101a, the hole is used in the 101b conducting; 102a step via hole; 103 electroplate space etc.; 111,112 conformal light shields; Core substrate in 121; 122 stack layers; 123 multicore cable portions; 124 multilayer boards.
Embodiment
Below, describe with regard to embodiments of the invention with reference to accompanying drawing.
[embodiment 1]
Fig. 1 is the cross section process chart of the manufacture method of expression multilayer board of the present invention.This multilayer board is 4 stratotype multilayer boards with multicore cable, contains the step access structure at the interlayer connecting portion.
At first, shown in Figure 1A (1), preparation is provided with the Copper Foil 2 of thickness 7 μ m and 3 two-sided copper foil laminate 4 on the two sides of the flexible insulation base material 1 (being the polyimides of thickness 25 μ m here) of polyimides etc., forms conducting with hole 5 with numerical control drilling machine etc. on this two-sided copper foil laminate 4.The Copper Foil 2 and 3 of this moment preferably adopts good rolled copper foil of folding property or special electrolytic copper foil.
Then, the conduction processing in order not electroplate on the wiring pattern of multicore cable etc., and is only electroplated in the part that is positioned at inwall selectively, forms parcel plating with barrier layer 6.
In this case, for the through hole accepting area of the size of the factors such as Working position skew of the dimensional discrepancy that comprises the offset of having considered exposure, substrate, numerical control drilling machine, be connected with the part of the accepting area in hole and electroplate formation barrier layer 6 selectively with the inwall in hole 5 with interlayer between the stack layer in conducting.But, do not electroplate owing to pile up on the accepting area of back with the laser perforation, therefore, on corresponding with it position, also form parcel plating and use barrier layer 6.
Then, shown in Figure 1A (2), be positioned at the plating of carrying out about 10 μ m on the part 8 of conducting with hole 5 and above-mentioned accepting area, realizing interlayer conduction.By operation so far, formed through hole 7.In addition, be positioned on the part 8 of above-mentioned accepting area also by plating and thickening.
Then, shown in Figure 1A (3), form photoresist layer for form two-sided circuit pattern with photoetching process.Utilize photoresist layer, form circuit pattern 9 and accepting area 10a, 10b, again photoresist layer is peeled off by photoetching process.By operation so far, obtain two-sided sandwich layer substrate 11 as the sandwich layer substrate of multilayer board.
In the present embodiment 1, adopt the two-sided sandwich layer substrate that connects pass, but also can use the two-sided sandwich layer substrate of path pass.In addition, in the present embodiment 1, reach on the accepting area in the hole earlier and carry out parcel plating in conducting, form circuit patterns such as multicore cable after this, but also can leave conducting forms multicore cable etc. with Kong Houzai circuit pattern earlier, afterwards, electroplate on hole and accepting area in conducting by parcel plating and add thickness coating.
Then, carry out roughening treatment on the copper surface of two-sided sandwich layer substrate 11, the adaptation when forming with improvement cover layer thereafter, and make the absorption of the laser when piling up the back laser processing stablize raising.
Here, adopted the Multibond 150 of Japanese マ Network ダ-ミ Star ト joint-stock company.Confirm that before and after handling, (wavelength: absorption about 9.8 μ m) brings up to about 30% from about 20% to carbon dioxide laser.In addition, by this roughening treatment, the about attenuate of thickness of Copper Foil 1 μ m.
Then, shown in Figure 1A (4), preparation contains the cover layer 14 of the adhesives 13 of acrylic acid-epoxy resin of thickness 20 μ m etc. on the polyimide film 12 that for example 12 μ m are thick, subsides り such as these cover layer 14 usefulness vacuum press, laminater are attached to the two sides of two-sided sandwich layer substrate 11.By operation so far, obtained attached tectal two-sided sandwich layer substrate 15.
Then, shown in Figure 1B (5), preparation has the single face copper foil laminate 18a of the Copper Foil 17a of thickness 7 μ m on the single face of flexible insulation base materials 16 such as polyimides (being the polyimides of thickness 25 μ m here), again with single face copper foil laminate 18a molding, on the Copper Foil 17a of single face copper foil laminate 18a, form photoresist layer (not shown), the conformal light shield during in order to the formation laser processing.
By utilizing the photoetching process of this photoresist layer, conformal light shield 17b, 17c when forming laser processing peel off photoresist layer again.By operation so far, obtained the stack layer 18b of multilayer board.
In advance with adhesives 19 moldings and aligned position, in order to stack layer 18b is stacked on the attached tectal two-sided sandwich layer substrate 15.As adhesives 19, preferably select for use the mylar of low flow model and joint fastener etc. to flow out few adhesives.Here owing to do not need filling conductor layer, the thickness of adhesives 19 to be chosen as about 15 μ m or thinner.
By means of vacuum press etc. with adhesives 19 with stack layer 18b with tectal two-sided sandwich layer substrate 15 laminations.By operation so far, obtained multilayer circuit base material 20.Then, on the copper foil surface of the stack layer 18b of multilayer circuit base material 20, carry out roughening treatment again, make stable raising of laser absorption when carrying out laser processing after piling up.The content of this roughening treatment and effect and aforesaid the same.
Have, the processing sequence of carrying out roughening treatment at this copper foil surface has following 3 kinds again: (a) earlier do roughening treatment on the single face copper foil laminate, form conformal light shield then and be layered on the two-sided sandwich layer substrate; (b) form conformal light shield, then do roughening treatment, and be layered on the two-sided sandwich layer substrate; (c) form conformal light shield and be layered in two-sided sandwich layer substrate, do roughening treatment then, embodiment 1 is undertaken by the processing sequence of (c).
Its reason is, if as above-mentioned (a) and (b), before stacked, carry out roughening treatment, then because the resume of stacked heat and pressure etc., except the surface state relevant with the absorption of laser such as the shape that has alligatoring face and tone change, after in (a), having done roughening treatment, photoresist when forming conformal light shield by photoetching process and the adaptation between the copper are enhanced necessary above degree, cause the photoresist layer that forms in the operation at conformal light shield to be difficult to peel off.
In addition, the another program as the positional precision between the accepting area that improves conformal light shield and interior core substrate has following method.The single face copper foil laminate is layered on the two-sided sandwich layer substrate, Direct Recognition preformed blip or form the accepting area of conducting on two-sided sandwich layer substrate with the hole, and form conformal light shield with direct exposure method, so can under the state of offset minimum, form conformal light shield.Then, carry out aforesaid roughening treatment.
Then shown in Figure 1B (6), conformal light shield 17b, 17c when using the laser processing of making in advance carry out laser processing, the conducting hole 21b that the conducting that formation step via hole is used is used with hole 21a, via hole.For laser processing method, must carry out the perforation processing of Copper Foil, the processing of the excimer laser that therefore need carry out copper being removed, UV-YAG laser, YAG laser, carbon dioxide laser etc.Among this embodiment, adopt the carbon dioxide laser of the fast and highly productive of process velocity.
Form conformal light shield 17b and conformal light shield 17c respectively, make the former diameter and the diameter in the hole of the step via hole downside of formation about equally, the diameter of the latter's the diameter and the via hole of formation is about equally.Carry out laser processing in conformal light shield, the last aperture laser beam about equally to the conformal light shield 17b that forms the step via hole shines its beam diameter and step via hole shines with the center of the conformal light shield 17b of aimings such as image processing method.Thereby, shown in Figure 1B, to use and beam diameter (being the beam diameter of 200 μ m in this example) irradiation about equally of the diameter of conformal light shield 17b, the resin that at first will arrive till the accepting area 10a is removed.
Have again, shown in Figure 1B, under the situation that conducting is disposed with hole 21b subtend with hole 21a, 21c and conducting, consider not make accepting area 10b perforation, preferably form the conducting hole 21a, the 21c that comprise perforation processing earlier, form conducting hole 21b afterwards.
Thereby, among Figure 1B, the conducting of the upside in the first manuscript hole 21a, 21c, conducting hole 21a, 21c and the conducting hole 21b of reprocessing downside.Thereby, among the embodiment 1, when conducting is disposed with hole 21b subtend with hole 21a, 21c and conducting, if conducting is designed to all be positioned at upside with hole 21a, 21c, then can at first carry out laser processing with the hole from whole conductings of upside, then whole conductings of downside are carried out laser processing with the hole, so the efficient height.
Then as Fig. 1 C (7) shown in, again to forming the laser that conformal light shield 17b that the step via hole uses shines beam diameter 200 μ m, the Copper Foil of conformal light shield 17b is penetrated into 200 μ m, also the resin under it is removed.
At this moment, shown in Figure 1B (6), the resin on the extended line of conformal light shield 17b is removed, accepting area 10a becomes the state that has shone laser beam on the Copper Foil of accepting area 10a selectively.Its result, the position accepting area 10a on the extended line of conformal light shield 17b also connect with the diameter size about equally with conformal light shield 17b.
At this moment, last 1,2 irradiation utilizes image processing method to wait to aim at step via hole center, by predetermined diaphragm etc. beam diameter is retracted to 100 μ m afterwards and processes, and makes conducting better with the shape of the hole 21c of hole 21a downside.
Put the shape of formed conducting in order with hole 21a, conducting becomes 200 μ m with the diameter in the hole of hole 21a upside, and conducting stably forms with the conducting of aperture on accepting area 10a of the 100 μ m rough center with the upside of hole 21a with the hole 21c of the downside of hole 21a.In addition, conducting forms by the conformal laser processing that does not connect with hole 21b.
Figure 1B (6) is to one of a series of laser processings of Fig. 1 C (7) expression example.In this example, adopt ML605GTXIII-5100U2 (Mitsubishi Electric's (strain) system) as CO2 Laser Processing Equipment for Joining, by means of image processing or by reading the multipoint targets sign on the substrate, the size that reads multilayer circuit base material 20 is more individually stretched and is made correction, thereby makes the center of the conformal light shield 17b of position alignment.
Carry out 3 irradiations of beam diameter 200 μ m, pulse duration 15 μ sec, 15mJ earlier, then, by predetermined diaphragm etc. beam diameter is retracted to 100 μ m, carries out 1 irradiation of pulse duration 15 μ sec, 10mJ again, with the Copper Foil opening of conformal light shield 17b diameter to 200 μ m.Then, copper thickness approaches and becomes the accepting area 10a of the absorption surface of good state of carbon dioxide laser, aperture with 100 μ m connects, the accepting area 10b that all the other are thickeied by another layer plating, even for the absorption surface of good state of carbon dioxide laser does not also connect, so formed conducting hole 21a.
For the regulation position with the Copper Foil of conformal light shield 17b and accepting area 10a connects with stable aperture, need the laser optical system that the central energy density of laser is high and have the beam distribution of Gaussian Profile etc.
Confirm that if the copper thickness of conformal light shield 17b and accepting area 10a is below 10 μ m, then repeatability connects well on the energy of pact ± 30% of above-mentioned laser processing condition.If the thickness that 5 μ m are following then answer the copper of residual accepting area partly to disappear owing to pass through the above-mentioned alligatoring operation and subsequent the etching of pre-electroplating treatment etc., so the thickness of Copper Foil is preferably 5～10 μ m.
About the copper thickness of accepting area 10b, the thickening of the copper thickness of the accepting area 10b of the reverse side of the coplanar laser illumination by will being positioned at lower-side hole 21c in advance can access the tolerance limit of the perforation of reply accepting area 10b.Particularly, confirm: if more than the 14 μ m, then connecting required laser energy becomes more than 3 times, has enough tolerance limits.Thereby, preferably have the above copper thickness of 14 μ m.
Undertaken in order to obtain deblurring (desmear) processing, the conductionization processing that interlayer connects by electroplating again.But, remove in advance with the Copper Foil of the accepting area 10a of the periphery of the hole 21c of the downside of hole 21a being positioned at conducting.In the electroplating work procedure after this Copper Foil fusion, have to cause producing and electroplate bad phenomenon such as space and exist, therefore, the etching of carrying out about 2 μ m with the etching solution of ammonium persulfate aqueous solution etc. in the deblurring treatment process is removed.
Shown in Fig. 1 C, under the situation that conducting is disposed with hole 21b subtend with hole 21a, 21c and conducting, etched from the both sides, top and bottom of accepting area 10b, as mentioned above, because the thickening of the copper thickness of accepting area 10b can not connect in this etching work procedure and pre-electroplating treatment operation thereafter etc. yet.
Then, shown in Fig. 1 C (8), have the plating of carrying out on the multilayer circuit base material 22 of conducting with hole 21a, 21b about 10～15 μ m, forming step via hole 23 that obtains with hole 21a by conducting and the via hole 23b that obtains with hole 21b by conducting, the realization interlayer conduction.Because the center in the last hole of step via hole 23a and following hole not occurrence positions is offset, be stable with the coating periphery of the lower-side hole in hole to conducting.
Its result is difficult to electroplate the unfavorable condition in space etc., electroplates the step via hole that obtains and forms symmetric construction, and in the temperature cycling test etc., the thermal stress that step via hole 23a place takes place is disperseed equably, therefore, and the reliability raising that interlayer connects.As mentioned above, can guarantee the reliability that good interlayer connects with the electrodeposited coating thickness about 10～15 μ m.
By operation so far, the accomplished multilayer circuit base material 24 of interlayer conduction.In addition,, then can be when conducting forms with the hole form through hole with numerical control drilling machine etc. if need the installation through hole of connector etc., also can be when carrying out above-mentioned via hole plating the formation through hole.
Then, shown in Fig. 1 D (9), form outer field pattern 25 with common photoetching process.At this moment, the cover film 12 of sandwich layer substrate 15 top then removed it if the electrodeposited coating of separating out is arranged.
Then, plate scolding tin, nickel plating, gold-plated etc. surface treatment at substrate surface as required, carry out the formation and the sharp processing of light anti-flux layer, obtain the 4 stratotype multilayer boards 26 that internal layer has multicore cable.
Form ability as the desired pattern of high-density installation substrate, the size that the accepting area of 0.5mm pitch CSP for example will be installed is made as 300 μ m, in order between accepting area, to pass through 1 pattern, need to form the structure of wiring/space=50 μ m/50 μ m, pitch 100 μ m.
But as above-mentioned, if carry out plating about thickness 10～15 μ m on the thick Copper Foil of 7 μ m, outer field total conductor thickness becomes 17～22 μ m, is enough to the fine pattern that rate of finished products forms pitch 100 μ m goodly, therefore can satisfy the requirement of high-density installation.
In addition, owing to dispose multicore cable on the 2nd layer,, need to connect with narrow pitch configuration the via hole of layers 1 and 2, and the 2nd layer wiring need be trickle for beeline Connection Element installation portion.
About the configuration of via hole,, can realize the configuration that pitch 0.4mm is following because via hole 23a, 23b can form with the path aperture below the 200 μ m.Because adopt the following via hole 23a of path aperture 200 μ m, the interlayer joint construction with multilayer board of multicore cable of the present invention is the structure favourable to densification.
Fig. 2 A, B are the cross section process charts of the manufacture method of expression 6 stratotype multilayer boards of the present invention.At first, by preparing two-sided sandwich layer substrate 15 with the same method in Figure 1A (1)～(4), on it with cover layer by thickening with the parcel plating of accepting area in the hole in conducting.
Then, preparing shown in Fig. 2 A (1) has the Copper Foil 47 of thickness 7 μ m and the two-sided copper foil laminate 49a of 48a on the two sides of the flexible insulation base material 46 (being the polyimides of thickness 25 μ m in this example) of polyimides etc., again with two-sided copper foil laminate 49a molding, conformal light shield when on the Copper Foil 47a of two-sided copper foil laminate 49a, forming laser processing, on Copper Foil 48a, form the 48b of the 2nd layer the accepting area that constitutes the step via hole and the wiring of internal layer, and on the two sides, form photoresist layer, to form by photoetching process.
Utilize this photoresist layer, the conformal light shield 47b, 47c, the 47d that use when forming laser processing by photoetching process peel off this photoresist layer again.By operation so far, obtain the stack layer 49b of multilayer board.
Will be with so that stack layer 49b be stacked on adhesives 50 molding in advance on the tectal two-sided sandwich layer substrate 15, the line position of going forward side by side is aimed at.As adhesives 50, preferably adopt the few material of outflow of the mylar of low flow model and bonding sheet etc.
In this example, owing to do not need to fill conductor layer, the thickness of adhesives 50 may be selected to be about 15 μ m or is thinner.By means of vacuum press etc. with adhesives 50 with stack layer 49b and stacked with tectal two-sided sandwich layer substrate 15.By operation so far, obtain multilayer circuit base material 21.Then, the copper foil surface of the stack layer 49b of multilayer circuit base material 51 is carried out roughening treatment, stably improve the absorption of the laser when carrying out laser processing after piling up.The content of this roughening treatment and effect are as described above.
In addition, the additive method as the positional precision of the accepting area that improves conformal light shield and interior core substrate has following method.The single face copper foil laminate is layered on the two-sided sandwich layer substrate, Direct Recognition is preformed blip and the accepting area of formation conducting with the hole on two-sided sandwich layer substrate, form conformal light shield by direct exposure method, so can under the state of offset minimum, form conformal light shield.Then, carry out aforesaid roughening treatment.
Then, shown in Fig. 2 A (2), the conformal light shield 47b, 47c, the 47d that use during with the laser processing made in advance carry out laser processing, form conducting that the step via hole uses respectively with hole 52a, not with the 2nd layer conductor layer conducting and the direct conducting hole 52d that uses with hole 52b and via hole with the conducting that the 3rd layer of jump via hole that is electrically connected used.
For laser processing method, the perforation of Copper Foil processing is necessary, therefore with processing by excimer laser, UV-YAG laser, YAG laser, carbon dioxide laser etc. that copper is removed in laser radiation.In the present embodiment, the employing process velocity is fast, the carbon dioxide laser of highly productive.
Form the diameter of conformal light shield 47b and the diameter of conformal light shield 47c, 47d respectively, make the former with the diameter in the hole of the step via hole downside that forms about equally, the jump via hole of the latter and formation and the diameter of via hole are about equally.
For the conformal light shield 47b that forms the step via hole is carried out laser processing, the center that will aim at conformal light shield 47b with image processing method etc. with the laser beam of the last aperture beam diameter about equally of step via hole is shone.Shown in Fig. 2 A, to use and beam diameter (this example the is beam diameter 200 μ m) irradiation about equally of the diameter of conformal light shield 47b, the resin that at first will arrive till the accepting area 48b is removed.
Then as Fig. 2 B (3) shown in, the conformal light shield 47b of formation step via hole is shone the laser of beam diameter 200 μ m again, the Copper Foil of conformal light shield 47b is penetrated into 200 μ m diameters, and the resin under it is removed.At this moment, shown in Fig. 2 A (2), the resin on the extended line of conformal light shield 47b is removed, and becomes the state of illuminating laser beam on the Copper Foil of accepting area 48b selectively.Thereby the position of accepting area 48b on the extended line of conformal light shield 47b also connects and the formation via hole with the diameter size about equally with conformal light shield 47b.
At this moment, last 1,2 irradiation is aimed at the center of step via hole by image processing method etc., by predetermined diaphragm etc. beam diameter is retracted to 100 μ m and processes, and makes conducting more good with the shape of the hole 52d of hole 52a downside.
Established conducting uses the shape of hole 52a in case through arrangement, just can make conducting become 200 μ m with the diameter in the hole of hole 52a upside, conducting stably forms in the conducting of the accepting area 48b rough center with the upside of hole 52a with the aperture of 100 μ m with the hole 52d of hole 52a downside.In addition, conducting forms by the conformal laser processing that does not connect with hole 52b and 52c.
As the condition example of a series of laser processings among Fig. 2 A (2) and Fig. 2 B (3), carry out as follows.CO2 Laser Processing Equipment for Joining adopts ML605GTXIII-5100U2 (Mitsubishi Electric's (strain) system), by reading of the multipoint targets mark on image processing method or the substrate, size by individually reading multilayer circuit base material 51 is flexible and in addition revisal etc. is carried out position alignment at the center of conformal light shield 47b again.
At first, with beam diameter 200 μ m, pulse duration 15 μ sec, the laser of 15mJ carries out 3 irradiation processing, by predetermined diaphragm etc. beam diameter is retracted to 100 μ m, apply pulse duration 15 μ sec again, 1 irradiation of 10mJ, on the Copper Foil of conformal light shield 47b, form the opening of 200 μ m diameters, copper thickness approaches and becomes carbon dioxide laser and absorbs the aperture perforation of the accepting area 48a of surface of good state with 100 μ m, do not connect even all the other absorb the surface of good state by the accepting area 10b carbon dioxide laser of electroplating thickening yet, so form conducting hole 52a.
For the predetermined position with the Copper Foil of conformal light shield 47b and accepting area 48a connects by stable aperture, need the laser optical system of laser center energy density beam distribution high, that have Gaussian Profile etc.
Confirm, if the copper thickness of conformal light shield 47b and accepting area 48a is below the 10 μ m, even if the energy range of above-mentioned laser processing condition taxi about in the of 30% also can repeatability connect well.If the thickness that 5 μ m are following, then because the copper of the accepting area that above-mentioned alligatoring operation, the etching of pre-electroplating treatment thereafter etc. should stay can partly be removed, therefore, copper thickness is preferably 5～10 μ m.
As for the copper thickness of accepting area 10b, the thickening of the copper thickness of the accepting area 10b of the coplanar laser illumination of the hole 52c by will being positioned at downside in advance can obtain to tackle the tolerance limit of the perforation of accepting area 10b.Particularly, confirmed that as long as connecting required laser energy just becomes more than 3 times, can obtain sufficient tolerance limit more than the 14 μ m.Thereby, preferably have the above copper thickness of 14 μ m.
Carry out again to obtain deblurring processing, the conductionization processing that interlayer connects by plating.But, the Copper Foil fusion of the accepting area 48a of the hole 52c periphery of conducting usefulness hole 52a downside, this becomes in the follow-up electroplating work procedure reason that produces the unfavorable condition of electroplating space etc., etching solution with ammonium persulfate aqueous solution etc. in the deblurring treatment process carries out 2 μ m etching up and down, and the Copper Foil of fusion is removed.
Then shown in Fig. 2 B (4), has the plating of carrying out on the multilayer circuit base material 23 of conducting with hole 52a, 52b, 52d about 10～15 μ m, the step via hole 54a that formation is obtained with hole 52a by conducting, the jump via hole 54b that obtains with hole 52b by conducting and the via hole 54c that obtains with hole 52d by conducting, thus interlayer conduction obtained.
Because not generative center offset between the last hole of step via hole 54a and the following hole is stable with the electrodeposited coating periphery in the hole of hole downside to conducting.Its result is difficult to electroplate the unfavorable condition in space etc., and the step via hole that obtains through plating becomes symmetric construction, and the thermal stress that takes place among the step via hole 54a in processes such as temperature cycling test is disperseed equably, and therefore, the reliability that interlayer connects improves.Thereby as mentioned above, electrodeposited coating thickness is about 10～15 μ m, can guarantee good interlayer connection reliability.
By operation so far, the accomplished multilayer circuit base material 55 of interlayer conduction.In addition, if need connector etc. that the through hole of usefulness is installed, then can also can form through hole simultaneously with formation through holes such as numerical control drilling machines when conducting forms with the hole in the plating of carrying out above-mentioned via hole.
And, form outer field pattern 56 with the normal light carving technology.At this moment, if on the cover film 12 of sandwich layer substrate 15 electrodeposited coating of separating out is arranged, then it is removed.Then, plate scolding tin, nickel plating, gold-plated etc. surface treatment at substrate surface as required, carry out the formation and the sharp processing of light anti-flux layer, thereby obtain having 6 stratotype multilayer boards 57 of multicore cable at internal layer.
Claims (2)
1. the manufacture method of multilayer board, comprising: a) on the insulating substrate that resin film constitutes, prepare to have the operation of the interior core substrate of at least 1 layer of conductive layer; B) will by at least one mask have outer stack layer that the copper foil laminate of conductive layer constitutes with adhesives be layered in described in operation on the core substrate; C) before stacked described outer stack layer or behind the stacked described outer stack layer, form opening on the Copper Foil at the formation position in hole and form the operation of lamination circuit base material in the conducting of the conductive layer that is positioned at described copper foil laminate; D) conducting that formation step via hole is used on the described lamination circuit base material operation in hole; And e) by described conducting is formed the operation that the interlayer that comprises described step via hole connects with the hole conduction processing electroplating of going forward side by side, it is characterized in that,
Forming the operation d of described conducting with the hole) in,
To described lamination circuit base material, form the opening of the following aperture Copper Foil about equally of its diameter and described step via hole in the described conducting of outer layer side with the formation position in hole,
To the rough center of the opening of described Copper Foil, the laser copper can be removed with the last aperture beam diameter irradiation about equally of described step via hole forms perforation on Copper Foil, interlaminar insulating resin and the described adhesives of described outer stack layer,
Again in described on the conductive layer of the shadow surface side of the described laser in the core substrate, shine described laser by direct processing, form following aperture about equally the through hole of the conducting of diameter and described outer layer side with the described step via hole in the formation position in hole.
2. printed circuit board (PCB), structure with folded outer stack layer on interior core substrate upper strata, interlayer between described outer stack layer and the described interior core substrate connects, by realizing with the blind via hole that the interlayer of only making outermost layer and its time one deck wiring layer is connected with the step via hole of the diameter interlayer connection big more, that carry out the wiring layer more than 3 layers in hole toward the outer layer side conducting more, it is characterized in that
Conductor thickness for the accepting area of core substrate in described step via hole described is thinner than the conductor thickness of the accepting area of described blind via hole.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007-132868 | 2007-05-18 | ||
| JP2007132868A JP5014878B2 (en) | 2007-05-18 | 2007-05-18 | Multilayer printed wiring board manufacturing method and wiring board |
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| Publication Number | Publication Date |
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| CN101309558A CN101309558A (en) | 2008-11-19 |
| CN101309558B true CN101309558B (en) | 2011-04-27 |
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| CN200810099927XA Expired - Fee Related CN101309558B (en) | 2007-05-18 | 2008-05-15 | Manufacturing method of multi-layer printed circuit board and the circuit board |
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| Country | Link |
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| JP (1) | JP5014878B2 (en) |
| KR (1) | KR101387564B1 (en) |
| CN (1) | CN101309558B (en) |
| TW (1) | TWI400023B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009231596A (en) * | 2008-03-24 | 2009-10-08 | Fujitsu Ltd | Multilayer wiring board, multilayer wiring board unit, and electronic device |
| KR20110028951A (en) * | 2009-09-14 | 2011-03-22 | 삼성전기주식회사 | Printed circuit board and manufacturing method thereof |
| JP5485299B2 (en) * | 2010-02-08 | 2014-05-07 | 日本メクトロン株式会社 | Manufacturing method of multilayer printed wiring board |
| CN103379750B (en) * | 2012-04-27 | 2016-06-01 | 富葵精密组件(深圳)有限公司 | Multilayer circuit board and preparation method thereof |
| JP5452759B1 (en) * | 2013-09-09 | 2014-03-26 | 株式会社イースタン | Wiring board manufacturing method |
| CN112911835B (en) * | 2020-12-30 | 2023-03-10 | 恩达电路(深圳)有限公司 | Production method of multilayer mixed-pressing stepped back-pressing metal-based high-frequency circuit board |
| KR20230067984A (en) * | 2021-11-10 | 2023-05-17 | (주)티에스이 | Method of manufacturing multi-layer circuit board including extreme fine via and multi-layer circuit board manufactured by the same |
| CN114245575A (en) * | 2021-11-16 | 2022-03-25 | 龙南骏亚电子科技有限公司 | Design method of PCB resistance welding zigzag circuit board |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001189559A (en) * | 1999-12-28 | 2001-07-10 | Matsushita Electric Works Ltd | Method of manufacturing built-up printed wiring board |
| US20050287789A1 (en) * | 2004-06-28 | 2005-12-29 | Bahadir Tunaboylu | Substrate with patterned conductive layer |
| US20070102396A1 (en) * | 2002-09-23 | 2007-05-10 | Egitto Frank D | Method of making a circuitized substrate |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2562373B2 (en) * | 1990-03-31 | 1996-12-11 | 日本メクトロン株式会社 | Method of forming interlayer conductive structure of multilayer circuit board |
| JPH10190236A (en) * | 1996-12-26 | 1998-07-21 | Nippon Carbide Ind Co Inc | Manufacture of multilayer interconnection board |
| JPH10224040A (en) * | 1997-01-31 | 1998-08-21 | Nippon Carbide Ind Co Inc | Method for manufacturing multilayer wiring board |
| US6380096B2 (en) * | 1998-07-09 | 2002-04-30 | Applied Materials, Inc. | In-situ integrated oxide etch process particularly useful for copper dual damascene |
| JP2000031649A (en) * | 1998-07-14 | 2000-01-28 | Ngk Spark Plug Co Ltd | Manufacture of multilayer printed circuit board |
| JP2001144411A (en) * | 1999-09-03 | 2001-05-25 | Mec Kk | Drilling method for printed wiring board and surface treatment agent used therefor |
| JP2001177248A (en) * | 1999-12-15 | 2001-06-29 | Hitachi Ltd | Wiring board, manufacturing method therefor, and electronic apparatus |
| JP2001308529A (en) * | 2000-04-21 | 2001-11-02 | Ibiden Co Ltd | Laminated wiring board and its manufacturing method |
| JP2002299794A (en) * | 2001-04-03 | 2002-10-11 | Ibiden Co Ltd | Method of forming via hole and laminated wiring board having via hole |
| JP2003078247A (en) * | 2001-08-30 | 2003-03-14 | Kyocera Corp | Wiring substrate and method of manufacturing the same |
-
2007
- 2007-05-18 JP JP2007132868A patent/JP5014878B2/en active Active
-
2008
- 2008-02-29 TW TW097107110A patent/TWI400023B/en active
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- 2008-05-16 KR KR1020080045449A patent/KR101387564B1/en active IP Right Grant
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001189559A (en) * | 1999-12-28 | 2001-07-10 | Matsushita Electric Works Ltd | Method of manufacturing built-up printed wiring board |
| US20070102396A1 (en) * | 2002-09-23 | 2007-05-10 | Egitto Frank D | Method of making a circuitized substrate |
| US20050287789A1 (en) * | 2004-06-28 | 2005-12-29 | Bahadir Tunaboylu | Substrate with patterned conductive layer |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20080101762A (en) | 2008-11-21 |
| JP2008288434A (en) | 2008-11-27 |
| JP5014878B2 (en) | 2012-08-29 |
| KR101387564B1 (en) | 2014-04-23 |
| TW200847886A (en) | 2008-12-01 |
| CN101309558A (en) | 2008-11-19 |
| TWI400023B (en) | 2013-06-21 |
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