CN217544602U - Surface-mounted chip packaging structure - Google Patents
Surface-mounted chip packaging structure Download PDFInfo
- Publication number
- CN217544602U CN217544602U CN202221177709.5U CN202221177709U CN217544602U CN 217544602 U CN217544602 U CN 217544602U CN 202221177709 U CN202221177709 U CN 202221177709U CN 217544602 U CN217544602 U CN 217544602U
- Authority
- CN
- China
- Prior art keywords
- lead
- recess
- bottom plate
- lead wire
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Die Bonding (AREA)
Abstract
The utility model discloses a surface mounting type chip packaging structure, its bottom plate and apron including the pottery system of relative lock, first recess has been seted up on the bottom plate, the second recess has been seted up on the apron, and the lead frame is located in the second recess, the lead frame includes chip and lead wire, through bonding wire electrical connection between lead wire and the chip, the pin portion of lead wire certainly the bottom plate with stretch out between the apron, the lead wire with the sealing packing has first low temperature glass layer between the bottom plate, the lead wire with the sealing packing has second low temperature glass layer between the apron, the lead wire is located the distolateral laminating of holding intracavity the cell wall of first recess is buckled downwards. When the chip is detached from the circuit board, the end side of the lead wire positioned in the accommodating cavity is attached to the groove wall of the first groove and is bent downwards, so that the lead wire is not easy to fall off, and the stability of the bonding wire mounting structure is further ensured.
Description
Technical Field
The utility model relates to a microelectronics packaging application technical field especially relates to a surface mounting formula chip package structure.
Background
The ceramic low-temperature glass sealing is a packaging form sealed by ceramic, a lead frame and low-temperature glass, the packaging structure enables a chip inside the packaging structure to be electrically connected with an external circuit board, and meanwhile, the purpose of reliable sealing is achieved.
Common ceramic low temperature glass seals structure as shown in chinese patent number 201520766295.3's utility model patent, it discloses a 44 line element surface package structure, bottom plate and apron including the pottery system, the relative surperficial middle part of bottom plate and apron all is provided with the recess that is used for placing the component, the clearance intussuseption except that the recess between bottom plate and the apron is filled with low temperature and seals glass, and the lead wire of component is worn out from low temperature seal glass level and is extended to the bottom plate and the apron outside, and lead wire and chip correspond to draw forth and pass through the bonding wire and be connected between the end. Although the structure has good heat dissipation and air tightness, in the process of detaching the chip, if the solder at the leads is not cleaned up, the leads of the chip may be pulled out during the detachment process, so that the bonding wires fall off.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a table pastes formula chip package structure.
Realize the utility model discloses the technical scheme of purpose is: the utility model provides a surface mounting type chip packaging structure, its includes relative bottom plate and the apron of the pottery system of lock, first recess has been seted up on the bottom plate, the second recess has been seted up on the apron, first recess with the second recess relatively encloses the holding chamber of synthetic lead frame, the lead frame is located in the second recess, the lead frame includes chip and lead wire, the holding intracavity the lead wire with through bonding wire electrical connection between the chip, the pin portion of lead wire certainly bottom plate with stretch out between the apron, lead wire with between the bottom plate along the sealed packing in border of first recess has first low temperature glass layer, lead wire with between the apron along the sealed packing in border of second recess has second low temperature glass layer, the lead wire is located the distolateral laminating of holding intracavity the cell wall of first recess is buckled downwards.
Furthermore, the first lead part of the lead led out from the chip is a first lead part, and the first lead part is provided with a bulge. The protrusion has a marking function, and is convenient for identifying the first pin part.
The utility model discloses a table pastes formula chip package structure when demolising the chip on the circuit board, because the lead wire is located the distolateral laminating of holding intracavity the cell wall of first recess is buckled downwards, then the lead wire is difficult for droing, and then has guaranteed bonding wire mounting structure's stability.
Drawings
Fig. 1 is a schematic top view of the surface-mount chip package structure according to the present invention;
fig. 2 isbase:Sub>A schematic sectional view taken along linebase:Sub>A-base:Sub>A of fig. 1.
Detailed Description
The following detailed description of the preferred embodiments of the present invention will be made with reference to the accompanying drawings.
As shown in fig. 1 and fig. 2, a surface-mount chip package structure includes a bottom plate 1 and a cover plate 2 that are made of ceramic and are fastened to each other, a first groove 11 is formed in the bottom plate 1, a second groove 21 is formed in the cover plate 2, the first groove 11 and the second groove 21 relatively enclose an accommodating cavity 3 of a lead frame 10, the lead frame 10 is located in the second groove 21, the lead frame 10 includes a chip 101 and a lead 102, the lead 102 in the accommodating cavity 3 is electrically connected to the chip 101 through a bonding wire 103, a lead portion 1021 of the lead 102 extends out from between the bottom plate 1 and the cover plate 2, a first low-temperature glass layer 4 is hermetically filled between the lead 102 and the bottom plate 1 along an edge of the first groove 11, a second low-temperature glass layer 5 is filled between the lead 102 and the cover plate 2 along a sealing edge of the second groove 21, and an end side 1022 of the lead 102 located in the accommodating cavity 3 is attached to a groove wall 111 of the first groove 11 and bent downward; the lead 1011 of the first lead 101 led out from the chip 101 is a first lead part, a bump 1012 is arranged on the first lead part, the lead is a number 1 lead, and the number of the rest leads increases in a counterclockwise manner, so that 14 leads are provided.
In this embodiment, the width of the leads is 0.25mm, the distance between adjacent leads is 0.65mm, the package size is smaller than that of a surface-mounted 14-wire casing with a lead distance of 1.27mm, the required mounting area on the circuit board is less than half of the required mounting area, and the mounting density of the integrated circuit components on the circuit board can be further improved. And meanwhile, when the chip is detached from the circuit board, the end side of the lead wire positioned in the accommodating cavity is attached to the groove wall of the first groove and is bent downwards, so that the lead wire is not easy to fall off, and the stability of the bonding wire mounting structure is further ensured.
The above only be the embodiment of the utility model discloses a not consequently restriction the patent scope of the utility model, all utilize the equivalent flow transform that the content of the specification was made, or direct or indirect application is in other relevant technical field, all including on the same reason the utility model discloses a patent protection within range.
Claims (2)
1. The utility model provides a table pastes formula chip package structure, its bottom plate and the apron of the pottery system including relative lock, first recess has been seted up on the bottom plate, the second recess has been seted up on the apron, first recess with the second recess encloses the holding chamber of synthetic lead frame relatively, the lead frame is located in the second recess, its characterized in that: the lead frame comprises a chip and a lead, the lead in the accommodating cavity is electrically connected with the chip through a bonding wire, a pin part of the lead extends out from between the bottom plate and the cover plate, a first low-temperature glass layer is filled between the lead and the bottom plate along the edge of the first groove in a sealing manner, a second low-temperature glass layer is filled between the lead and the cover plate along the edge of the second groove in a sealing manner, and the end side of the lead in the accommodating cavity is attached to the groove wall of the first groove and is bent downwards.
2. The surface-mount chip package structure according to claim 1, wherein: the first lead part of the lead led out from the chip is a first lead part, and the first lead part is provided with a bulge.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221177709.5U CN217544602U (en) | 2022-05-17 | 2022-05-17 | Surface-mounted chip packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202221177709.5U CN217544602U (en) | 2022-05-17 | 2022-05-17 | Surface-mounted chip packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN217544602U true CN217544602U (en) | 2022-10-04 |
Family
ID=83436445
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202221177709.5U Active CN217544602U (en) | 2022-05-17 | 2022-05-17 | Surface-mounted chip packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN217544602U (en) |
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2022
- 2022-05-17 CN CN202221177709.5U patent/CN217544602U/en active Active
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| GR01 | Patent grant |