CN205177806U - Integrated circuit package does not have lead wire flat pack shell with ceramic four sides - Google Patents
Integrated circuit package does not have lead wire flat pack shell with ceramic four sides Download PDFInfo
- Publication number
- CN205177806U CN205177806U CN201520955447.4U CN201520955447U CN205177806U CN 205177806 U CN205177806 U CN 205177806U CN 201520955447 U CN201520955447 U CN 201520955447U CN 205177806 U CN205177806 U CN 205177806U
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- Prior art keywords
- ceramic
- shell
- lead
- limits
- side wall
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The utility model discloses an integrated circuit package does not have lead wire flat pack shell with ceramic four sides relates to electronic components's encapsulation shell technical field. The shell includes ceramic member and apron, the ceramic member is upper end open -ended container column structure, the apron will the upper end opening of ceramic member is sealed, the ceramic member includes bottom plate and side wall, the interval is provided with a plurality of pin bonded PAD on the inner wall of side wall, the lower surface spaced of shell is provided with a plurality of and introduces the output from other localities, pin bonded PAD in through the side wall respective first connection metal wire be connected with the corresponding output of introducing from other localities. But characteristics such as shell multilayer wiring, high reliability, high gas tightness, preparation technology is ripe, can realize the miniaturization, satisfies the miniaturized encapsulation requirement of jumbo size chip, many PAD bonded.
Description
Technical field
The utility model relates to the package casing technical field of electronic devices and components, particularly relates to a kind of integrated antenna package with ceramic four limits without lead-in wire flat packaging shell.
Background technology
Conventional plastic packaging QFN shell (as shown in Figure 1) is the structure of epoxy molding plastic+support lead (mostly being copper product).Plastic packaging main technique comprises wafer thinning, section, chip attachment, wire bonding, transfer formation, Post RDBMS, deflashing burr, upper scolding tin, cuts the operations such as muscle bends.Its main feature is that technique is simple, with low cost but be generally considered to be non-airtight encapsulation, in the reliabilities such as packaging air tightness, internal heat characteristic, storage, application, there is larger defect.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of integrated antenna package with ceramic four limits without lead-in wire flat packaging shell, described shell can the feature such as multilayer wiring, high reliability, high-air-tightness, mature preparation process, can miniaturization be realized, meet the small-sized encapsulated requirement of large size chip, many PAD bonding.
For solving the problems of the technologies described above, technical solution adopted in the utility model is: a kind of integrated antenna package with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: comprise ceramic member and cover plate, described ceramic member is the Vessel-like structures of upper end open, the upper end open of described ceramic member seals by described cover plate, described ceramic member comprises base plate and side wall, the inwall of described side wall is arranged at intervals with several pin bondings PAD, for being connected by the pin of bonding wire with packed chip, the lower surface interval of described shell be provided with several outer exits, for being connected with the circuit on pcb board, pin bonding PAD is connected with corresponding outer exit by the first respective connection metal line in side wall.
Preferred technical scheme is further: described side wall comprises two continuous print boss structures, first boss is positioned at the outside of described side wall, the height of the first boss is greater than the height of the second boss, described pin bonding PAD is positioned at the upper surface of described second boss, and described first connection metal line is positioned at described first boss.
Preferred technical scheme is further: the upper surface of described base plate is provided with the first metal printing brush layer, for being fixedly connected with packed chip by solder or conducting resinl, is fixed in described shell by described chip.
Preferred technical scheme is further: the lower surface of described shell is also provided with the second metal printing brush layer, described first metal printing brush layer is connected by several second metal contact wires being positioned at base plate with the second metal printing brush layer, and described second metal printing brush layer is used for heat radiation.
Preferred technical scheme is further: described cover plate is welded on described ceramic member by sealing solder.
Further preferred technical scheme is: the making material of described pin bonding PAD, outer exit, the first connection metal line, the second connection metal line, the first metal printing brush layer and the second metal printing brush layer is tungsten.
Preferred technical scheme is further: described outer exit is welded with the circuit on described PCB by solder.
Preferred technical scheme is further: the distance between described outer exit is 0.3mm-1.27mm.
Preferred technical scheme is further: the profile length and width size≤20mm × 20mm of described shell, highly≤8.00mm.
The beneficial effect adopting technique scheme to produce is: (1) described shell achieves device miniaturization, can substitute with plastic packaging QFN original position.(2) packaging air tightness is high, not easily sucks moisture, and air-tightness meets≤5 × 10
-3pacm
3/ s, A4.(3) good environmental adaptability, resistance to corrosion is strong, and can meet salt fog 48h, temperature cycles-65 DEG C-150 DEG C, 100 times, moisture-proof 10 is inferior.(4) Mechanical Reliability is high, can meet constant acceleration 10000g, Y1 direction, 1min.(5) shelf-stable performance is good.(6) applied range, because it has high reliability and high-air-tightness, can be applicable to the fields such as Aeronautics and Astronautics.
Accompanying drawing explanation
Fig. 1 is the sectional structure schematic diagram of the plastic packaging QFN shell of prior art;
Fig. 2 be shell described in the utility model look up structural representation;
Fig. 3 is the plan structure schematic diagram of shell described in the utility model;
Fig. 4 is the mounting structure schematic diagram of shell described in the utility model;
Fig. 5 be in shell described in the utility model ceramic member partly cut open structural representation;
Fig. 6 is the process chart of shell described in the utility model;
Wherein: 1, cover plate 2, base plate 3, pin bonding PAD4, bonding wire 5, packed chip 6, outer exit 7, pcb board 8, first connection metal line 9, first boss 10, second boss 11, first metal printing brush layer 12, solder or conducting resinl 13, second metal printing brush layer 14, second metal contact wires 15, solder 16, first structure sheaf 17, second structure sheaf 18, 3rd structure sheaf 19, finalization area 20, bonding region 21, chip installation area 22, outer casing bottom welding zone 23, moulding compound 24, copper sheet 25, sealing solder.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only a part of embodiment of the present utility model, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Set forth a lot of detail in the following description so that fully understand the utility model, but the utility model can also adopt other to be different from alternate manner described here to implement, those skilled in the art can when doing similar popularization without prejudice to when the utility model intension, and therefore the utility model is by the restriction of following public specific embodiment.
As shown in Figure 2-5, the utility model discloses a kind of integrated antenna package with ceramic four limits without lead-in wire flat packaging shell, described shell comprises ceramic member and cover plate 1, described ceramic member is the Vessel-like structures of upper end open, described cover plate 1 is welded on described ceramic member by sealing solder 25, the upper end open of described ceramic member is sealed.In the utility model embodiment, described side wall comprises two continuous print boss structures, and the first boss 9 is positioned at the outside of described side wall, and the height of the first boss 9 is greater than the height of the second boss 10.Several spaced pin bonding PAD3 are positioned at the upper surface of described second boss 10, and described pin bonding PAD3 is used for being connected by the pin of bonding wire 4 with packed chip 5.
The lower surface interval of described shell be provided with several outer exits 6, pin bonding PAD3 is connected with corresponding outer exit 6 by the first connection metal line 8 respective in side wall that (number of outer exit can be identical or different with the number of pin bonding PAD, generally, the pin bonding PAD of identical function can be connected by many first connection metal lines with same outer exit), outer exit 6 is welded with the circuit on described PCB by solder 15, preferably uses plumber's solder.In the utility model embodiment, described first connection metal line 8 is positioned at described first boss 9, and the distance between described outer exit 6 is 0.3mm-1.27mm, and the spacing between preferred described exit is 0.5mm.
As shown in Figure 4, the upper surface of described base plate 2 is provided with the first metal printing brush layer 11, for being fixedly connected with packed chip 5 by solder or conducting resinl 12, is fixed in described shell by described chip.The lower surface of described shell is also provided with the second metal printing brush layer 13, and described first metal printing brush layer 11 is connected by several second metal contact wires 14 being positioned at base plate 2 with the second metal printing brush layer 13, and described second metal printing brush layer 13 is for heat radiation.
In the utility model embodiment, the making material of described pin bonding PAD3, outer exit 6, first connection metal line 8, second connection metal line 14, first metal printing brush layer 11 and the second metal printing brush layer 13 is for preferably to use tungsten, it is to be noted that those skilled in the art can also according to the performance of device, and needing of using selects other metal material to make above-mentioned device.
As can be seen from Figure 5, the ceramic member on described shell is totally three structure sheafs, and first structure sheaf 16 is from 19 to bonding region, finalization area 20; Second structure sheaf 17 from 20 to chip installation area, bonding region the 21, three structure sheaf 18 from chip installation area 21 to outer casing bottom welding zone 22.For meeting many PAD bonding and the requirement of ground connection bonding of integrated circuit, design specialized ground connection bonding PAD, and design at same layer (second structure sheaf) with other holding wire pin bonding PAD, Bing Xin district designs the second metal contact wires array (tungsten post array), first metal printing brush layer 11 is connected by the second metal contact wires array with the second metal printing brush layer 13, and this design can effectively improve ground connection performance and heat-sinking capability.
It is to be noted, the development trend inevitable requirement microelectronics Packaging of electronic product to less, gentlier, thinner future development, CQFN(CeramicQuadFlatNo-lead) packing forms is one of technical solution and developing direction, due to its there is good electricity and hot property, volume is little, lightweight, reliability is high, its application increases fast.
The current process technology of alumina ceramic envelope conventional in electron trade is ripe, it possesses simultaneously can the feature such as multilayer wiring, high reliability, high-air-tightness, mature preparation process, can realize miniaturization, meets the small-sized encapsulated requirement of large size chip, many PAD bonding, meet the requirement that plastic packaging QFN original position substitutes, exit spacing 0.307mm-1.27mm, draws terminal number≤100, profile length and width size≤20mm × 20mm, highly≤8.00mm, embodies the superiority of ceramic package.
The reliability aspect requirements such as air-tightness, internal heat characteristic, storage, application can not be met due to plastic packaging QFN package lead, and be difficult to meet the high reliability such as Aeronautics and Astronautics, high-air-tightness application requirement, therefore design this structural ceramics shell.
This type of shell comprises full ceramic structure or pottery+seal mouth ring structure, according to user profile, determines cavity size; Distribute and bonding requirement according to chip PAD, determine pin bonding PAD and the arrangement of outer exit; According to device performance and cooling requirements, determine the second metal contact wires array (tungsten post array) quantity, spacing and length etc.; According to slew rate requirement, determine input/output port and internal wiring thereof, carry out finite element simulation on this basis, ensure that it meets structural reliability, heat and requirement on electric performance, the manufacture craft of described shell as shown in Figure 6.
To sum up, described shell tool has the following advantages: (1) described shell achieves device miniaturization, can substitute with plastic packaging QFN original position.(2) packaging air tightness is high, not easily sucks moisture, and air-tightness meets≤5 × 10
-3pacm
3/ s, A4.(3) good environmental adaptability, resistance to corrosion is strong, and can meet salt fog 48h, temperature cycles-65 DEG C-150 DEG C, 100 times, moisture-proof 10 is inferior.(4) Mechanical Reliability is high, can meet constant acceleration 10000g, Y1 direction, 1min.(5) shelf-stable performance is good.(6) applied range, because it has high reliability and high-air-tightness, can be applicable to the fields such as Aeronautics and Astronautics.
Claims (9)
1. an integrated antenna package with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: comprise ceramic member and cover plate (1), described ceramic member is the Vessel-like structures of upper end open, the upper end open of described ceramic member seals by described cover plate (1), described ceramic member comprises base plate (2) and side wall, the inwall of described side wall is arranged at intervals with several pin bondings PAD(3), for being connected with the pin of packed chip (5) by bonding wire (4), the lower surface interval of described shell be provided with several outer exits (6), for being connected with the circuit on pcb board (7), pin bonding PAD(3) be connected with corresponding outer exit (6) by the first connection metal line (8) respective in side wall.
2. integrated antenna package as claimed in claim 1 with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: described side wall comprises two continuous print boss structures, first boss (9) is positioned at the outside of described side wall, the height of the first boss (9) is greater than the height of the second boss (10), described pin bonding PAD(3) be positioned at the upper surface of described second boss (10), described first connection metal line (8) is positioned at described first boss (9).
3. integrated antenna package as claimed in claim 1 with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: the upper surface of described base plate (2) is provided with the first metal printing brush layer (11), for being fixedly connected with packed chip (5) by solder or conducting resinl (12), described chip is fixed in described shell.
4. integrated antenna package as claimed in claim 3 with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: the lower surface of described shell is also provided with the second metal printing brush layer (13), described first metal printing brush layer (11) is connected by several second metal contact wires (14) being positioned at base plate (2) with the second metal printing brush layer (13), and described second metal printing brush layer (13) is for heat radiation.
5. integrated antenna package as claimed in claim 1 is with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: described cover plate (1) is welded on described ceramic member by sealing solder (25).
6. integrated antenna package as claimed in claim 1 is with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: described pin bonding PAD(3), the making material of outer exit (6), the first connection metal line (8), the second connection metal line (14), the first metal printing brush layer (11) and the second metal printing brush layer (13) is tungsten.
7. integrated antenna package as claimed in claim 1 is with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: described outer exit (6) is welded with the circuit on described PCB by solder (15).
8. integrated antenna package as claimed in claim 1 is with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: the distance between described outer exit (6) is 0.3mm-1.27mm.
9. integrated antenna package as claimed in claim 1 is with ceramic four limits without lead-in wire flat packaging shell, it is characterized in that: the profile length and width size≤20mm × 20mm of described shell, highly≤8.00mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520955447.4U CN205177806U (en) | 2015-11-26 | 2015-11-26 | Integrated circuit package does not have lead wire flat pack shell with ceramic four sides |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520955447.4U CN205177806U (en) | 2015-11-26 | 2015-11-26 | Integrated circuit package does not have lead wire flat pack shell with ceramic four sides |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205177806U true CN205177806U (en) | 2016-04-20 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520955447.4U Active CN205177806U (en) | 2015-11-26 | 2015-11-26 | Integrated circuit package does not have lead wire flat pack shell with ceramic four sides |
Country Status (1)
| Country | Link |
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| CN (1) | CN205177806U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105374759A (en) * | 2015-11-26 | 2016-03-02 | 中国电子科技集团公司第十三研究所 | Ceramic quadrilateral leadless flat packaging shell used for integrated circuit packaging |
| CN105870071A (en) * | 2016-06-28 | 2016-08-17 | 中国电子科技集团公司第十三研究所 | Aluminum nitride multilayer-ceramic leadless-periphery flat packaging shell |
-
2015
- 2015-11-26 CN CN201520955447.4U patent/CN205177806U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105374759A (en) * | 2015-11-26 | 2016-03-02 | 中国电子科技集团公司第十三研究所 | Ceramic quadrilateral leadless flat packaging shell used for integrated circuit packaging |
| CN105870071A (en) * | 2016-06-28 | 2016-08-17 | 中国电子科技集团公司第十三研究所 | Aluminum nitride multilayer-ceramic leadless-periphery flat packaging shell |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |