SUMMERY OF THE UTILITY MODEL
The utility model aims at solving the problem that exists among the background art, provide a back passivation contact structure's HBC solar cell.
In order to solve the technical problem, the utility model provides a technical scheme does: the HBC solar cell with the back passivation contact structure comprises a crystalline silicon substrate, wherein the front surface of the crystalline silicon substrate comprises at least one front passivation layer from inside to outside, and the back surface of the crystalline silicon substrate respectively comprises a tunneling oxide layer, n + doped polycrystalline silicon layers, p + doped polycrystalline silicon layers, a back passivation layer, a laser grooving region and a negative electrode/positive electrode from inside to outside.
Preferably, the crystalline silicon substrate is one of N-type monocrystalline silicon and P-type monocrystalline silicon.
Preferably, the tunneling oxide layer is 1-2nm thick.
As a preferable scheme, the thickness of the n + doped polysilicon layer is 30-140nm, and the thickness of the p + doped polysilicon layer is 30-140 nm.
Preferably, the front passivation layer is one of a SiO2 layer and an AlOx layer, and any one of a SiONx layer and a SiNx layer is superposed, so that the total thickness is 75-100nm, and the refractive index is 1.7-2.4.
Preferably, the back passivation layer is one or a combination of two of a SiONx layer and SiNx layer, the thickness is 70-100nm, and the refractive index is 1.7-2.4.
As a preferable scheme, the laser grooving region is formed by removing the middle back passivation layer and the polysilicon layer and reserving the tunneling oxide layer, and the grooving width is 0.01-200 μm.
The utility model has the advantages of as follows: the back surface adopts a TOPCon back surface passivation structure, so that the field passivation effect of a back surface emitting layer and a back surface field layer of the HBC battery can be improved, the short-circuit current density and the open voltage of the battery are improved, and the series resistance is reduced, so that the conversion efficiency of the battery is improved; diffusion mask equipment is not needed, and the process flow is simplified; the whole high-temperature treatment is not needed, and the high-temperature lattice defect and the impurity defect are avoided; the side surface of the crystalline silicon is not doped, so that edge insulation is not needed; the whole set of process equipment is relatively simple, does not generate toxic substances and is beneficial to environmental protection.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. The components of embodiments of the present invention, as generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present invention, presented in the accompanying drawings, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the embodiments of the present invention, it should be noted that, if the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicate the position or positional relationship based on the position or positional relationship shown in the drawings, or the position or positional relationship which is usually placed when the product of the present invention is used, the description is only for convenience of description of the present invention and simplification, but the indication or suggestion that the device or element to be referred must have a specific position, be constructed and operated in a specific position, and therefore, the present invention should not be construed as being limited thereto. Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
Furthermore, the terms "horizontal", "vertical", "overhang" and the like do not require that the components be absolutely horizontal or overhang, but may be slightly inclined. For example, "horizontal" merely means that the direction is more horizontal than "vertical" and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.
In the description of the embodiments of the present invention, "a plurality" means at least 2.
In the description of the embodiments of the present invention, it should be further noted that unless explicitly stated or limited otherwise, the terms "disposed," "mounted," "connected," and "connected" should be interpreted broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood according to specific situations by those skilled in the art.
The technical solution of the present invention will be described in further detail with reference to the accompanying drawings, and it should be noted that the detailed description is only for describing the present invention, and should not be construed as limiting the present invention.
The HBC solar cell with the back passivation contact structure comprises a crystalline silicon substrate 10, wherein the front surface of the crystalline silicon substrate 10 comprises at least one front passivation layer 11 from inside to outside, and the back surface of the crystalline silicon substrate 10 respectively comprises a tunneling oxide layer 20, n + doped polycrystalline silicon layers 30, p + doped polycrystalline silicon layers 40, a back passivation layer 60, a laser grooving region 50, a negative electrode 80 and a positive electrode 70 from inside to outside.
As a preferred embodiment of this embodiment, the crystalline silicon substrate is one of N-type monocrystalline silicon and P-type monocrystalline silicon.
As a preferred embodiment of this embodiment, the tunnel oxide layer has a thickness of 1 to 2 nm.
As a preferred embodiment of this embodiment, the thickness of the n + doped polysilicon layer is 30-140nm, and the thickness of the p + doped polysilicon layer is 30-140 nm.
As a preferred embodiment of this embodiment, the front passivation layer is one of a SiO2 layer and an AlOx layer, and is stacked with any one of a sion layer and a SiNx layer, and has a total thickness of 75-100nm and a refractive index of 1.7-2.4.
As a preferred embodiment of this embodiment, the back passivation layer is one or a combination of two of a sion x layer and a SiNx layer, the thickness is 70-100nm, and the refractive index is 1.7-2.4.
As a preferred embodiment of this embodiment, the laser trench opening region is formed by removing the middle passivation layer and the polysilicon layer on the back surface and leaving the tunnel oxide layer, and the trench opening width is 0.01-200 μm.
The structure is shown in fig. 1, and the specific implementation mode is as follows:
example one
As shown in fig. 1, a method for preparing a HBC solar cell with a passivated contact structure on the back side comprises the following steps:
s1: putting the silicon wafer into 2-10% alkaline solution for double-side polishing to obtain a polished surface with the reflectivity of more than 30%;
s2: growing a tunneling oxide layer on the back surface of the N-type polished wafer, keeping the pressure at 15-100Kpa and the temperature at 550-700 ℃, introducing oxygen to prepare silicon oxide with the thickness of 1.2nm, producing an intrinsic amorphous silicon layer on the outer surface of the tunneling oxide layer, keeping the pressure at 30-80pa and the temperature at 550-600 ℃, and introducing silane to prepare the intrinsic amorphous silicon layer with the thickness of 110 nm;
s3: cleaning a silicon wafer and manufacturing a texture surface, wherein a mixed solution of hydrogen peroxide, deionized water, an additive and sodium hydroxide is used as a solution to manufacture a pyramid texture surface with the reflectivity of 10%;
s4: growing a silicon oxide passivation layer on the texturing surface of the front surface of the N-type polished wafer, keeping the pressure at 15-100Kpa and the temperature at 600-700 ℃, introducing oxygen to prepare silicon oxide with the thickness of 6-10nm, and simultaneously ensuring that the intrinsic amorphous silicon layer on the back surface is annealed and crystallized to form a polycrystalline silicon layer;
s5: printing boron slurry on the back polysilicon layer, wherein the printing pattern is consistent with the pattern of the p + area mesh plate of the metallized electrode, drying for 0.5-5min at 50-500 ℃, printing phosphorus slurry on the back polysilicon layer, wherein the printing pattern is consistent with the pattern of the n + area mesh plate of the metallized electrode, and drying for 0.5-5min at 50-500 ℃;
s6: putting the printed silicon wafer into a laser to realize laser doping to obtain a p + region and a n + region which need to reach a square resistance value, wherein the p + region has 80-100 ohms, and the n + region has 20-40 ohms; specifically, the sheet resistance is debugged by changing the laser power and the laser frequency;
s7: cleaning residual boron slurry and phosphorus slurry on the surface of the silicon wafer doped with the p + region and the n + region by using a solution of IPA (isopropyl alcohol) -DI water in a volume ratio of 1:1 by using an ultrasonic container device;
s8: adopting PECVD (plasma enhanced chemical vapor deposition), plating antireflection films on the front surface and the back surface of the crystalline silicon substrate, making two layers of silicon nitride layer films on the front surface into different refractive indexes, introducing ammonia gas and silane, wherein the deposition temperature is about 450 ℃, and the flow ratio of the ammonia gas to the silane of the high-refractive-index film layer is 4-5: 1, the flow ratio of ammonia gas to silane of the low-folding film layer is 8-10: 1, controlling the total thickness of two layers of films to be 75-85 nm; the flow ratio of ammonia gas to silane of the back silicon nitride layer film low-folding film layer is 8-10: 1, controlling the film thickness to be 80-90 nm;
s9: laser grooving, namely grooving and isolating the middle area of a p + area/n + area on the back surface of the crystalline silicon substrate;
s10: printing an electrode in a p + region and drying; printing an electrode in the n + region and drying; and putting the obtained printed silicon wafer into a laser sintering device for laser sintering to form a positive electrode/a negative electrode.
Example two
As shown in fig. 1, a method for preparing a HBC solar cell with a passivated contact structure on the back side comprises the following steps:
s1: putting the silicon wafer into 2-10% alkaline solution for double-side polishing to obtain a polished surface with the reflectivity of more than 30%;
s2: growing a tunneling oxide layer on the back surface of the N-type polished wafer, keeping the pressure at 15-100Kpa and the temperature at 550-700 ℃, introducing oxygen to prepare silicon oxide with the thickness of 1.2nm, producing an intrinsic amorphous silicon layer on the outer surface of the tunneling oxide layer, keeping the pressure at 30-80pa and the temperature at 550-600 ℃, and introducing silane to prepare the intrinsic amorphous silicon layer with the thickness of 110 nm;
s3: cleaning a silicon wafer and manufacturing a texture surface, wherein a mixed solution of hydrogen peroxide, deionized water, an additive and sodium hydroxide is used as a solution to manufacture a pyramid texture surface with the reflectivity of 10%;
s4: printing boron slurry on the back amorphous silicon layer, wherein the printing pattern is consistent with the pattern of the p + area mesh plate of the metallized electrode and is dried for 0.5-5min at the temperature of 50-500 ℃, printing phosphorus slurry on the back amorphous silicon layer, wherein the printing pattern is consistent with the pattern of the n + area mesh plate of the metallized electrode and is dried for 0.5-5min at the temperature of 50-500 ℃;
s5: putting the printed silicon wafer into a laser to realize laser doping, and obtaining the square resistance values required to be reached by a p + region and an n + region, wherein the p + region has 80-100 ohms, and the n + region has 20-40 ohms; specifically, the sheet resistance is debugged by changing the laser power and the laser frequency;
s6: cleaning residual boron slurry and phosphorus slurry on the surface of the silicon wafer doped with the p + region and the n + region by using a solution of IPA (isopropyl alcohol) -DI water in a volume ratio of 1:1 by using an ultrasonic container device;
s7: growing a silicon oxide passivation layer on the texturing surface on the front surface of the N-type polished wafer, keeping the pressure at 15-100Kpa and the temperature at 600-700 ℃, introducing oxygen to prepare silicon oxide with the thickness of 6-10nm, and simultaneously ensuring that the back N + doped/p + doped amorphous silicon layer is annealed and crystallized to form a polycrystalline silicon layer;
s8: adopting PECVD (plasma enhanced chemical vapor deposition), plating antireflection films on the front surface and the back surface of the crystalline silicon substrate, making two layers of silicon nitride layer films on the front surface into different refractive indexes, introducing ammonia gas and silane, wherein the deposition temperature is about 450 ℃, and the flow ratio of the ammonia gas to the silane of the high-refractive-index film layer is 4-5: 1, the flow ratio of ammonia gas to silane of the low-folding film layer is 8-10: 1, controlling the total thickness of two layers of films to be 75-85 nm; the flow ratio of ammonia gas to silane of the back silicon nitride layer film low-folding film layer is 8-10: 1, controlling the film thickness to be 80-90 nm;
s9: laser grooving, namely grooving and isolating the middle area of a p + area/n + area on the back surface of the crystalline silicon substrate;
s10: printing an electrode in a p + region and drying; printing an electrode in the n + region and drying; and putting the obtained printed silicon wafer into a laser sintering device for laser sintering to form a positive electrode/a negative electrode.
In conclusion, compared with the prior art, the utility model discloses TOPCon back passivation structure is adopted at the back, can promote HBC battery back emission layer and back field layer field passivation effect, promotes the short-circuit current density and the open-circuit voltage of battery, reduces series resistance to promote battery conversion efficiency, adopt laser doping technology to replace high temperature diffusion technology, can realize different doping forms, restriction doping in order to reach highly localized structure; diffusion mask equipment is not needed, and the process flow is simplified; the integral high-temperature treatment is not needed, so that the high-temperature lattice defect and the impurity defect are avoided; and the side surface of the crystalline silicon is not doped, so that edge insulation is not needed; the whole set of process equipment is relatively simple, does not generate toxic substances and is beneficial to environmental protection.
The above-mentioned embodiments only express one embodiment of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the utility model. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application.