CN111029441A - Grid line passivation contact PERC solar cell and preparation method thereof - Google Patents
Grid line passivation contact PERC solar cell and preparation method thereof Download PDFInfo
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- 102100028961 Peroxisome proliferator-activated receptor gamma coactivator 1-beta Human genes 0.000 title claims abstract description 26
- 238000002360 preparation method Methods 0.000 title claims abstract description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 101
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 101
- 239000010703 silicon Substances 0.000 claims abstract description 101
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 24
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 24
- 239000011574 phosphorus Substances 0.000 claims abstract description 24
- 238000005530 etching Methods 0.000 claims abstract description 18
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims abstract description 12
- 238000005245 sintering Methods 0.000 claims abstract description 12
- 238000010301 surface-oxidation reaction Methods 0.000 claims abstract description 9
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 claims abstract description 8
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims abstract description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 6
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims abstract description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 6
- 230000001590 oxidative effect Effects 0.000 claims abstract description 5
- 229910000073 phosphorus hydride Inorganic materials 0.000 claims abstract description 4
- 229910000077 silane Inorganic materials 0.000 claims abstract description 4
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims abstract description 3
- 239000002002 slurry Substances 0.000 claims abstract description 3
- 235000012431 wafers Nutrition 0.000 claims description 78
- 238000009792 diffusion process Methods 0.000 claims description 23
- 238000004140 cleaning Methods 0.000 claims description 21
- 230000003647 oxidation Effects 0.000 claims description 19
- 238000007254 oxidation reaction Methods 0.000 claims description 19
- 229910004205 SiNX Inorganic materials 0.000 claims description 16
- 238000001035 drying Methods 0.000 claims description 15
- 238000000034 method Methods 0.000 claims description 15
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 15
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 11
- 229910052709 silver Inorganic materials 0.000 claims description 11
- 239000004332 silver Substances 0.000 claims description 11
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 10
- 229910052593 corundum Inorganic materials 0.000 claims description 10
- 230000018044 dehydration Effects 0.000 claims description 10
- 238000006297 dehydration reaction Methods 0.000 claims description 10
- 238000005406 washing Methods 0.000 claims description 10
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 10
- 238000002310 reflectometry Methods 0.000 claims description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- XHXFXVLFKHQFAL-UHFFFAOYSA-N phosphoryl trichloride Chemical compound ClP(Cl)(Cl)=O XHXFXVLFKHQFAL-UHFFFAOYSA-N 0.000 claims description 8
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 7
- 238000006243 chemical reaction Methods 0.000 claims description 7
- 229910017604 nitric acid Inorganic materials 0.000 claims description 7
- 229910021426 porous silicon Inorganic materials 0.000 claims description 7
- 239000011521 glass Substances 0.000 claims description 6
- 230000000694 effects Effects 0.000 claims description 5
- 238000001039 wet etching Methods 0.000 claims description 5
- 239000002253 acid Substances 0.000 claims description 4
- 239000000654 additive Substances 0.000 claims description 4
- 238000007605 air drying Methods 0.000 claims description 4
- 239000003513 alkali Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 239000012159 carrier gas Substances 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 238000010079 rubber tapping Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 4
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 claims description 4
- HIVGXUNKSAJJDN-UHFFFAOYSA-N [Si].[P] Chemical compound [Si].[P] HIVGXUNKSAJJDN-UHFFFAOYSA-N 0.000 claims description 3
- 230000000996 additive effect Effects 0.000 claims description 3
- 239000002585 base Substances 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims description 3
- 239000011259 mixed solution Substances 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims description 2
- 239000000126 substance Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 abstract description 10
- 239000002184 metal Substances 0.000 abstract description 10
- 238000005215 recombination Methods 0.000 abstract description 5
- 230000006798 recombination Effects 0.000 abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
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- 229910052755 nonmetal Inorganic materials 0.000 description 2
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- 238000005516 engineering process Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic Table
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/206—Particular processes or apparatus for continuous treatment of the devices, e.g. roll-to roll processes, multi-chamber deposition
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/208—Particular post-treatment of the devices, e.g. annealing, short-circuit elimination
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
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Abstract
The scheme discloses a preparation method of a grid line passivation contact PERC solar cell in the field of solar cells, which comprises the following steps: step one, texturing, step two, diffusing; step three, etching; step four, surface oxidation; step five, preparing a phosphorus heavily doped amorphous silicon layer: preparing an N-type amorphous silicon layer with the thickness of 30-300 nm on the surface of a silicon wafer by adopting a mode of phosphine and silane LPCVD (low pressure chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition); step six, printing; seventhly, removing ink and etching; step eight, oxidizing; step nine, preparing a passivation structure: preparing an aluminum oxide and silicon nitride laminated passivation structure on the back side of the silicon wafer, and preparing a silicon nitride passivation structure on the front side of the silicon wafer; step ten, hole opening, step eleven and printing: and printing slurry on the back and the front of the silicon wafer, and sintering to obtain a finished product, namely the grid line passivation contact PERC solar cell. The metal recombination that the positive metal grid line contact of PERC battery brought has been reduced to this application, has increased open circuit voltage and fill factor, has increased short-circuit current.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a grid line passivation contact PERC solar cell and a preparation method thereof.
Background
The solar cell is a device for directly converting light energy into electric energy based on a photovoltaic effect, scientists continuously optimize passivation and contact in order to realize higher conversion efficiency of the solar cell, however, for the solar cell, passivation and contact are hardly compatible, and as for realizing good passivation, the area of metal contact needs to be reduced, the series resistance is inevitably increased, and good contact is realized, and the area of metal contact is inevitably larger, so that the composite current of the solar cell is larger. In order to achieve both passivation and contact, a passivation contact technique using quantum tunneling has been developed. The passivation contact technology has the defects that the amorphous silicon or the polycrystalline silicon layer is used as a contact layer, the light absorption coefficient is too large, the current loss is too much when the amorphous silicon or the polycrystalline silicon layer is used on the front surface, the open-circuit voltage (Uoc) of the battery is low, the short-circuit current (Isc) is low, and the conversion efficiency is not remarkably improved.
Disclosure of Invention
The invention aims to provide a grid line passivation contact PERC solar cell and a preparation method thereof, which are capable of simultaneously realizing passivation and contact, avoiding a large-area polycrystalline silicon layer, improving short-circuit current and open-circuit voltage and improving the conversion efficiency of the cell.
The preparation method of the grid line passivation contact PERC solar cell comprises the following steps:
step one, texturing: preparing a pyramid texture surface on a silicon wafer of a P-type silicon substrate by adopting an alkali texture surface making mode;
step two, diffusion: preparing a PN junction on a silicon wafer by adopting a diffusion mode;
step three, etching: removing PSG from the silicon wafer and etching the back surface, wherein the reflectivity of the back surface of the silicon wafer is controlled to be 20-40%;
step four, surface oxidation: preparing an oxidation film with the thickness of 1-4 nm on the surface of the pyramid texture;
step five, preparing a phosphorus heavily doped amorphous silicon layer: preparing an N-type amorphous silicon layer with the thickness of 30-300 nm on the surface of a silicon wafer by adopting a mode of phosphine and silane LPCVD (low pressure chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition);
step six, printing: printing ink etching-resistant material on the silicon chip, wherein the printed pattern is consistent with the pattern of the grid line on the silicon chip;
seventhly, removing ink etching: etching off the amorphous silicon layer of the non-ink blocking area on the silicon chip, adopting a wet etching mode, and then cleaning and removing the ink;
step eight, oxidation: oxidizing and annealing the front side of the silicon wafer again;
step nine, preparing a passivation structure: preparing an aluminum oxide and silicon nitride laminated passivation structure on the back side of the silicon wafer, and preparing a silicon nitride passivation structure on the front side of the silicon wafer;
step ten, hole opening: carrying out laser tapping on the back of the silicon wafer;
step eleven, printing: and printing slurry on the back and the front of the silicon wafer, and sintering to obtain a finished product, namely the grid line passivation contact PERC solar cell.
Has the advantages that: according to the invention, on one hand, the metal contact area effectively reduces metal recombination by utilizing amorphous silicon contact, and on the other hand, amorphous silicon is removed from the nonmetal contact area, so that the strong absorption of the amorphous silicon to light is reduced, and the short-circuit current is improved; the two points can effectively improve the metal recombination of the conventional PERC battery and the optical loss of amorphous silicon.
The method further comprises the steps of ① KOH rough polishing to remove damage layers and impurities on the surfaces of the silicon wafers, ② KOH + H2O2 cleaning to remove organic residues on the surfaces of the silicon wafers, ③ KOH + additives to prepare pyramid microstructure suede on the surfaces of the silicon wafers, ④ KOH + H2O2 cleaning to remove reaction residues, ⑤ HF cleaning to remove an oxidation layer and increase the dehydration performance of the silicon wafers, ⑥ water cleaning, slow lifting and drying to finally form the silicon wafer surface with the reflectivity of 10-13%, the damage layers can be removed to effectively reduce the composite current of the damage layers, and the pyramid structure can effectively reduce the reflectivity and improve the current.
Further, the second step is phosphorus diffusion, and under the condition that nitrogen is used as a carrier gas and phosphorus oxychloride is used as a phosphorus source, the phosphorus source is diffused on the surface of the silicon wafer, so that the square resistance is 70-180 omega/square meter.
Further, the third step comprises the operation steps of covering a water film on the surface of ① silicon wafer with the diffusion surface facing upwards, then passing through a mixed acid tank of HNO3+ HF, removing the phosphorus diffusion layer on the front surface and the edge due to the covering effect of a back water film, preserving the phosphorus diffusion layer on the front surface, ② passing through a KOH tank, removing the porous silicon on the front surface, passing ③ through an HF tank, removing the phosphorosilicate glass layer on the back surface and the oxide layer on the front surface, increasing the dehydration property, ④ washing with water and air drying, and finally obtaining the back surface with the reflectivity of 30-38%.
Further, the fourth surface oxidation adopts a high-temperature thermal oxidation mode, and an oxidation layer with the diameter of 1-4 nm is prepared on the surface or a high-temperature HON3 solution chemical oxidation method is used for preparing the oxidation layer with the diameter of 1-4 nm.
Further, the wet etching comprises the steps of ① removing the amorphous silicon layer which is not covered by the printing ink by using a mixed solution of HF with the concentration of 6-20% and HNO3 with the concentration of 6-20%, ② cleaning the printing ink on the surface and removing porous silicon on the surface by using weak base with the concentration of 1-5%, ③ cleaning the surface by using HF with the concentration of 1-6% to enable the surface to have dehydration, ④ washing and drying.
And further, annealing and oxidizing in the step eight, namely annealing at 750-880 ℃, and preparing an oxide layer with the surface of 1-4 nm.
Further, the back passivation layer and the antireflection layer are prepared by forming an Al2O3 passivation layer on the surface of the back of the silicon wafer in a plasma discharge mode of trimethyl aluminum TMA and N2O, or reacting TMA with H2O to form an Al2O3 passivation layer on the surface of the silicon wafer, wherein the thickness of the formed Al2O3 passivation layer is 4-25 nm; then, forming a SiNx layer on the back surface by using SiH4 and NH3 under the plasma discharge condition, wherein the SiNx layer is 55-85 nm thick; the front antireflection layer is a SiNx layer formed on the back surface by using SiH4 and NH3 under the condition of plasma discharge, and the thickness of the SiNx layer is 70-87 nm.
Further, the printing and sintering processes include printing a back silver paste on the back side of an ① silicon wafer, drying, printing an aluminum paste, drying again, printing a silver paste on the front side of a ② silicon wafer, drying after the silver paste pattern is consistent with the pattern printed on the front side, conveying the ③ silicon wafer to a sintering furnace, heating to 700-900 ℃, sintering, and obtaining a finished product.
A PERC solar cell prepared by the preparation method of a grid line passivation contact PERC solar cell.
Detailed Description
The following is further detailed by the specific embodiments:
example 1: a preparation method of a grid line passivation contact PERC solar cell comprises the following steps:
firstly, texture surface preparation, namely preparing pyramid texture surface on a silicon wafer of a P-type silicon substrate in an alkali texture surface preparation mode, wherein the texture surface preparation step comprises ① KOH rough polishing to remove damage layers and impurities on the surface of the silicon wafer, ② KOH + H2O2 cleaning to remove organic residues on the surface of the silicon wafer, ③ KOH + additive to prepare pyramid microstructure texture surface on the surface of the silicon wafer, ④ KOH + H2O2 cleaning to remove reaction residues, ⑤ HF cleaning to remove an oxidation layer to increase the dehydration property of the silicon wafer, ⑥ water washing, slow lifting and drying, and the reflectivity of the finally formed surface of the silicon wafer is 12%.
Step two, diffusion: the PN junction is prepared on the silicon chip by adopting a phosphorus diffusion mode, namely under the condition that nitrogen is used as carrier gas and phosphorus oxychloride is used as a phosphorus source, the phosphorus source is diffused on the surface of the silicon chip, and the formed square resistance is 170 omega/square meter.
And step three, etching, namely removing PSG (patterned silicon glass) of the silicon wafer and etching the back, wherein the operation steps comprise that ① the diffusion surface of the silicon wafer faces upwards, a layer of water film is covered on the surface of the silicon wafer, then the silicon wafer passes through an HNO3+ HF mixed acid tank, phosphorus diffusion layers on the front surface and the edge are removed due to the covering effect of the water film on the back surface, the phosphorus diffusion layer on the front surface is preserved, ② porous silicon on the front surface is removed through a KOH tank, ③ the phosphorus-silicon glass layer on the back surface and the oxide layer on the front surface are removed through an HF tank, the dehydration property is increased, ④ water washing and air drying are carried out, and.
Step four, surface oxidation: and preparing an oxide film with the thickness of 3nm on the surface of the pyramid texture, namely preparing an oxide layer with the thickness of 3nm on the surface by adopting a high-temperature thermal oxidation mode for surface oxidation.
Step five, preparing a phosphorus heavily doped amorphous silicon layer: preparing an N-type amorphous silicon layer with the thickness of 200nm on the surface of a silicon wafer by adopting a mode of codeposition of phosphine and silane LPCVD;
step six, printing: printing ink etching-blocking materials on the silicon chip, wherein the printing ink etching-blocking materials are resin, and the printing patterns are consistent with the patterns of the grid lines on the silicon chip;
step seven, ink removing etching, namely etching off the amorphous silicon layer in the non-ink blocking area on the silicon chip, and cleaning and removing the ink in a wet etching mode, wherein ① uses a mixed solution of HF and HNO3 to remove the amorphous silicon layer which is not covered by the ink, ② uses weak base to clean the ink on the surface and remove the porous silicon on the surface, 3) the surface is dehydrated through HF cleaning, and 4) washing and drying are carried out.
Step eight, oxidation: annealing the front side of the silicon wafer at 750 ℃ and preparing an oxide layer with the thickness of 1nm on the surface;
step nine, preparing a passivation structure: preparing a passivation layer and an antireflection layer on the back surface of the silicon wafer, wherein an Al2O3 passivation layer is formed on the surface of the back surface of the silicon wafer in a plasma discharge mode of trimethyl aluminum TMA and N2O, and the thickness of the formed Al2O3 passivation layer is 14 nm; then, SiH4 and NH3 are used for forming a SiNx layer on the back surface under the plasma discharge condition, and the thickness of the SiNx layer is 70 nm; the front antireflection layer is a SiNx layer formed on the front surface by using SiH4 and NH3 under the condition of plasma discharge, and the SiNx thickness is 78 nm.
Step ten, hole opening: carrying out laser tapping on the back of the silicon wafer;
printing, namely printing back silver paste on the back of the silicon wafer, drying, printing aluminum paste, drying again, printing silver paste on the front of ② silicon wafer, wherein the pattern of the silver paste is required to be consistent with the pattern printed on the front, drying, conveying ③ silicon wafer to a sintering furnace, heating to 800 ℃, sintering at high temperature, and obtaining the finished product, namely the grid line passivated contact PERC solar cell.
Comparative example:
firstly, texture surface preparation, namely preparing pyramid texture surface on a silicon wafer of a P-type silicon substrate in an alkali texture surface preparation mode, wherein the texture surface preparation step comprises ① KOH rough polishing to remove damage layers and impurities on the surface of the silicon wafer, ② KOH + H2O2 cleaning to remove organic residues on the surface of the silicon wafer, ③ KOH + additive to prepare pyramid microstructure texture surface on the surface of the silicon wafer, ④ KOH + H2O2 cleaning to remove reaction residues, ⑤ HF cleaning to remove an oxidation layer to increase the dehydration property of the silicon wafer, ⑥ water washing, slow lifting and drying, and the reflectivity of the finally formed surface of the silicon wafer is 11%.
Step two, diffusion: the PN junction is prepared on the silicon chip by adopting a phosphorus diffusion mode, namely under the condition that nitrogen is used as carrier gas and phosphorus oxychloride is used as a phosphorus source, the phosphorus source is diffused on the surface of the silicon chip, and the formed square resistance is 90 omega/square meter.
And step three, etching, namely removing PSG (patterned silicon glass) of the silicon wafer and etching the back, wherein the operation steps comprise that ① the diffusion surface of the silicon wafer faces upwards, a layer of water film is covered on the surface of the silicon wafer, then the silicon wafer passes through an HNO3+ HF mixed acid tank, phosphorus diffusion layers on the front surface and the edge are removed due to the covering effect of the water film on the back surface, the phosphorus diffusion layer on the front surface is preserved, ② porous silicon on the front surface is removed through a KOH tank, ③ the phosphorus-silicon glass layer on the back surface and the oxide layer on the front surface are removed through an HF tank, the dehydration property is increased, ④ water washing and air drying are carried out, and.
Step four, surface oxidation: and preparing an oxidation film with the thickness of 4nm on the surface of the pyramid texture, namely preparing an oxidation layer with the thickness of 4nm on the surface by adopting a high-temperature thermal oxidation mode for surface oxidation.
Step five, preparing a passivation structure: preparing a passivation layer and an antireflection layer on the back surface of the silicon wafer, wherein an Al2O3 passivation layer is formed on the surface of the back surface of the silicon wafer in a plasma discharge mode of trimethyl aluminum TMA and N2O, and the thickness of the formed Al2O3 passivation layer is 25 nm; then, SiH4 and NH3 are used for forming a SiNx layer on the back surface under the plasma discharge condition, and the thickness of the SiNx layer is 85 nm; the front antireflection layer is a SiNx layer formed on the back surface by using SiH4 and NH3 under the condition of plasma discharge, and the SiNx thickness is 87 nm.
Step six, hole opening: carrying out laser tapping on the back of the silicon wafer;
and seventhly, printing, namely printing back silver paste on the back of the silicon wafer, drying, printing aluminum paste, drying again, printing silver paste on the front of the ② silicon wafer, conveying the ③ silicon wafer to a sintering furnace, and sintering at a high temperature of 900 ℃ to obtain a finished product, namely the conventional PERC solar cell.
Compared with a comparative example, on one hand, the metal contact area effectively reduces metal recombination by utilizing amorphous silicon contact, and on the other hand, the amorphous silicon is removed from the nonmetal contact area, so that the strong absorption of the amorphous silicon to light is reduced, and the short-circuit current is improved; the two points can effectively improve the metal recombination of the conventional PERC battery and the optical loss of amorphous silicon.
Claims (10)
1. A preparation method of a grid line passivation contact PERC solar cell is characterized by comprising the following steps: the method comprises the following steps:
step one, texturing: preparing a pyramid texture surface on a silicon wafer of a P-type silicon substrate by adopting an alkali texture surface making mode;
step two, diffusion: preparing a PN junction on a silicon wafer by adopting a diffusion mode;
step three, etching: removing PSG from the silicon wafer and etching the back surface, wherein the reflectivity of the back surface of the silicon wafer is controlled to be 20-40%;
step four, surface oxidation: preparing an oxidation film with the thickness of 1-4 nm on the surface of the pyramid texture;
step five, preparing a phosphorus heavily doped amorphous silicon layer: preparing an N-type amorphous silicon layer with the thickness of 30-300 nm on the surface of a silicon wafer by adopting a mode of phosphine and silane LPCVD (low pressure chemical vapor deposition) or PECVD (plasma enhanced chemical vapor deposition);
step six, printing: printing ink etching-resistant material on the silicon chip, wherein the printed pattern is consistent with the pattern of the grid line on the silicon chip;
seventhly, removing ink etching: etching off the amorphous silicon layer of the non-ink blocking area on the silicon chip, adopting a wet etching mode, and then cleaning and removing the ink;
step eight, oxidation: oxidizing and annealing the front side of the silicon wafer again;
step nine, preparing a passivation structure: preparing an aluminum oxide and silicon nitride laminated passivation structure on the back side of the silicon wafer, and preparing a silicon nitride passivation structure on the front side of the silicon wafer;
step ten, hole opening: carrying out laser tapping on the back of the silicon wafer;
step eleven, printing: and printing slurry on the back and the front of the silicon wafer, and sintering to obtain a finished product, namely the grid line passivation contact PERC solar cell.
2. The preparation method of the grid line passivation contact PERC solar cell as claimed in claim 1, wherein the texturing step comprises ① KOH rough polishing to remove damage layers and impurities on the surface of the silicon wafer, ② KOH + H2O2 cleaning to remove organic residues on the surface of the silicon wafer, ③ KOH + additive to prepare a pyramid microstructure suede on the surface of the silicon wafer, ④ KOH + H2O2 cleaning to remove reaction residues, ⑤ HF cleaning to remove an oxidation layer to increase the dehydration property of the silicon wafer, ⑥ water washing, slow lifting and drying, and the reflectivity of the finally formed surface of the silicon wafer is 10-13%.
3. The method of claim 2, wherein the step of forming the gate line passivated contact PERC solar cell comprises: and in the second step, the diffusion is phosphorus diffusion, and under the condition that nitrogen is used as a carrier gas and phosphorus oxychloride is used as a phosphorus source, the phosphorus source is diffused on the surface of the silicon wafer, so that the square resistance is 70-180 omega/square meter.
4. The method for preparing a grid line passivated contact PERC solar cell according to claim 3, wherein the third step comprises ① steps of covering a water film on the surface of the silicon wafer with the diffusion surface facing upwards, then passing through a mixed acid tank of HNO3+ HF, removing the phosphorus diffusion layer on the front surface and the edge due to the covering effect of the water film on the back surface, preserving the phosphorus diffusion layer on the front surface, ② step of passing through a KOH tank to remove porous silicon on the front surface, ③ step of passing through an HF tank to remove the phosphorus-silicon glass layer on the back surface and the oxide layer on the front surface, increasing the dehydration property, ④ step of washing and air drying, and the final back surface reflectivity is 30-38%.
5. The method of claim 4 for making a grid line passivated contact PERC solar cell, wherein: and the fourth step of surface oxidation adopts a high-temperature thermal oxidation mode, and prepares an oxide layer with the thickness of 1-4 nm on the surface or prepares the oxide layer with the thickness of 1-4 nm by using a high-temperature HON3 solution chemical oxidation method.
6. The method for preparing the grid line passivation contact PERC solar cell according to claim 5 is characterized in that the wet etching comprises ① removing an amorphous silicon layer uncovered by ink by using a mixed solution of 6-20% concentration HF and 6-20% concentration HNO3, ② cleaning the ink on the surface and removing porous silicon on the surface by using 1-5% concentration weak base, ③ cleaning the surface by using 1-6% concentration HF to enable the surface to have dehydration property, and ④ washing and drying.
7. The method of claim 6, wherein the step of forming the gate line passivated contact PERC solar cell comprises: and eighthly, annealing and oxidizing, namely annealing at 750-880 ℃, and preparing an oxide layer with the surface of 1-4 nm.
8. The method of claim 7, wherein the step of forming the gate line passivated contact PERC solar cell comprises: the preparation method of the back passivation layer and the antireflection layer comprises the steps of forming an Al2O3 passivation layer on the surface of the back of the silicon wafer in a plasma discharge mode of trimethyl aluminum TMA and N2O, or reacting TMA with H2O to form an Al2O3 passivation layer on the surface of the silicon wafer, wherein the thickness of the formed Al2O3 passivation layer is 4-25 nm; then, forming a SiNx layer on the back surface by using SiH4 and NH3 under the plasma discharge condition, wherein the SiNx layer is 55-85 nm thick; the front antireflection layer is a SiNx layer formed on the back surface by using SiH4 and NH3 under the condition of plasma discharge, and the thickness of the SiNx layer is 70-87 nm.
9. The method for preparing the grid line passivated contact PERC solar cell according to claim 8 is characterized in that the printing and sintering processes are that ① silicon wafers are printed with back silver paste on the back side, dried, printed with aluminum paste and dried again, ② silicon wafers are printed with front silver paste on the front side, the pattern of the silver paste is required to be consistent with the pattern printed on the front side, and dried, ③ silicon wafers are conveyed to a sintering furnace, and are sintered at a high temperature of 700-900 ℃ to obtain finished products.
10. The solar cell prepared by the method for preparing the grid line passivated contact PERC solar cell according to any one of claims 1 to 9.
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