CN112164728A - Patterned passivated contact solar cells and methods of making same - Google Patents
Patterned passivated contact solar cells and methods of making same Download PDFInfo
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
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- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
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- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
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- H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
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Abstract
The invention belongs to the technical field of crystalline silicon solar cells, and relates to a graphical passivation contact solar cell and a manufacturing method thereof. The invention adopts a passivation contact structure with a patterned back surface, can reduce the carrier recombination of a metal contact area and has good contact performance.
Description
Technical Field
The invention belongs to the technical field of crystalline silicon solar cells, and relates to a patterned passivated contact solar cell and a manufacturing method thereof.
Background
In the crystalline silicon solar cell, the improvement of the solar cell efficiency is restricted due to the severe recombination of metal and semiconductor contact regions. The passivation contact technology is a technology for remarkably improving the photoelectric conversion efficiency of a photovoltaic cell in recent years. The passivation contact (or contact passivation) structure is a structure formed by superposing a layer of ultrathin tunneling oxide layer and a layer of doped polycrystalline silicon layer on crystalline silicon, wherein silicon oxide is used as a passivation layer, and the doped polycrystalline silicon is used as a carrier selective contact material, so that the carrier recombination of a metal contact area can be obviously reduced, and meanwhile, the passivation contact (or contact passivation) structure has good contact performance, and the efficiency of a solar cell is greatly improved.
However, the passivation contact technology has the inherent disadvantage that the doped polysilicon layer has a large absorption coefficient, and if the doped polysilicon layer is used on a crystalline silicon cell in a whole surface, the current loss is large, and the conversion efficiency of the solar cell cannot be improved to the maximum. Therefore, the industry is also currently studying methods for locally passivating contacts, which can compromise between passivating the contact and light absorption.
Disclosure of Invention
The invention aims to solve the problems and provides a manufacturing method of a patterned passivated contact solar cell.
It is another object of the present invention to provide a patterned passivated contact solar cell.
In order to achieve the purpose, the invention adopts the following technical scheme:
a method of fabricating a patterned passivated contact solar cell, comprising the steps of:
texturing, diffusion junction making, etching and polishing or secondary processing) a monocrystalline silicon piece to obtain a substrate, simultaneously preparing a layer of ultrathin tunneling silicon oxide layer on the front surface and the back surface of the substrate,
an amorphous silicon layer is prepared on the tunneling silicon oxide layer on the front surface and the back surface of the substrate, or an amorphous silicon layer is prepared on the ultrathin tunneling silicon oxide layer only on the back surface of the substrate,
depositing a layer of mask on the amorphous silicon layer, printing corrosion-resistant ink on the mask on the back surface of the substrate, removing the mask in the area without printing the corrosion-resistant ink by hydrofluoric acid, removing the ink by mixed aqueous solution of ammonia water and hydrogen peroxide,
removing the amorphous silicon layer in the non-mask protection region on the back surface of the substrate and the amorphous silicon layer on the front surface, removing the tunneling oxide layer in the non-amorphous silicon region and the rest mask with hydrofluoric acid to obtain a process sheet,
the process chip is subjected to boron diffusion or phosphorus diffusion at high temperature to activate the doping atoms and simultaneously convert all the amorphous silicon into polysilicon to form a doped polysilicon layer,
and preparing passivation layers on the front side and the back side of the substrate respectively, printing the metal grid lines, and obtaining the finished solar cell after silk-screen printing and sintering.
Furthermore, the thickness of the tunneling silicon oxide layer is not more than 2nm, and the thickness of the amorphous silicon layer is 100-400 nm.
A method of fabricating a patterned passivated contact solar cell, comprising the steps of:
1) texturing: taking a P-type or N-type monocrystalline silicon wafer as a substrate, placing the P-type or N-type monocrystalline silicon wafer in texturing solution to prepare a pyramid textured surface, then cleaning the surface of the silicon wafer in hydrofluoric acid solution with the volume concentration of 1-10%,
2) diffusion and junction preparation: phosphorus diffusion or boron diffusion is carried out on two sides of the textured silicon substrate to form a pn junction,
3) etching: removing the phosphorosilicate glass layer or the borosilicate glass layer on the back side and the edge of the substrate by adopting single-side etching equipment,
4) back polishing or secondary texturing: polishing or secondary texturing treatment is carried out on the back surface to remove the diffusion layer on the back surface and form a polished surface or a textured surface, then the phosphorosilicate glass layer or the borosilicate glass layer on the front surface is removed,
5) preparing a tunneling oxide layer: preparing a layer of ultrathin tunneling silicon oxide on the front surface and the back surface of the substrate at the same time,
6) preparing a doped amorphous silicon layer: depositing an intrinsic amorphous silicon layer, a boron-doped or phosphorus-doped amorphous silicon layer on two sides or the back of the substrate by LPCVD or PECVD equipment,
7) preparing a patterned mask: depositing a layer of mask on the back of the substrate by APCVD or PECVD, printing corrosion-resistant ink on the mask on the back of the substrate, removing the mask in a non-ink-protection area in a hydrofluoric acid solution with the volume concentration of 1-5%, removing the ink material by using a mixed aqueous solution of ammonia water and hydrogen peroxide,
8) preparing a patterned passivated contact region: removing the doped amorphous silicon layer in the back non-mask protection region and the amorphous silicon layer on the front side in an etching solution, then removing the tunneling oxide layer in the non-amorphous silicon layer region and the rest mask in a hydrofluoric acid solution with the volume concentration of 1-10% to obtain a process sheet,
9) high-temperature activation and diffusion: placing the process sheet obtained in the step 8 at 850-1050 ℃ for boron diffusion or phosphorus diffusion, activating doping atoms to convert all amorphous silicon into polysilicon to form a doped polysilicon layer,
10) passivation: preparing passivation layers on the front surface and the back surface of the substrate respectively, wherein the passivation layers are composed of one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, aluminum oxide, gallium oxide, zinc oxide or titanium oxide,
11) laser grooving: for a P-type substrate, the passivation layer needs to be opened by laser ablation on the back surface, then the metal grid line is printed, for an N-type substrate, the metal grid line is directly printed,
12) screen printing and sintering: and (4) performing screen printing and sintering on the process sheet after the step (11) to obtain a finished solar cell.
Furthermore, the texturing solution comprises 1-20% by weight of KOH solution, the texturing temperature is about 80 ℃, and the etching solution comprises 1-20% by weight of KOH solution.
Further, in step 5, the ultra-thin tunneling silicon oxide layer is not more than 2nm thick and is prepared by a thermal oxidation method, a wet chemical method, a PECVD method or an excimer source dry oxygen method.
Further, in step 6, the thickness of the amorphous silicon layer is 100-400 nm.
Further, in step 7, the printing pattern is a plurality of triangles connected with each other, the shapes and the sizes of the plurality of triangles are the same, and the base sides of the triangles are on the same straight line.
The utility model provides a patterned passivation contact solar cell, includes the substrate, and the substrate is positive and the back is equipped with positive passivation layer and back passivation layer respectively, and the substrate openly is equipped with positive metal grid line, and the substrate back is equipped with back metal grid line, substrate and back metal grid line between be equipped with ultra-thin tunneling oxide layer and doping polycrystalline silicon layer in proper order, the back metal grid line is connected to the doping polycrystalline silicon layer, the shape of ultra-thin tunneling oxide layer is the same with the shape of doping polycrystalline silicon layer, still be equipped with blank area between every two adjacent back metal grid lines, the marginal shape of blank area coincide with the marginal shape of ultra-thin tunneling oxide layer or doping polycrystalline silicon layer.
Furthermore, the doped polysilicon layer comprises a metal contact area and a non-metal contact area, the shape and the size of the metal contact area are the same as those of the back metal grid line, and the non-metal contact area comprises a plurality of triangles which are mutually connected.
Furthermore, the thickness of the tunneling silicon oxide is not more than 2nm, and the thickness of the doped polycrystalline silicon layer is 100-400 nm.
Compared with the prior art, the invention has the advantages that:
the invention adopts a passivation contact structure with a back surface being patterned, a layer of ultrathin tunneling oxide layer is superposed on the back surface of a crystalline silicon substrate, namely a non-light-receiving surface, to passivate the surface of the crystalline silicon, and a layer of doped polycrystalline silicon layer is superposed to be used as a carrier selective contact material, so that the carrier recombination of a metal contact area is reduced, and meanwhile, the contact structure has good contact performance.
In addition, while the passivation contact is considered, in order to reduce the absorption of the doped polysilicon layer to light and reduce the current loss, a structure of local passivation contact is adopted. The structure adopts a patterned local contact tunneling oxide layer and a polysilicon layer, the pattern comprises a contact area between a metal grid line and a crystalline silicon substrate, but the structure is not limited to the contact area, and a better balance between passivation contact and light absorption loss can be obtained.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
Fig. 1 is a schematic structural view of a solar cell according to the present invention.
Fig. 2 is a schematic diagram of a patterned local passivation contact structure according to the present invention.
In the figure: the structure comprises a substrate 11, an ultrathin tunneling oxide layer 12, a doped polycrystalline silicon layer 13, a front passivation layer 14, a back passivation layer 15, a back metal grid line 16, a front metal grid line 17, a blank region 18, a non-metal contact region 21 and a metal contact region 22.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention.
Example 1
A method of fabricating a patterned passivated contact solar cell, comprising the steps of:
as shown in fig. 1 and fig. 2, a substrate 11 is obtained by texturing, diffusion junction making, etching and polishing a single crystal silicon wafer, an ultra-thin tunneling silicon oxide layer 12 is simultaneously prepared on the front surface and the back surface of the substrate 11, the thickness of the ultra-thin tunneling silicon oxide layer 12 is not more than 2nm,
and then preparing an amorphous silicon layer on the ultrathin tunneling silicon oxide layer 12 on the front surface and the back surface of the substrate 11, or only preparing an amorphous silicon layer on the ultrathin tunneling silicon oxide layer 12 on the back surface of the substrate 11, wherein the thickness of the amorphous silicon layer is 100-400 nm.
Depositing a mask on the amorphous silicon layer, printing corrosion-resistant ink on the mask on the back surface of the substrate 11, removing the mask in the area without printing the corrosion-resistant ink by hydrofluoric acid, removing the ink by mixed aqueous solution of ammonia water and hydrogen peroxide,
removing the amorphous silicon layer in the non-mask protection region on the back surface of the substrate 11 and the amorphous silicon layer on the front surface, then removing the tunneling oxide layer and the remaining mask in the non-amorphous silicon region with hydrofluoric acid to obtain a process chip,
the process chip is subjected to boron diffusion or phosphorus diffusion at high temperature to activate the doping atoms and simultaneously convert the amorphous silicon into polysilicon to form a doped polysilicon layer 13,
and preparing passivation layers on the front side and the back side of the substrate 11 respectively, printing metal grid lines, and obtaining a finished solar cell after silk-screen printing and sintering.
Example 2
A method of fabricating a patterned passivated contact solar cell, comprising the steps of: as shown in figures 1 and 2 of the drawings,
1) texturing: taking a P-type or N-type monocrystalline silicon wafer as a substrate 11, placing the substrate in texturing liquid to prepare a pyramid textured surface, then cleaning the surface of the silicon wafer in hydrofluoric acid solution with the volume concentration of 1-10%,
2) diffusion and junction preparation: phosphorus diffusion or boron diffusion is carried out on two sides of the textured silicon substrate to form a pn junction,
3) etching: removing the phosphorosilicate glass layer or the borosilicate glass layer on the back surface and the edge of the substrate 11 by adopting single-sided etching equipment,
4) back polishing: polishing the back surface to remove the diffusion layer on the back surface and form a polished surface, then removing the phosphorosilicate glass layer or borosilicate glass layer on the front surface,
5) preparing a tunneling oxide layer: a layer of ultra-thin tunnel silicon oxide is prepared on both the front and back sides of the substrate 11,
6) preparing a doped amorphous silicon layer: depositing an intrinsic amorphous silicon layer, a boron-doped or phosphorus-doped amorphous silicon layer on both sides or the back of the substrate 11 by LPCVD or PECVD equipment,
7) preparing a patterned mask: depositing a layer of mask on the back of the substrate by APCVD or PECVD, printing corrosion-resistant ink on the mask on the back of the substrate, removing the mask in a non-ink-protection area in a hydrofluoric acid solution with the volume concentration of 1-5%, removing the ink material by using a mixed aqueous solution of ammonia water and hydrogen peroxide,
8) preparing a patterned passivated contact region: removing the doped amorphous silicon layer in the back non-mask protection area and the amorphous silicon layer on the front in an etching solution, then removing the ultrathin tunneling oxide layer in the non-amorphous silicon layer area and the rest mask in a hydrofluoric acid solution with the volume concentration of 1-10% to obtain a process sheet,
9) high-temperature activation and diffusion: placing the process sheet obtained in the step 8 at 850-1050 ℃ for boron diffusion or phosphorus diffusion, activating doping atoms to convert all amorphous silicon into polysilicon to form a doped polysilicon layer 13,
10) passivation: preparing passivation layers on the front and back surfaces of the substrate 11, wherein the passivation layers are composed of one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, aluminum oxide, gallium oxide, zinc oxide or titanium oxide,
11) laser grooving: for a P-type substrate, the passivation layer is opened on the back surface by laser ablation, then the metal grid line is printed, for an N-type substrate, the metal grid line is directly printed, the doped polycrystalline silicon layer 13 contacts the metal grid line,
12) screen printing and sintering: and (4) performing screen printing and sintering on the process sheet after the step (11) to obtain a finished solar cell.
The texturing solution comprises 1-20% of KOH solution by weight, the texturing temperature is about 80 ℃, and the etching solution comprises 1-20% of KOH solution by weight. The texturing solution and the etching solution can adopt products sold in the market.
In step 5, the thickness of the ultra-thin tunneling silicon oxide 12 layer is not more than 2nm, in this embodiment, 0.5-1.5nm, and is prepared by a thermal oxidation method, a wet chemical method, a PECVD method, or an excimer source dry oxygen method.
In step 6, the thickness of the amorphous silicon layer is 100-400 nm.
In step 7, the printing pattern is a plurality of connected triangles, the shapes and the sizes of the triangles are the same, and the base sides of the triangles are on the same straight line.
The back metal grid lines, such as the P-type substrate, are aluminum grid lines, the N-type substrate is silver grid lines, the front metal grid lines, such as the P-type substrate, are silver grid lines, and the N-type substrate is silver-aluminum grid lines.
Compared with a grid line local passivation contact solar cell, the patterned passivation contact solar cell provided by the embodiment only needs to change the screen pattern adopted by the back printing ink, other procedures are almost unchanged, and the patterned passivation contact solar cell is suitable for large-scale industrial application. By adjusting the area ratio of the non-metal contact area, better balance between passivation contact and light absorption loss can be obtained, and the conversion efficiency of the crystalline silicon solar cell is further improved.
Example 3
A patterned passivated contact solar cell is specifically implemented and prepared by the following steps:
and (3) performing conventional texturing by using a P-type or N-type monocrystalline silicon wafer as a substrate. After standard cleaning by hydrofluoric acid and RCA, phosphorus diffusion or boron diffusion is carried out to form a pn junction. And cleaning to remove the phosphorosilicate glass layer or the borosilicate glass layer on the back of the silicon substrate. The back surface is then polished to remove the diffusion layer of the back surface. And then, preparing an ultrathin tunneling silicon oxide with the thickness of 1-2nm on the front surface and the back surface of the silicon substrate by a thermal oxidation method, and depositing a boron-doped or phosphorus-doped amorphous silicon layer with the thickness of 100-300nm on the front surface and the back surface of the silicon substrate by LPCVD equipment. A mask is deposited on the back side of the silicon substrate by APCVD or PECVD, and then the corrosion-resistant ink is printed on the mask, and the printed pattern is as shown in fig. 2. Removing the mask of the non-ink protection area in hydrofluoric acid solution with the volume concentration of 1-5%, and removing the ink material by using mixed aqueous solution of ammonia water and hydrogen peroxide. And removing the doped amorphous silicon in the back mask-free protection area and the amorphous silicon on the front side in a mixed aqueous solution of KOH and an etching additive. And then removing the tunneling oxide layer of the amorphous silicon area and the rest mask material in a hydrofluoric acid solution with the volume concentration of 1-10%. And carrying out high-temperature activation treatment on the doping atoms under the condition of 850-1050 ℃, and completely converting the amorphous silicon layer into a polycrystalline silicon layer. And preparing corresponding passivation films on the front side and the back side of the processing piece respectively. Laser ablation is required to open the backside passivation film for P-type silicon substrates, and not for N-type silicon substrates. And then carrying out conventional screen printing and sintering to form electrical contact so as to obtain the finished solar cell.
Compared with a grid line local passivation contact solar cell, the patterned passivation contact solar cell provided by the embodiment only needs to change the screen pattern adopted by the back printing ink, other procedures are almost unchanged, and the patterned passivation contact solar cell is suitable for large-scale industrial application. By adjusting the area ratio of the non-metal contact area, better balance between passivation contact and light absorption loss can be obtained, and the conversion efficiency of the crystalline silicon solar cell is further improved.
Example 4
A patterned passivation contact solar cell comprises a substrate 11, wherein a front passivation layer 14 and a back passivation layer 15 are respectively arranged on the front surface and the back surface of the substrate 11, a front metal grid line 17 is arranged on the front surface of the substrate 11, a back metal grid line 16 is arranged on the back surface of the substrate 11, the patterned passivation contact solar cell is characterized in that an ultrathin tunneling oxide layer 12 and a doped polycrystalline silicon layer 13 are sequentially arranged between the substrate 11 and the back metal grid line 16, the doped polycrystalline silicon layer 13 is connected with the back metal grid line 16, the ultrathin tunneling oxide layer 12 and the doped polycrystalline silicon layer 13 are identical in shape, a blank region 18 is further arranged between every two adjacent back metal grid lines 16, and the edge shape of the blank region 18 is matched with the edge shape of the ultrathin tunneling oxide layer.
In this embodiment, the blank region 18 is a region of the back surface of the substrate from which the ultra-thin tunnel oxide layer and the doped polysilicon layer are removed.
The doped polysilicon layer 13 includes a metal contact region 22 and a non-metal contact region 21, the shape and size of the metal contact region 22 are the same as those of the back metal gate line 16, and the non-metal contact region 21 includes a plurality of connected triangles.
The non-metal contact area 21 is designed to be triangular, so that the current between the two grid lines can be better collected, and the series resistance loss is reduced. By adjusting the area ratio of the tunnel oxide/doped polysilicon layer of the non-metallic contact region 21, a better balance between passivation contact and light absorption loss can be achieved. Therefore, the passivation contact structure with the patterned back surface can reduce the absorption of the doped polycrystalline silicon layer to light and reduce the current loss while giving consideration to the passivation contact.
The tunneling silicon oxide thickness is not more than 2nm, in this embodiment, 0.5-1.5nm, and the doped polysilicon layer 13 thickness is 100-400 nm.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit of the invention.
Claims (10)
1. A method of fabricating a patterned passivated contact solar cell, comprising the steps of:
a substrate is obtained after texturing, diffusion junction making, etching and polishing or secondary texturing is carried out on a monocrystalline silicon piece, a layer of ultrathin tunneling silicon oxide layer is simultaneously prepared on the front surface and the back surface of the substrate,
an amorphous silicon layer is prepared on the tunneling silicon oxide layer on the front surface and the back surface of the substrate, or an amorphous silicon layer is prepared on the ultrathin tunneling silicon oxide layer only on the back surface of the substrate,
depositing a layer of mask on the amorphous silicon layer, printing corrosion-resistant ink on the mask on the back surface of the substrate, removing the mask in the area without printing the corrosion-resistant ink by hydrofluoric acid, removing the ink by mixed aqueous solution of ammonia water and hydrogen peroxide,
removing the amorphous silicon layer in the non-mask protection region on the back surface of the substrate and the amorphous silicon layer on the front surface, removing the tunneling oxide layer in the non-amorphous silicon region and the rest mask with hydrofluoric acid to obtain a process sheet,
the process chip is subjected to boron diffusion or phosphorus diffusion at high temperature to activate the doping atoms and simultaneously convert all the amorphous silicon into polysilicon to form a doped polysilicon layer,
and preparing passivation layers on the front side and the back side of the substrate respectively, printing the metal grid lines, and obtaining the finished solar cell after silk-screen printing and sintering.
2. The method of claim 1, wherein the tunneling silicon oxide layer has a thickness of no more than 2nm and the amorphous silicon layer has a thickness of 100-400 nm.
3. A method of fabricating a patterned passivated contact solar cell, comprising the steps of:
1) texturing: taking a P-type or N-type monocrystalline silicon wafer as a substrate, placing the P-type or N-type monocrystalline silicon wafer in texturing solution to prepare a pyramid textured surface, then cleaning the surface of the silicon wafer in hydrofluoric acid solution with the volume concentration of 1-10%,
2) diffusion and junction preparation: phosphorus diffusion or boron diffusion is carried out on two sides of the textured silicon substrate to form a pn junction,
3) etching: removing the phosphorosilicate glass layer or the borosilicate glass layer on the back side and the edge of the substrate by adopting single-side etching equipment,
4) back polishing: polishing or secondary texturing treatment is carried out on the back surface to remove the diffusion layer on the back surface and form a polished surface or a textured surface, then the phosphorosilicate glass layer or the borosilicate glass layer on the front surface is removed,
5) preparing a tunneling oxide layer: preparing a layer of ultrathin tunneling silicon oxide on the front surface and the back surface of the substrate at the same time,
6) preparing a doped amorphous silicon layer: depositing an intrinsic amorphous silicon layer, a boron-doped or phosphorus-doped amorphous silicon layer on two sides or the back of the substrate by LPCVD or PECVD equipment,
7) preparing a patterned mask: depositing a layer of mask on the back of the substrate by APCVD or PECVD, printing corrosion-resistant ink on the mask on the back of the substrate, removing the mask in a non-ink-protection area in a hydrofluoric acid solution with the volume concentration of 1-5%, removing the ink material by using a mixed aqueous solution of ammonia water and hydrogen peroxide,
8) preparing a patterned passivated contact region: removing the doped amorphous silicon layer in the back non-mask protection region and the amorphous silicon layer on the front side in an etching solution, then removing the tunneling oxide layer in the non-amorphous silicon layer region and the rest mask in a hydrofluoric acid solution with the volume concentration of 1-10% to obtain a process sheet,
9) high-temperature activation and diffusion: placing the process sheet obtained in the step 8 at 850-1050 ℃ for boron diffusion or phosphorus diffusion, activating doping atoms to convert all amorphous silicon into polysilicon to form a doped polysilicon layer,
10) passivation: preparing passivation layers on the front surface and the back surface of the substrate respectively, wherein the passivation layers are composed of one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon carbide, aluminum oxide, gallium oxide, zinc oxide or titanium oxide,
11) laser grooving: for a P-type substrate, the passivation layer needs to be opened by laser ablation on the back surface, then the metal grid line is printed, for an N-type substrate, the metal grid line is directly printed,
12) screen printing and sintering: and (4) performing screen printing and sintering on the process sheet after the step (11) to obtain a finished solar cell.
4. The method of claim 3, wherein the texturing solution comprises 1-20 wt% KOH solution, the texturing temperature is about 80 degrees Celsius, and the etching solution comprises 1-20 wt% KOH solution.
5. The method of claim 3, wherein in step 5, the ultra-thin tunneling silicon oxide layer is not more than 2nm thick and is prepared by thermal oxidation, wet chemical method, PECVD method or excimer source dry oxygen method.
6. The method of claim 3, wherein in step 6, the amorphous silicon layer has a thickness of 100-400 nm.
7. The method as claimed in claim 3, wherein in step 7, the printed pattern is a plurality of triangles connected to each other, and the triangles have the same shape and size and have the same base line.
8. The patterned passivation contact solar cell comprises a substrate, wherein a front passivation layer and a back passivation layer are respectively arranged on the front surface and the back surface of the substrate, a front metal grid line is arranged on the front surface of the substrate, a back metal grid line is arranged on the back surface of the substrate, the patterned passivation contact solar cell is characterized in that an ultrathin tunneling oxidation layer and a doped polycrystalline silicon layer are sequentially arranged between the substrate and the back metal grid line, the doped polycrystalline silicon layer is connected with the back metal grid line, the ultrathin tunneling oxidation layer and the doped polycrystalline silicon layer are identical in shape, a blank area is further arranged between every two adjacent back metal grid lines, and the edge shape of the blank area is identical to the edge shape of the ultrathin tunneling.
9. The patterned passivated contact solar cell of claim 8 wherein the doped polysilicon layer comprises a metal contact region and a non-metal contact region, the metal contact region has the same shape and size as the backside metal gridline, and the non-metal contact region comprises a plurality of interconnected triangles.
10. The patterned passivated contact solar cell of claim 8 wherein the tunneling silicon oxide thickness is no more than 2nm and the doped polysilicon layer thickness is 100-400 nm.
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