CN109671802A - A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique - Google Patents

A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique Download PDF

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CN109671802A
CN109671802A CN201710959746.9A CN201710959746A CN109671802A CN 109671802 A CN109671802 A CN 109671802A CN 201710959746 A CN201710959746 A CN 201710959746A CN 109671802 A CN109671802 A CN 109671802A
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silicon wafer
silicon
side cell
passivated
polycrystalline silicon
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张松
梁小静
赵晨
刘慎思
郑飞
陶智华
张忠卫
阮忠立
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SHANGHAI SHENZHOU NEW ENERGY DEVELOPMENT Co Ltd
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Abstract

The present invention relates to a kind of back to be passivated efficient polycrystalline silicon PERC double-side cell technique, removes damaged layer on surface of silicon slice and carries out twin polishing, carries out two-sided black silicon making herbs into wool with metal Aided Wet etching method, then carry out metal salt and clean.Then, reaming modification is carried out to flannelette using the two step aqueous slkalis for having concentration gradient;POCl in high temperature furnace3Double-sided deposition diffusion, polished backside remove phosphorosilicate glass and diffusion layer simultaneously;Then silicon chip back side ALD deposition AlOxAnd with PECVD device in AlOxThe SiN that film and front surface diffusion layer deposit respectivelyxFilm;With laser technology the step of carrying on the back the aperture of passivation layer fluting, silk-screen printing sintering back aluminium paste, back electrode and positive electrode.Battery of the invention can effectively improve single polycrystalline light trapping structure by special making herbs into wool technology, while guarantee that cell photoelectric transfer efficiency can be substantially improved in conjunction with the generating electricity on two sides advantage and dim light response characteristic of double-side cell in relatively low surface recombination velocity (S.R.V.).

Description

A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique
Technical field
The present invention relates to crystal silicon solar batteries fields, are passivated the two-sided electricity of efficient polycrystalline silicon PERC more particularly, to a kind of back Pool process.
Background technique
P-type polysilicon battery is since mature production technology, manufacturing cost are low, at present and from now on for quite a long time Inside still occupy most market shares.As what State Council issued creates production capacity single crystal battery efficiency about photovoltaic industry and is greater than 20%, polycrystalline battery efficiency is greater than 18% several instructions, and selection is easy to be compatible with existing large-scale production line, and easily controllable The scheme of production cost, quickly updating core technology is trend of the times.P-type crystal silicon solar battery competes to continue holding Power obtains bigger development and application, it is necessary to further increase transfer efficiency, while reduce production cost.
Currently, in the production technology of p-type polysilicon solar cell, the suede structure how to have been obtained in front surface, with Promoting anti-reflective effect is to prepare high-efficiency polycrystalline silion cell top priority, and common process includes mechanical carving groove method, laser Etching method, reactive ion etching method (RIE), chemical corrosion method (i.e. metal Aided Wet corrodes) etc..Wherein, mechanical carving groove method Available lower surface reflectivity, but this method causes the mechanical damage of silicon chip surface than more serious, and its finished product Rate is relatively low, so in the industrial production using less.It is that different cutting flowers is made of laser for laser ablation method The surface of sample, striated and inverted pyramid shape all is produced out, and reflectivity can be down to 8.3%, but by it The efficiency of battery obtained is all relatively low, not can be effectively used to production.RIE method can use different templates to be carved Erosion, etching are usually dry etching, can form so-called black silicon structure in silicon chip surface, reflectivity can down to 4%, But due to equipment valuableness, production cost is higher, therefore less at using in production in industry.And chemical corrosion method has technique letter The features such as single, cheap price and excellent quality and prior art are compatible with well becomes most commonly used method in existing industry.
Almost at the same time, PERC structure and PERC two-sided structure technology are conceived to the back side of battery, significantly using passivation It reduces the recombination velocity at the back side while increasing the back side and enter light, which gradually obtains in P-type crystal silicon battery greatly in recent years Sizable application makes the efficiency of polycrystalline and single crystal battery promote~0.5% and~1% or more respectively.But PERC technology is to battery Front without significantly improving, meet that serious and light loss is serious, and p-type polysilicon is using PERC and its two-sided structure better than front surface The advantage of battery is difficult to give full play to.
Therefore, it is that current polysilicon realizes the effective of 20% battery efficiency that black silicon technology, which combines back passivation two-sided structure battery, Approach, technology path are based on passivation cell emitter junction and rear side local contact (PERC) battery structure, pass through the corrosion of optimization Solution realizes the micro-nano surface state for being easy to be passivated in the black silicon wool-weaving machine of industrialization, and silk-screen printing aluminium paste electrode is realized two-sided Light-entry structure, the high-efficiency crystal silicon cell technology path that processing compatibility is strong and battery cost is controllable.But efficiently back passivation is double Battery process route needs in face solve the problems, such as several aspects:
1) how while polysilicon surface promotes light trapping effect to guarantee excellent surface state, and then set in PECVD The standby middle effective passivation for realizing silicon front surface;
2) excellent surface passivation effect is formed in cell backside;
3) cell backside forms effective electrode ohmic contact, reduces the contact resistance of battery.
Currently, being prepared using wet process metal catalytic chemical etching method black in the black silicon material manufacturing technology having disclosed The patent of silicon, such as CN 102051618 A, CN 102768951 A be all that a nanometer suede is realized by one-step method (acid or alkali) Face reaming controls surface state, and reaction speed is fast, and reaction process is not easy to control.It and be 104393114 A of CN is then in micron Nanometer suede is prepared on the basis of flannelette, then carries out surface modification etching.It is uneven to there may be micro nano structure, after reduction The passivation effect of continuous technique.Recombination velocity requirement for efficient crystal silicon battery, with the continuous promotion of body performance, to front surface It is higher.
Aluminium oxide silicon nitride multilayer passivation film structure has both chemical passivation and field passivation in p-type crystalline silicon application aspect Effect effectively reduces the recombination velocity of p-type silicon chip back surface, improves stability of the aluminum oxide film in prior art. However, backside laser is slotted, the localized contact to be formed introduces considerable contact loss.Therefore, the compound speed of back surface how is reduced Degree, so that subsequent silk-screen printing and high-sintering process be avoided to have become skill urgently to be resolved to the destruction of passivation layer Art problem.
Summary of the invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art and provide one kind will be provided with black silicon suede The polysilicon in face is applied to a kind of simplification of efficient PERC two-sided structure solar cell, and is easy to the back passivation of scale of mass production High-efficiency battery technique.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique, using following steps:
(1) silicon wafer is cleaned in NaOH/NaClO mixed ammonium/alkali solutions, removal surface damage layer, cutting stria, while complete At twin polishing;
(2) silicon wafer after polishing is put into falling decoration metallic particles in metal salt solution,
(3) by above-mentioned silicon wafer in HF/H2O2The preparation of nanostructure flannelette is carried out in oxidizing solution;
(4) metallic particles removal processing is carried out to silicon wafer;
(5) silicon wafer with nanometer suede is put into potassium hydroxide solution improves nanometer suede structure;
(6) silicon wafer is put into progress flannelette amendment in low-concentration hydrogen potassium oxide solution;
(7) by above-mentioned silicon wafer in high temperature furnace POCl3Single sided deposition diffusion;
(8) using one-step method wet etching removal phosphorosilicate glass and the polished silicon slice back side;
(9) in board-like ALD equipment by front side of silicon wafer depositing Al2O3Layer;
(10) using PECVD device in above-mentioned silicon wafer polishing face and front deposition SiNxFilm;
(11) it slots aperture on the back passivation layer that silicon chip back side is formed;
(12) silk-screen printing sintering back alum gate line electrode, back silver electrode and positive silver electrode.
It is the potassium hydroxide solution of 0.5-2wt% in 20-50 DEG C of improvement nanometer suede structure that step (5), which uses concentration, is adopted First time peak clipping and reaming are carried out with the potassium hydroxide solution of above-mentioned concentration, modifies black silicon flannelette, the modification time is 60-240s. Under room temperature, appropriate reaction speed improves the amendment process window time, and higher alkaline concentration has preferably Isotropic etch characteristic can effectively correct the depth (or height of nano-pillar) of nano aperture first.Based on (5) high concentration Peak clipping characteristic can also promote the process time of above-mentioned processing step (3), so as to improve the depth and uniformity of nano-pore, be The micro-nano flannelette of final uniformly appropriateness provides basis.
Step (6) uses concentration to repair for the low-concentration hydrogen potassium oxide solution of 0.05-0.1wt% in 20-50 DEG C of progress flannelette Just, the processing time is 60-240s, to be finely adjusted to black silicon suede structure, the potassium hydroxide solution of low concentration embodies excellent Anisotropic etch characteristic, can preferentially remove removal porous silicon residual, reduce interfacial state it is compound to subsequent photogenerated current It influences.
Micro-nano sunken light flannelette is prepared using two step alkaline process alkali reamings using step (5), (6), responding speed is controllable, application The anisotropic etching difference that various concentration aqueous slkali has, can be effectively improved the depth of black silicon nanostructure, and avoid Black hole residual, guarantees excellent sunken light characteristic while silicon face state is effectively reduced.
It should also be noted that, step (6) give full play to aqueous slkali anisotropy preferential etch using low concentration alkali solution Characteristic, achieve the purpose that correct micro-nano flannelette inclination angle and interfacial state, in favor of front surface diffusion and surface passivation.Such as Fruit persistently uses high concentration alkali solution (such as concentration range in step (5)) to be modified, it is easy to cause to fall into light substantially Lose and cause the optical loss of solar cell.And alkaline concentration is too low, it is possible to cause to remain effectively removing for porous silicon, And then influence the photoelectric yield characteristic and its stability of solar cell.
In addition, step (5), (6) aqueous slkali chambering process at room temperature exploitation, also effectively reduce disappearing for acid solution Consumption.
NaOH/NaClO mixed ammonium/alkali solutions described in step (1) (volume ratio 3:1~1:1), the step have both cleaning and Polishing process, clear process procedure before saving promote production capacity.
Concentration is used to drop for the silver nitrate of 0.003-0.05mol/L or copper nitrate solution in ultrasonication in step (2) Gilding metal particles, supersonic frequency 20-40kHz, ultrasonic power 0.2-0.5W/cm2.In the water environment of ultrasonic wave into Row, can effectively control the size of Argent grain after falling decoration, to control the size and density of nano-porous structure.
Al described in step (9)2O3Layer with a thickness of 10-20nm.
In the SiN of silicon wafer polishing face deposition in step (10)xFilm with a thickness of 50-100nm, deposited in silicon wafer front surface SiNxFilm with a thickness of 75-85nm.
Step (11) is carrying on the back passivation layer fluting aperture using laser slotting, selective wet chemical etching, photoetching or class photoetching process, It is preferred that realizing back-contact electrode structure using laser slotting, it is capable of forming enhancing Al-BSF in this way.
The back side that step (12) can increase efficient polycrystalline silicon enters light, increases the output power of solar cell.
Compared with prior art, the present invention is directed to by merging black silicon flannelette and the preparation of efficient back passivated battery structure process Polycrystalline silicon solar cell is produced low-cost high-efficiency structure solar cell, is finally realized scale based on existing extensive producing line Volume production effect.According to above-mentioned high-efficiency polycrystalline PERC double-side cell process route, in terms of the black silicon making herbs into wool of battery simple process effectively, Cost is controllable.The overlayer passivation of aluminium oxide and silicon nitride film reduces back surface recombination velocity, avoids subsequent silk-screen printing Destruction with high-sintering process to passivation layer.Double-side cell structure increases incidence surface, effectively promotion output power.
The present invention has obtained having industrial application prospect by novel alkali chambering process, using metal auxiliary caustic solution Novel micro nanometer rice flannelette, can not only realize good light trapping structure in polysilicon chip front surface, meanwhile, in conjunction with the two-sided electricity of PERC Pool structure also achieves the excellent passivation effect of front surface and the back side, according to preliminary test, realizes the prominent of efficiency 20.6% It is broken.
Detailed description of the invention
Fig. 1 is the stereoscan photograph of silicon wafer after flannelette amendment.
Specific embodiment
A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique, using following steps:
(1) silicon wafer is cleaned in NaOH/NaClO mixed ammonium/alkali solutions, the volume ratio of NaOH and NaClO can control 3: 1~1:1, the step have both cleaning and polishing process, clear process procedure before saving, and promote production capacity removal surface damage layer, cut Secant trace, is completed at the same time twin polishing;
(2) silicon wafer after polishing is put into falling decoration metallic particles in metal salt solution, for example, can use concentration for The silver nitrate or copper nitrate solution of 0.003-0.05mol/L is in ultrasonication tenesmus gilding metal particles, supersonic frequency 20- 40kHz, ultrasonic power 0.2-0.5W/cm2.It is carried out in the water environment of ultrasonic wave, can effectively control silver after falling decoration The size of grain, to control the size and density of nano-porous structure;
(3) by above-mentioned silicon wafer in HF/H2O2The preparation of nanostructure flannelette is carried out in oxidizing solution;
(4) metallic particles removal processing is carried out to silicon wafer;
(5) using concentration is the potassium hydroxide solution of 0.5-2wt% in 20-50 DEG C of improvement nanometer suede structure, use The potassium hydroxide solution for stating concentration carries out first time peak clipping and reaming, modifies black silicon flannelette, and the modification time is 60-240s.Room temperature Under the conditions of, appropriate reaction speed improve amendment the process window time, and higher alkaline concentration have preferably respectively to Same sex etching characteristic can effectively correct the depth (or height of nano-pillar) of nano aperture first.Based on (5) high concentration peak clipping Characteristic can also promote the process time of above-mentioned processing step (3), be final so as to improve the depth and uniformity of nano-pore Uniformly the micro-nano flannelette of appropriateness provides basis;
(6) using concentration is the low-concentration hydrogen potassium oxide solution of 0.05-0.1wt% at 20-50 DEG C of progress flannelette amendment, place The reason time is 60-240s, to be finely adjusted to black silicon suede structure, the potassium hydroxide solution of low concentration embody it is excellent it is each to Anisotropic etch characteristic can preferentially remove removal porous silicon residual, reduce the interfacial state influence compound to subsequent photogenerated current;
(7) by above-mentioned silicon wafer in high temperature furnace POCl3Single sided deposition diffusion;
(8) using one-step method wet etching removal phosphorosilicate glass and the polished silicon slice back side;
(9) Al for being 10-20nm by front side of silicon wafer deposition thickness in board-like ALD equipment2O3Layer;
(10) using PECVD device in above-mentioned silicon wafer polishing face and front deposition SiNxFilm, wherein silicon wafer polishing face is heavy Long-pending SiNxFilm with a thickness of 50-100nm, in the SiN of silicon wafer front surface depositionxFilm with a thickness of 75-85nm;
(11) using laser slotting, selective wet chemical etching, photoetching or class photoetching process in back passivation layer fluting aperture, preferably Back-contact electrode structure is realized using laser slotting, is capable of forming enhancing Al-BSF in this way;
(12) silk-screen printing sintering back alum gate line electrode, back silver electrode and positive silver electrode, increase the back side of efficient polycrystalline silicon Enter light, increases the output power of solar cell.
In the above method most critical be technically characterized in that using step (5), (6) using two step alkaline process alkali reamings prepare it is micro- The sunken light flannelette of nanometer, responding speed is controllable, and the anisotropic etching difference having using various concentration aqueous slkali can effectively change It is apt to the depth of black silicon nanostructure, and black hole is avoided to remain, guarantees excellent sunken light while silicon face state is effectively reduced Characteristic.It should also be noted that, step (6) give full play to the spy of aqueous slkali anisotropy preferential etch using low concentration alkali solution Property, achieve the purpose that inclination angle and the interfacial state of correcting micro-nano flannelette, in favor of front surface diffusion and surface passivation.If held It is continuous to be modified using high concentration alkali solution (such as concentration range in step (5)), it is easy to cause to fall into the substantially loss of light And lead to the optical loss of solar cell.And alkaline concentration is too low, it is possible to cause to remain effectively removing for porous silicon, in turn Influence the photoelectric yield characteristic and its stability of solar cell.In addition, step (5), (6) aqueous slkali chambering process at room temperature Exploitation, also effectively reduce the consumption of acid solution.
The present invention is described in detail combined with specific embodiments below.Following embodiment will be helpful to the technology of this field Personnel further understand the present invention, but the invention is not limited in any way.It should be pointed out that the ordinary skill of this field For personnel, without departing from the inventive concept of the premise, various modifications and improvements can be made.These belong to the present invention Protection scope.
Embodiment 1
A kind of back passivation efficient polycrystalline silicon PERC two-sided structure battery process, using following steps:
(1) volume ratio of former silicon wafer cleaning polishing in NaOH/NaClO mixed ammonium/alkali solutions, NaOH and NaClO are 2:1, are gone Except surface damage layer, cutting stria etc.;
(2) silicon wafer after polishing is carried out to silver-colored falling decoration in a solution of hydrofluoric acid, uses concentration for the silver nitrate of 0.02mol/L What solution carried out in the water-bath of additional ultrasonic.Wherein, supersonic frequency 30kHz, ultrasonic power 0.4W/cm2.By drawing Excess of imports acoustic control, can effectively control the size and density of Argent grain, to reach the optimization (nano-pore to nanometer suede structure The aperture size and density in hole);
(3) above-mentioned silicon wafer is put into HF/H2O2Nanometer suede preparation is carried out in mixed solution;
(4) above-mentioned silicon wafer is put into hydrogen peroxide and ammonium hydroxide mixed solution and removes anionic metal;
(5) by above-mentioned silicon wafer in 1wt%KOH aqueous slkali, controlled at 30 DEG C of processing 120s, reaming and reduction are carried out Nano-void height;
(6) above-mentioned silicon wafer is carried out to flannelette modification in the KOH aqueous slkali of 0.1wt%, is handled controlled at 30 DEG C 120s, the Porous Silicon structures that removal metal auxiliary corrosion step (4) leaves, as shown in Fig. 1 scanning electron microscope microscope.
(7) surface phosphorosilicate glass (PSG) is removed using wet-method etching equipment and realizes polished backside;
(8) in tubular type or board-like PECVD device front deposition thickness about 80nm SiNx,
(9) using ALD equipment in silicon wafer polishing face backside deposition 10-20nm or so AlOx, then set using tubular type PECVD The SiN of standby deposition 50-100nm or soxLayer is in AlOxPassivation layer;
(10) 85nm silicon nitride layer is deposited in Tubular PECVD device;
(11) using laser or wet process back passivation layer fluting aperture;
(12) silk-screen printing sintering back alum gate line, back electrode and positive electrode, test battery efficiency, the data tested are such as Shown in table 1.
1 battery testing data list of table
The data of table 1 further illustrate which kind of technical effect the prepared battery of the above method can obtain.It is double Face PERC structure solar cell significantly reduces the compound action of traditional Al-BSF, hence it is evident that improves open-circuit voltage.But it is same to close Key is that factor is, using the aqueous slkali amendment technique for having concentration gradient, while keeping high light trapping effect (Jsc > 39.7mA), it is compound to effectively reduce solar cell front surface.For example, claiming to realize efficiency in beneficial effects of the present invention 20.6% breakthrough.
Embodiment 2
A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique, using following steps:
(1) silicon wafer is cleaned in NaOH/NaClO mixed ammonium/alkali solutions, removal surface damage layer, cutting stria, while complete At twin polishing, the volume ratio of NaOH and NaClO are 3:1;
(2) silicon wafer after polishing is put into falling decoration metallic particles in metal salt solution, uses concentration for 0.003mol/L's Copper nitrate solution is in ultrasonication tenesmus gilding metal particles, supersonic frequency 20kHz, ultrasonic power 0.5W/cm2
(3) by above-mentioned silicon wafer in HF/H2O2The preparation of nanostructure flannelette is carried out in oxidizing solution;
(4) metallic particles removal processing is carried out to silicon wafer;
(5) use concentration for the potassium hydroxide solution of 0.5wt%, in 20 DEG C of at a temperature of processing silicon wafer 240s, improvement is received Rice porous structure;
(6) at a temperature of processing silicon wafer 240s of the concentration for the low-concentration hydrogen potassium oxide solution of 0.05wt% at 20 DEG C is used, Second-order correction is carried out to flannelette;
(7) by above-mentioned silicon wafer in high temperature furnace POCl3Single sided deposition diffusion;
(8) using one-step method wet etching removal phosphorosilicate glass and the polished silicon slice back side;
(9) Al for being 10nm by front side of silicon wafer deposition thickness in board-like ALD equipment2O3Layer;
(10) use PECVD device in above-mentioned silicon wafer polishing face deposition thickness for the SiN of 50nmxFilm, in step (9) Front deposition thickness be 75nm SiNxFilm;
(11) it is slotted on the back passivation layer that silicon chip back side is formed aperture using the method for selective wet chemical etching;
(12) silk-screen printing sintering back alum gate line electrode, back silver electrode and positive silver electrode.
Embodiment 3
A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique, using following steps:
(1) silicon wafer is cleaned in NaOH/NaClO mixed ammonium/alkali solutions, removal surface damage layer, cutting stria, while complete At twin polishing, the volume ratio of NaOH and NaClO are 1:1;
(2) silicon wafer after polishing is put into falling decoration metallic particles in metal salt solution, uses concentration for the nitre of 0.05mol/L Sour silver solution is in ultrasonication tenesmus gilding metal particles, supersonic frequency 40kHz, ultrasonic power 0.2W/cm2
(3) by above-mentioned silicon wafer in HF/H2O2The preparation of nanostructure flannelette is carried out in oxidizing solution;
(4) metallic particles removal processing is carried out to silicon wafer;
(5) it uses concentration for the potassium hydroxide solution of 2wt%, in 50 DEG C of at a temperature of processing silicon wafer 60s, it is more to improve nanometer Pore structure;
(6) use concentration for the low-concentration hydrogen potassium oxide solution of 0.1wt% 50 DEG C at a temperature of handle silicon wafer 60s, it is right Flannelette carries out second-order correction;
(7) by above-mentioned silicon wafer in high temperature furnace POCl3Single sided deposition diffusion;
(8) using one-step method wet etching removal phosphorosilicate glass and the polished silicon slice back side;
(9) Al for being 20nm by front side of silicon wafer deposition thickness in board-like ALD equipment2O3Layer;
(10) use PECVD device in above-mentioned silicon wafer polishing face deposition thickness for the SiN of 100nmxFilm, in step (9) In front deposition thickness be 85nm SiNxFilm;
(11) it is slotted on the back passivation layer that silicon chip back side is formed aperture using photo-etching processes;
(12) silk-screen printing sintering back alum gate line electrode, back silver electrode and positive silver electrode.
Specific embodiments of the present invention are described above.It is to be appreciated that the invention is not limited to above-mentioned Particular implementation, those skilled in the art can make various deformations or amendments within the scope of the claims, this not shadow Ring substantive content of the invention.

Claims (8)

1. a kind of back is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that the technique uses following steps:
(1) silicon wafer is cleaned in NaOH/NaClO mixed ammonium/alkali solutions, removal surface damage layer, cutting stria are completed at the same time double Face polishing;
(2) silicon wafer after polishing is put into falling decoration metallic particles in metal salt solution,
(3) by above-mentioned silicon wafer in HF/H2O2The preparation of nanostructure flannelette is carried out in oxidizing solution;
(4) metallic particles removal processing is carried out to silicon wafer;
(5) silicon wafer with nanometer suede is put into potassium hydroxide solution improves nanometer suede structure;
(6) silicon wafer is put into progress flannelette amendment in low-concentration hydrogen potassium oxide solution;
(7) by above-mentioned silicon wafer in high temperature furnace POCl3Single sided deposition diffusion;
(8) using one-step method wet etching removal phosphorosilicate glass and the polished silicon slice back side;
(9) in board-like ALD equipment by front side of silicon wafer depositing Al2O3Layer;
(10) the front deposition SiN using PECVD device in above-mentioned silicon wafer polishing face and step (9)xFilm;
(11) it slots aperture on the back passivation layer that silicon chip back side is formed;
(12) silk-screen printing sintering back alum gate line electrode, back silver electrode and positive silver electrode.
2. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (5) use concentration for the potassium hydroxide solution of 0.5-2wt%, in 20-50 DEG C of at a temperature of processing silicon wafer 60-240s, improvement is received Rice porous structure.
3. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (6) use concentration for the low-concentration hydrogen potassium oxide solution of 0.05-0.1wt% 20-50 DEG C at a temperature of handle silicon wafer 60- 240s carries out second-order correction to flannelette.
4. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (1) volume ratio of NaOH and NaClO is 3:1~1:1 in the NaOH/NaClO mixed ammonium/alkali solutions described in.
5. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (2) it is the silver nitrate of 0.003-0.05mol/L or copper nitrate solution in ultrasonication tenesmus gilding metal particles that concentration is used in, is surpassed Acoustic frequency is 20-40kHz, ultrasonic power 0.2-0.5W/cm2
6. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (9) Al described in2O3Layer with a thickness of 10-20nm.
7. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (10) in the SiN of silicon wafer polishing face deposition inxFilm with a thickness of 50-100nm, in the SiN of front side of silicon wafer depositionxThe thickness of film Degree is 75-85nm.
8. a kind of back according to claim 1 is passivated efficient polycrystalline silicon PERC double-side cell technique, which is characterized in that step (11) using laser slotting, selective wet chemical etching, photoetching or class photoetching process in back passivation layer fluting aperture.
CN201710959746.9A 2017-10-16 2017-10-16 A kind of back passivation efficient polycrystalline silicon PERC double-side cell technique Pending CN109671802A (en)

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CN111029441A (en) * 2019-12-24 2020-04-17 遵义师范学院 Grid line passivation contact PERC solar cell and preparation method thereof
WO2022211729A1 (en) * 2021-03-29 2022-10-06 National University Of Singapore Surface treatment method for forming a passivated contact of a solar cell

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