CN214753776U - Unijunction transistor of silicon substrate on insulating layer - Google Patents
Unijunction transistor of silicon substrate on insulating layer Download PDFInfo
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- CN214753776U CN214753776U CN202120468216.6U CN202120468216U CN214753776U CN 214753776 U CN214753776 U CN 214753776U CN 202120468216 U CN202120468216 U CN 202120468216U CN 214753776 U CN214753776 U CN 214753776U
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Abstract
The utility model discloses a unijunction transistor of silicon substrate on insulating layer, including the transistor, be provided with the silicon substrate on the transistor, and the leading flank upper left portion of silicon substrate is provided with base an to the leading flank upper right portion of silicon substrate is provided with base b, upper portion is provided with the projecting pole in the leading flank of silicon substrate, the trailing flank of silicon substrate is provided with the PN knot, the silicon substrate adopts the cuboid structure, and the silicon substrate surface is provided with waterproof layer and insulating layer to the waterproof layer adopts nanometer waterproof coating, base an and base b are bilateral symmetry structure about the silicon substrate, and base an and base b all adopt Z type structure. This unijunction transistor of silicon substrate on insulating layer, the structure sets up rationally, and the surface of the main silicon substrate that sets up of transistor has set gradually waterproof layer and insulating layer, makes its surface of silicon substrate have good insulating waterproof performance when using, and the circuit operation is more stable safety, has big pulse capacity.
Description
Technical Field
The utility model relates to a semiconductor device correlation technique field specifically is a unijunction transistor of silicon substrate on insulating layer.
Background
A unijunction transistor is a semiconductor transistor device invented by general electric company in 1955, and has unique working mechanism and electrical function, the unijunction transistor is built on a substrate of bulk silicon and is provided with three electrical contact ports, the basic preparation process comprises the steps of forming a P-type doped region at the middle position of a long strip-shaped N-type substrate by using an alloy method, forming a P-N junction between the P-type doped region and the N-type substrate, connecting electrodes at two ends of the N-type long strip-shaped substrate as base regions, leading out an electrode between the two base regions as an emitter region, connecting constant voltage between the two base regions when the unijunction transistor device works, so that the middle P-N junction is in a reverse bias cut-off state, adding gradually rising bias voltage on the P-type emitter region, conducting the P-N junction when the bias voltage exceeds the reverse cut-off voltage, and injecting a large number of holes into the N-type region after conducting, therefore, the resistance value of the grounding part in the N-type region is reduced, the forward bias voltage of the P-N junction is further increased, more holes are injected into the base region from the P-type emitting region due to the increase of the forward bias voltage of the P-N junction, a feedback cycle is finally formed, the single-junction transistor device is rapidly conducted, after the single-junction transistor device is conducted, due to a large number of holes in the channel layer, the cut-off voltage of the single-junction transistor device becomes very low, and therefore a negative resistance and hysteresis special effect is formed.
However, most of the unijunction transistors in the prior art adopt a cylindrical structure, and the unijunction transistors are easy to shake during installation, thereby affecting the operation of the circuit and being unstable and safe.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a unijunction transistor of silicon substrate on insulating layer to solve the unijunction transistor that proposes in the above-mentioned background art and adopt the cylinder structure mostly, take place to rock easily during the installation, and influence the circuit operation and unstable safe problem.
In order to achieve the above object, the utility model provides a following technical scheme: a unijunction transistor of a silicon substrate on an insulating layer comprises a transistor, wherein the transistor is provided with the silicon substrate, the left upper portion of the front side face of the silicon substrate is provided with a base electrode a, the right upper portion of the front side face of the silicon substrate is provided with a base electrode b, the middle upper portion of the front side face of the silicon substrate is provided with an emitting electrode, and the rear side face of the silicon substrate is provided with a PN junction.
Preferably, the silicon substrate is of a rectangular structure, a waterproof layer and an insulating layer are arranged on the outer surface of the silicon substrate, the waterproof layer is a nano waterproof coating, and the insulating layer is organic silicon pouring sealant.
Preferably, the length of the silicon substrate is set to 4cm, the width of the silicon substrate is set to 3cm, and the height of the silicon substrate is set to 2 cm.
Preferably, the base electrode a and the base electrode b are in a left-right symmetrical structure with respect to the silicon substrate, the base electrode a and the base electrode b are both in a Z-shaped structure, and the base electrode a and the base electrode b are both made of metal copper materials.
Preferably, the resistance between the base electrode a and the base electrode b is set to 2.2-10.2 kilo-ohms, and the value thereof increases as the temperature rises.
Preferably, the voltage division ratio between the base electrode a and the base electrode b is η, and η is set to 0.35-0.95.
Compared with the prior art, the beneficial effects of the utility model are that: the unijunction transistor of the silicon substrate on the insulating layer is reasonable in structural arrangement, and the waterproof layer and the insulating layer are sequentially arranged on the outer surface of the silicon substrate mainly arranged on the transistor, so that the surface of the silicon substrate has good insulating and waterproof performances when the unijunction transistor is used, a circuit runs more stably and safely, and the unijunction transistor has large pulse capacity;
1. the outer surface of the silicon substrate mainly arranged in the transistor is sequentially provided with the waterproof layer and the insulating layer, so that the surface of the silicon substrate has good insulating and waterproof performance when the transistor is used, and the circuit is more stable and safe to operate;
2. when voltage is applied between the base electrode a and the base electrode b, current flows from the base electrode b to the base electrode a, and the base region at the junction is in a reverse bias state to the potential of the base electrode a.
Drawings
FIG. 1 is a schematic front view of the structure of the present invention;
FIG. 2 is a left side view of the structure of the present invention;
FIG. 3 is a rear view of the structure of the present invention;
fig. 4 is a schematic diagram of the circuit structure of the present invention.
In the figure: 1. a transistor; 2. a silicon substrate; 3. a PN junction; 4. a base electrode b; 5. an emitter; 6. a base electrode a.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
Referring to fig. 1-4, the present invention provides a technical solution: a unijunction transistor of a silicon substrate on an insulating layer comprises a transistor 1, a silicon substrate 2, a PN junction 3, a base b4, an emitter 5 and a base a6, wherein the silicon substrate 2 is of a rectangular structure, a waterproof layer and an insulating layer are arranged on the outer surface of the silicon substrate 2, a nanometer waterproof coating is adopted in the waterproof layer, an organic silicon pouring sealant is adopted in the insulating layer, the length of the silicon substrate 2 is set to be 4cm, the width of the silicon substrate 2 is set to be 3cm, the height of the silicon substrate 2 is set to be 2cm, the base a6 is arranged on the left upper portion of the front side face of the silicon substrate 2, the base b4 is arranged on the right upper portion of the front side face of the silicon substrate 2, the base a6 and the base b4 are in a left-right symmetrical structure relative to the silicon substrate 2, the base a6 and the base b4 are both of a Z-shaped structure, the base a6 and the base b4 are both made of a metal copper material, the resistance between the base a6 and the base b4 is set to be 2-10.2 kilo ohm, and the value thereof increases with the temperature rise, the voltage division ratio between the base a6 and the base b4 is η, and η is set to 0.35 to 0.95, the emitter 5 is provided at the middle upper portion of the front side surface of the silicon substrate 2, and the PN junction 3 is provided at the rear side surface of the silicon substrate 2.
As shown in fig. 1, mainly showing the overall structure of the device, the outer surface of the silicon substrate 2 mainly provided with the transistor 1 is sequentially provided with a waterproof layer and an insulating layer, so that the surface of the silicon substrate 2 has good insulating and waterproof properties when in use, and the circuit runs more stably and safely;
as shown in fig. 2-4, base a6 is disposed on the top left of the front side of silicon substrate 2, base b4 is disposed on the top right of the front side of silicon substrate 2, when a voltage is applied between base a6 and base b4, current will flow from base b4 to base a6, and the base at the junction is in a reverse bias state with respect to the potential of base a 6.
The working principle is as follows: when the single junction transistor with the silicon-on-insulator substrate is used, after the transistor 1 is installed, a voltage is added between the base a6 and the base b4, current flows from the base b4 to the base a6, the resistance between the base a6 and the base b4 is called base resistance, the resistance value between the base a6 and the PN junction 3 changes along with the current of the emitter 5, the base resistance is equal to the sum of the resistance between the base a6 and the PN junction 3 and the resistance between the base b4 and the PN junction 3, the transistor 1 has large pulse capacity when in use, the switching characteristic of the transistor 1 has high temperature stability, and the use is safe and stable.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (6)
1. A single junction transistor of a silicon-on-insulator substrate comprising a transistor (1), characterized in that: the transistor (1) is provided with a silicon substrate (2), the left upper portion of the front side face of the silicon substrate (2) is provided with a base electrode a (6), the right upper portion of the front side face of the silicon substrate (2) is provided with a base electrode b (4), the middle upper portion of the front side face of the silicon substrate (2) is provided with an emitting electrode (5), and the rear side face of the silicon substrate (2) is provided with a PN junction (3).
2. The single junction transistor of claim 1, wherein: the silicon substrate (2) adopts a cuboid structure, a waterproof layer and an insulating layer are arranged on the outer surface of the silicon substrate (2), the waterproof layer adopts a nanometer waterproof coating, and the insulating layer adopts organic silicon pouring sealant.
3. The single junction transistor of claim 1, wherein: the length of the silicon substrate (2) is set to be 4cm, the width of the silicon substrate (2) is set to be 3cm, and the height of the silicon substrate (2) is set to be 2 cm.
4. The single junction transistor of claim 1, wherein: the base electrode a (6) and the base electrode b (4) are in a bilateral symmetry structure relative to the silicon substrate (2), the base electrode a (6) and the base electrode b (4) are both in a Z-shaped structure, and the base electrode a (6) and the base electrode b (4) are both made of metal copper materials.
5. The single junction transistor of claim 1, wherein: the resistance between the base a (6) and the base b (4) is set to 2.2-10.2 kilo-ohms and its value increases with increasing temperature.
6. The single junction transistor of claim 1, wherein: the voltage division ratio between the base electrode a (6) and the base electrode b (4) is eta, and eta is set to be 0.35-0.95.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120468216.6U CN214753776U (en) | 2021-03-04 | 2021-03-04 | Unijunction transistor of silicon substrate on insulating layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120468216.6U CN214753776U (en) | 2021-03-04 | 2021-03-04 | Unijunction transistor of silicon substrate on insulating layer |
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| Publication Number | Publication Date |
|---|---|
| CN214753776U true CN214753776U (en) | 2021-11-16 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202120468216.6U Active CN214753776U (en) | 2021-03-04 | 2021-03-04 | Unijunction transistor of silicon substrate on insulating layer |
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2021
- 2021-03-04 CN CN202120468216.6U patent/CN214753776U/en active Active
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