CN212542434U - Wafer level chip package structure - Google Patents

Wafer level chip package structure Download PDF

Info

Publication number
CN212542434U
CN212542434U CN202021293886.0U CN202021293886U CN212542434U CN 212542434 U CN212542434 U CN 212542434U CN 202021293886 U CN202021293886 U CN 202021293886U CN 212542434 U CN212542434 U CN 212542434U
Authority
CN
China
Prior art keywords
fixedly connected
base
sides
heat
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202021293886.0U
Other languages
Chinese (zh)
Inventor
邱秀华
何祖辉
邱嘉龙
李志军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang Tianyi Semiconductor Technology Co ltd
Original Assignee
Zhejiang Tianyi Semiconductor Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang Tianyi Semiconductor Technology Co ltd filed Critical Zhejiang Tianyi Semiconductor Technology Co ltd
Priority to CN202021293886.0U priority Critical patent/CN212542434U/en
Application granted granted Critical
Publication of CN212542434U publication Critical patent/CN212542434U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model discloses a wafer level wafer packaging structure, the on-line screen storage device comprises a base, the center department of base bottom sets up flutedly, the middle-end fixedly connected with radiating fin at recess inner chamber top, the equal fixedly connected with solder ball in both sides at recess inner chamber top, the top of base bonds and has the heat conduction glue, the top fixedly connected with base plate of heat conduction glue, the central fixedly connected with of department of base plate top prevents the welding layer. The utility model discloses a base, the solder mask layer, radiating fin, a groove, the solder ball, the mounting panel, the fastener, a substrate, and a housing, the copper, the pin hole, the heat conduction glue, the mounting hole, the cooperation of card hole and kelly is used, it is good and convenient advantage of overhauing to possess heat dispersion, it is relatively poor to have solved current wafer level wafer encapsulation heat dispersion, at the in-process that uses, its inside heat can't distribute fast, the operating speed of easy image wafer subassembly, and simultaneously, inconvenient dismantlement comes the problem of overhauing its inside subassembly.

Description

Wafer level chip package structure
Technical Field
The utility model relates to a wafer level wafer technical field specifically is a wafer level wafer packaging structure.
Background
The wafer is one of the main raw materials of the LED, is the luminous component of the LED, the most core part of the LED, the quality of the wafer directly determines the performance of the LED, the wafer is composed of III and V group compound semiconductor substances, and when the LED is packaged, the supplied materials of the wafer are arranged on the wafer film in order.
The existing wafer level chip package has poor heat dissipation performance, and in the using process, the internal heat cannot be quickly dissipated, so that the running speed of the chip assembly is easily visualized, and meanwhile, the internal assembly is inconvenient to overhaul by dismounting.
SUMMERY OF THE UTILITY MODEL
An object of the utility model is to provide a wafer level wafer packaging structure possesses the good and convenient advantage of overhauing of heat dispersion, and it is relatively poor to have solved current wafer level wafer encapsulation heat dispersion, and at the in-process that uses, its inside heat can't distribute fast, and the functioning speed of easy image wafer subassembly, simultaneously, inconvenient dismantles the problem of examining and repairing its inside subassembly.
In order to achieve the above object, the utility model provides a following technical scheme: a wafer level chip packaging structure comprises a base, wherein a groove is formed in the center of the bottom of the base, a radiating fin is fixedly connected to the middle end of the top of a groove inner cavity, solder balls are fixedly connected to the two sides of the top of the groove inner cavity, heat-conducting glue is bonded to the top of the base, a substrate is fixedly connected to the top of the heat-conducting glue, a solder mask layer is fixedly connected to the center of the top of the substrate, a copper plate is fixedly connected to the top of the solder mask layer, an integrated circuit is fixedly connected to the top of the copper plate, a chip is fixedly connected to the center of the top of the integrated circuit, lead wires are electrically connected to the two sides of the top of the integrated circuit, the other end of each lead wire is fixedly connected to the top of the copper plate, a shell is fixedly connected to the top of the substrate and located outside the integrated, the lead holes are formed in the bottoms of the two sides of the shell, clamping rods are fixedly connected to the front side and the rear side of the left side and the right side of the top of the base plate, and the tops of the clamping rods penetrate through the top of the shell.
Preferably, the front side and the rear side of the bottoms of the two sides of the base are fixedly connected with mounting plates, and the center of the top of each mounting plate is provided with a mounting hole.
Preferably, the front side and the rear side of the two sides of the top of the base plate are both provided with fasteners in a penetrating mode, and the bottoms of the fasteners penetrate into the base and are in threaded connection with the base.
Preferably, the other end of the lead is fixedly connected with the top of the copper plate through a bonding pad, the number of the integrated circuits is several, and the integrated circuits are bonded with the top of the copper plate through an adhesive.
Preferably, the shell is provided with a clamping hole matched with the clamping rod, and the top of the clamping rod penetrates through the clamping hole and is clamped with the top of the clamping rod.
Compared with the prior art, the beneficial effects of the utility model are as follows:
1. the utility model discloses a base, the solder mask layer, radiating fin, a groove, the solder ball, the mounting panel, the fastener, a substrate, and a housing, the copper, the pin hole, the heat conduction glue, the mounting hole, the cooperation of card hole and kelly is used, it is good and convenient advantage of overhauing to possess heat dispersion, it is relatively poor to have solved current wafer level wafer encapsulation heat dispersion, at the in-process that uses, its inside heat can't distribute fast, the operating speed of easy image wafer subassembly, and simultaneously, inconvenient dismantlement comes the problem of overhauing its inside subassembly.
2. The utility model discloses a use of recess, can conveniently install radiating fin, and simultaneously, can make its bottom with the base be in same water flat line, make things convenient for radiating fin to carry out the heat conduction, use through radiating fin, can derive the heat on the base, use through the heat-conducting glue, can be connected between base plate and the base, play the heat conduction effect simultaneously, use through kelly and card hole, can conveniently install the shell on the base plate, the convenience is dismantled it simultaneously, use through the pin hole, can the pin of wafer advance to stretch out and install, use through the copper, can dispel the heat to integrated circuit's bottom, and the heat dissipation effect is improved.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is an enlarged structural view of A in FIG. 1 according to the present invention;
fig. 3 is a bottom view of the base of the present invention.
In the figure: the structure comprises a base 1, a solder mask 2, a heat dissipation fin 3, a groove 4, a solder ball 5, a mounting plate 6, a fastener 7, a substrate 8, a lead 9, a wafer 10, a housing 11, a copper plate 12, an optical lens 13, an integrated circuit 14, a bonding pad 15, a pin hole 16, a heat conduction glue 17, a mounting hole 18, a clamping hole 19 and a clamping rod 20.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "front end", "rear end", "both ends", "one end", "the other end", and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, but do not indicate or imply that the device or element to be referred must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted", "provided", "connected", and the like are to be construed broadly, such as "connected", which may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1-3, a wafer level chip package structure includes a base 1, wherein the front and rear sides of the bottom of the base 1 are fixedly connected with a mounting plate 6, a mounting hole 18 is formed at the center of the top of the mounting plate 6, a groove 4 is formed at the center of the bottom of the base 1, the heat dissipation fin 3 can be conveniently mounted by using the groove 4, and meanwhile, the heat dissipation fin and the bottom of the base 1 can be in the same horizontal line to facilitate heat conduction of the heat dissipation fin 3, the heat dissipation fin 3 is fixedly connected at the middle end of the top of the inner cavity of the groove 4, the heat on the base 1 can be conducted out by using the heat dissipation fin 3, the solder balls 5 are fixedly connected at both sides of the top of the inner cavity of the groove 4, the top of the base 1 is bonded with a heat conduction adhesive 17, the base plate 8 and the base 1 can be connected by using the, the top of the heat conducting glue 17 is fixedly connected with a substrate 8, the front side and the back side of the two sides of the top of the substrate 8 are both provided with fasteners 7 in a penetrating manner, the bottom of the fasteners 7 penetrates into the base 1 and is in threaded connection with the base, the center of the top of the substrate 8 is fixedly connected with a solder mask layer 2, the top of the solder mask layer 2 is fixedly connected with a copper plate 12, the bottom of an integrated circuit 14 can be radiated through the use of the copper plate 12, the radiating effect is improved, the top of the copper plate 12 is fixedly connected with the integrated circuit 14, the center of the top of the integrated circuit 14 is fixedly connected with a wafer 10, the two sides of the top of the integrated circuit 14 are both electrically connected with leads 9, the other ends of the leads 9 are fixedly connected with the top of the copper plate 12 through bonding pads 15, the number of the integrated circuits 14 is several, the integrated circuits 14, the top of base plate 8 just is located integrated circuit 14's outside fixedly connected with shell 11, the top of shell 11 just is located and runs through directly over wafer 10 and inlays and have optical lens 13, pin hole 16 has all been seted up to the bottom of shell 11 both sides, use through pin hole 16, can the pin of wafer advance to stretch out and install, the equal fixedly connected with kelly 20 in both sides around the top of base plate 8 top left and right sides, the top of kelly 20 runs through to the top of shell 11, seted up on the shell 11 and seted up the card hole 19 with kelly 20 cooperation use, the top of kelly 20 runs through card hole 19 and rather than the top joint, through the use of kelly 20 and card hole 19, can conveniently install shell 11 on base plate 8, the convenience is dismantled to it simultaneously, through base 1, solder mask 2, fin 3, recess 4, solder ball 5, mounting panel 6, fastener 7, base plate 8, shell 11, Copper 12, pin hole 16, heat-conducting glue 17, mounting hole 18, card hole 19 and the cooperation of kelly 20 are used, possess the good and convenient advantage of overhauing of heat dispersion, and it is relatively poor to have solved current wafer level chip package heat dispersion, and at the in-process that uses, its inside heat can't give off fast, and easy image wafer module's functioning speed, simultaneously, inconvenient dismantlement comes the problem of overhauing its inside subassembly.
During the use, through the use of recess 4, can conveniently install radiating fin 3, and simultaneously, can make its bottom with base 1 be in same water flat line, make things convenient for radiating fin 3 to carry out the heat conduction, through radiating fin 3's use, can derive the heat on the base 1, through the use of heat-conducting glue 17, can connect between base plate 8 and the base 1, play the heat conduction simultaneously, through the use of kelly 20 and card hole 19, can conveniently install shell 11 on base plate 8, conveniently dismantle it simultaneously, through the use of pin hole 16, can the pin of wafer advance to stretch out and install, through the use of copper 12, can dispel the heat to integrated circuit 14's bottom, and the radiating effect is improved.
In summary, the following steps: this wafer level chip package structure, through base 1, solder mask 2, radiating fin 3, recess 4, solder ball 5, mounting panel 6, fastener 7, base plate 8, shell 11, copper 12, pin hole 16, heat-conducting glue 17, mounting hole 18, card hole 19 and the cooperation of kelly 20 are used, it is relatively poor to have solved current wafer level chip package heat dispersion, in the process of using, its inside heat can't give off fast, the operating speed of easy image wafer subassembly, and simultaneously, the inconvenient problem of examining and repairing its inside subassembly of dismantling.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.

Claims (5)

1. A wafer level chip package structure includes a base (1), characterized in that: the heat-radiating structure is characterized in that a groove (4) is formed in the center of the bottom of the base (1), a heat-radiating fin (3) is fixedly connected to the middle end of the top of an inner cavity of the groove (4), solder balls (5) are fixedly connected to the two sides of the top of the inner cavity of the groove (4), heat-conducting glue (17) is bonded to the top of the base (1), a base plate (8) is fixedly connected to the top of the heat-conducting glue (17), a solder mask layer (2) is fixedly connected to the center of the top of the base plate (8), a copper plate (12) is fixedly connected to the top of the solder mask layer (2), an integrated circuit (14) is fixedly connected to the top of the copper plate (12), a wafer (10) is fixedly connected to the center of the top of the integrated circuit (14), lead wires (9) are electrically connected to the two sides of the top, the top of base plate (8) just is located outside fixedly connected with shell (11) of integrated circuit (14), run through directly over the top of shell (11) and be located wafer (10) and inlay and have optical lens (13), pin hole (16) have all been seted up to the bottom of shell (11) both sides, equal fixedly connected with kelly (20) in both sides around base plate (8) top left and right sides, the top of kelly (20) runs through to the top of shell (11).
2. The wafer level chip package structure of claim 1, wherein: the base (1) both sides equal fixedly connected with mounting panel (6) around the both sides bottom, mounting hole (18) have been seted up to the center department at mounting panel (6) top.
3. The wafer level chip package structure of claim 1, wherein: both sides all run through around base plate (8) top both sides and are provided with fastener (7), the bottom of fastener (7) runs through to the inside of base (1) and rather than threaded connection.
4. The wafer level chip package structure of claim 1, wherein: the other end of the lead (9) is fixedly connected with the top of the copper plate (12) through a bonding pad (15), the number of the integrated circuits (14) is a plurality, and the integrated circuits (14) are bonded with the top of the copper plate (12) through an adhesive.
5. The wafer level chip package structure of claim 1, wherein: the shell (11) is provided with a clamping hole (19) matched with the clamping rod (20) for use, and the top of the clamping rod (20) penetrates through the clamping hole (19) and is clamped with the top of the clamping rod.
CN202021293886.0U 2020-07-05 2020-07-05 Wafer level chip package structure Active CN212542434U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021293886.0U CN212542434U (en) 2020-07-05 2020-07-05 Wafer level chip package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021293886.0U CN212542434U (en) 2020-07-05 2020-07-05 Wafer level chip package structure

Publications (1)

Publication Number Publication Date
CN212542434U true CN212542434U (en) 2021-02-12

Family

ID=74521298

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202021293886.0U Active CN212542434U (en) 2020-07-05 2020-07-05 Wafer level chip package structure

Country Status (1)

Country Link
CN (1) CN212542434U (en)

Similar Documents

Publication Publication Date Title
US7586126B2 (en) Light emitting diode lighting module with improved heat dissipation structure
CN101546761A (en) High power light emitting diode module package structure
WO2012003698A1 (en) Led integrated structure
US7605020B2 (en) Semiconductor chip package
WO2023221481A1 (en) Substrate module, method for manufacturing substrate module, and display module
CN207818609U (en) A kind of flip-chip die bond structure
TWI277222B (en) LED module and method of packing the same
CN110265380A (en) A kind of peripheral apparatus ic chip package structure
CN111696925A (en) Chip packaging structure and method
CN113644186B (en) Packaging structure of flip LED chip
CN212542434U (en) Wafer level chip package structure
CN117293101A (en) Power module, manufacturing method thereof and power equipment
CN218730911U (en) Double-sided heat dissipation packaging structure with internal insulation
JP3243787U (en) LED bracket, LED lamp bead, electric base, and light emitting unit module
TWI227078B (en) Optical transmitter module
CN215636591U (en) Flip-chip two line intelligence COB light sources
CN104319337A (en) Substrate-free LED device and manufacturing method thereof
JPH0864730A (en) Semiconductor integrated circuit device
CN207624729U (en) Overlength intelligence cob light source led lamps
TW201123411A (en) A light emission module with high-efficiency light emission and high-efficiency heat dissipation and applications thereof
CN204204905U (en) Without the LED component of substrate
CN220963386U (en) 350W high-power film and television light source
TWI275191B (en) Thermal efficient package structure for high power LED
CN217037279U (en) Intelligent camera structure
TWI832546B (en) Chip package module

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant