CN212517175U - Double-chip high-reliability MOSFET device - Google Patents
Double-chip high-reliability MOSFET device Download PDFInfo
- Publication number
- CN212517175U CN212517175U CN202021721984.XU CN202021721984U CN212517175U CN 212517175 U CN212517175 U CN 212517175U CN 202021721984 U CN202021721984 U CN 202021721984U CN 212517175 U CN212517175 U CN 212517175U
- Authority
- CN
- China
- Prior art keywords
- strip
- conductive
- pin
- ceramic heat
- electrically connected
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a double-chip high-reliability MOSFET device, wherein a first strip-shaped groove, a second strip-shaped groove and a third groove are formed on one surface of a ceramic heat-conducting body, and a first conductive strip, a second conductive strip and a conductive block are respectively filled in the first strip-shaped groove, the second strip-shaped groove and the third groove; the source electrode pin is electrically connected with the first conductive strip, the drain electrode pin is electrically connected with the other end of the conductive block, and the grid electrode pin is electrically connected with the second conductive strip; the anode and the cathode of the fast recovery diode are connected to the first conductive strip and the conductive block through conductive gold wires; the side surface of the ceramic heat conduction body, which is opposite to the MOSFET chip, extends out of the epoxy packaging body, and the side surface of the ceramic heat conduction body is provided with at least 2 guide grooves in parallel. The utility model discloses two chip high reliability MOSFET devices have reduced power MOS's thermal resistance to be favorable to further improving the power of device, also improved the reliability of device.
Description
Technical Field
The utility model relates to a semiconductor device technical field especially relates to a two-chip high reliability MOSFET device.
Background
In the prior art, a lot of packaging structures related to field effect transistors, generally, a high-current packaging structure is to weld a field effect transistor directly on a circuit board, then fix the circuit board on a corresponding conductive base, and finally perform corresponding packaging. By adopting the field effect transistor packaging structure with the structure, the field effect transistor has higher working temperature and poor heat dissipation effect, so that welding spots are easily softened under the action of high temperature, and the field effect transistor and a circuit board are in poor contact to influence the work.
Disclosure of Invention
The utility model aims at providing a two chip high reliability MOSFET devices, this two chip high reliability MOSFET devices have reduced power MOS's thermal resistance to be favorable to further improving the power of device, also improved the reliability of device.
In order to achieve the above purpose, the utility model adopts the technical scheme that: a dual chip high reliability MOSFET device comprising: the semiconductor device comprises an MOSFET chip, a fast recovery diode, a ceramic heat conduction body, a source pin, a drain pin and a grid pin which are positioned in an epoxy packaging body, wherein the source pin, the drain pin and the grid pin extend outwards from the epoxy packaging body;
a first strip-shaped groove, a second strip-shaped groove and a third groove are formed in one surface of the ceramic heat conduction body, and a first conductive strip, a second conductive strip and a conductive block are respectively filled in the first strip-shaped groove, the second strip-shaped groove and the third groove;
the MOSFET chip is provided with a source region, a drain region and a gate region, the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip;
the source electrode pin is electrically connected with the first conductive strip, the drain electrode pin is electrically connected with the other end of the conductive block, and the grid electrode pin is electrically connected with the second conductive strip; the anode and the cathode of the fast recovery diode are connected to the first conductive strip and the conductive block through conductive gold wires;
the side surface of the ceramic heat conduction body, which is opposite to the MOSFET chip, extends out of the epoxy packaging body, and the side surface of the ceramic heat conduction body is provided with at least 2 guide grooves in parallel.
The further improved scheme in the technical scheme is as follows:
1. in the scheme, the drain region on the back surface of the MOSFET chip is electrically connected with one end of the conductive block.
2. In the above scheme, the cross-sectional shape of the guide groove of the ceramic heat conduction body is arc.
Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:
1. the utility model discloses two-chip high reliability MOSFET device, its MOSFET chip is installed on ceramic heat conduction body, and this source region, drain electrode region and gate region are connected with first busbar, conducting block one end and second busbar electricity respectively, and the positive pole and the negative pole of fast recovery diode are connected to first busbar, conducting block through the electrically conductive gold thread all, have prevented effectively that the induced voltage that produces in the moment of cutting off from puncturing the MOSFET chip to the reliability of device has been improved; and the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip, so that the thermal resistance of the power MOS is reduced, the power of the device is further improved, and the advantages of high power and low power consumption of the power MOS are fully exerted.
2. The utility model discloses two-chip high reliability MOSFET device, open on its pottery heat conduction body surface has first bar groove, second bar groove and third recess, and this first bar groove, second bar groove and third recess are filled respectively and are had first busbar, second busbar and conducting block, and the source pin is connected with first busbar electricity, and the drain pin is connected with the other end electricity of conducting block, the grid pin is connected with second busbar electricity, has both helped further reducing the volume of device, has also reduced the quantity of part in the device, because heat dissipation area and body are a whole simultaneously, has improved the overall structure stability of device; in addition, the side surface of the ceramic heat conduction body, which is opposite to the MOSFET chip, extends out of the epoxy packaging body, and the side surface of the ceramic heat conduction body is provided with at least 2 guide grooves in parallel, so that the area of heat exchange is increased, and the air can rapidly flow during mounting, thereby facilitating heat diffusion.
Drawings
FIG. 1 is a schematic structural diagram of a dual-chip high-reliability MOSFET device according to the present invention;
FIG. 2 is a schematic view of a portion of the structure of FIG. 1;
fig. 3 is the schematic diagram of the cross-sectional structure of the dual-chip high-reliability MOSFET device of the present invention.
In the above drawings: 1. an epoxy package; 2. a MOSFET chip; 21. a source region; 22. a MOSFET chip; 23. a MOSFET chip; 3. a ceramic thermally conductive body; 31. a first bar-shaped groove; 32. a second strip-shaped groove; 33. a third groove; 34. a side surface; 4. a source pin; 5. a drain pin; 6. a gate pin; 71. a first conductive strip; 72. a second conductive strip; 73. a conductive block; 8. a conductive wire; 9. a fast recovery diode; 10. a conductive gold wire; 11. and a guide groove.
Detailed Description
Example 1: a dual chip high reliability MOSFET device comprising: the semiconductor device comprises a MOSFET chip 2, a fast recovery diode 9, a ceramic heat conduction body 3, a source pin 4, a drain pin 5 and a grid pin 6 which are positioned in an epoxy packaging body 1, wherein the source pin 4, the drain pin 5 and the grid pin 6 extend outwards from the epoxy packaging body 1;
a first strip-shaped groove 31, a second strip-shaped groove 32 and a third groove 33 are formed in one surface of the ceramic heat conducting body 3, and a first conductive strip 71, a second conductive strip 72 and a conductive block 73 are respectively filled in the first strip-shaped groove 31, the second strip-shaped groove 32 and the third groove 33;
the MOSFET chip 2 is provided with a source region 21, a drain region 22 and a gate region 23, the MOSFET chip 2 is mounted on the ceramic heat conducting body, and the source region 21, the drain region 22 and the gate region 23 are electrically connected with the first conductive strip 71, one end of the conductive block 73 and the second conductive strip 72 respectively;
the source pin 4 is electrically connected to the first conductive strip 71, the drain pin 5 is electrically connected to the other end of the conductive block 73, and the gate pin 6 is electrically connected to the second conductive strip 72; the positive pole and the negative pole of the fast recovery diode 9 are connected to the first conductive strip 71 and the conductive block 73 through the conductive gold wire 10;
the side surface 34 of the ceramic heat conducting body 3 opposite to the MOSFET chip 2 extends from the epoxy package 1, and the side surface 34 of the ceramic heat conducting body 3 is provided with at least 2 guide grooves 11 in parallel.
The cross-sectional shape of the guide groove 11 of the ceramic heat-conducting body 3 is arc-shaped.
Example 2: a dual chip high reliability MOSFET device comprising: the semiconductor device comprises a MOSFET chip 2, a fast recovery diode 9, a ceramic heat conduction body 3, a source pin 4, a drain pin 5 and a grid pin 6 which are positioned in an epoxy packaging body 1, wherein the source pin 4, the drain pin 5 and the grid pin 6 extend outwards from the epoxy packaging body 1;
a first strip-shaped groove 31, a second strip-shaped groove 32 and a third groove 33 are formed in one surface of the ceramic heat conducting body 3, and a first conductive strip 71, a second conductive strip 72 and a conductive block 73 are respectively filled in the first strip-shaped groove 31, the second strip-shaped groove 32 and the third groove 33;
the MOSFET chip 2 is provided with a source region 21, a drain region 22 and a gate region 23, the MOSFET chip 2 is mounted on the ceramic heat conducting body, and the source region 21, the drain region 22 and the gate region 23 are electrically connected with the first conductive strip 71, one end of the conductive block 73 and the second conductive strip 72 respectively;
the source pin 4 is electrically connected to the first conductive strip 71, the drain pin 5 is electrically connected to the other end of the conductive block 73, and the gate pin 6 is electrically connected to the second conductive strip 72; the positive pole and the negative pole of the fast recovery diode 9 are connected to the first conductive strip 71 and the conductive block 73 through the conductive gold wire 10;
the side surface 34 of the ceramic heat conducting body 3 opposite to the MOSFET chip 2 extends from the epoxy package 1, and the side surface 34 of the ceramic heat conducting body 3 is provided with at least 2 guide grooves 11 in parallel.
The drain region 22 on the back side of the MOSFET chip 2 is electrically connected to one end of the conductive bump 73.
When the double-chip high-reliability MOSFET device is adopted, the breakdown of the MOSFET chip by induced voltage generated at the moment of cut-off is effectively prevented, so that the reliability of the device is improved; the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip, so that the thermal resistance of the power MOS is reduced, the power of the device is further improved, and the advantages of high power and low power consumption of the power MOS are fully exerted; in addition, the volume of the device is further reduced, the number of parts in the device is reduced, and meanwhile, the stability of the whole structure of the device is improved as the heat dissipation area and the body are integrated; in addition, the heat exchanger not only increases the area of heat exchange, but also is beneficial to the rapid flow of air during mounting, thereby facilitating the heat diffusion.
The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose of the embodiments is to enable people skilled in the art to understand the contents of the present invention and to implement the present invention, which cannot limit the protection scope of the present invention. All equivalent changes and modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.
Claims (3)
1. A kind of double-chip high reliability MOSFET device, characterized by: the method comprises the following steps: the semiconductor device comprises an MOSFET chip (2), a fast recovery diode (9), a ceramic heat conduction body (3), a source pin (4), a drain pin (5) and a grid pin (6) which are positioned in an epoxy packaging body (1), wherein the source pin (4), the drain pin (5) and the grid pin (6) extend outwards from the epoxy packaging body (1);
a first strip-shaped groove (31), a second strip-shaped groove (32) and a third groove (33) are formed in one surface of the ceramic heat conduction body (3), and a first conductive strip (71), a second conductive strip (72) and a conductive block (73) are respectively filled in the first strip-shaped groove (31), the second strip-shaped groove (32) and the third groove (33);
the MOSFET chip (2) is provided with a source region (21), a drain region (22) and a gate region (23), the MOSFET chip (2) is mounted on the ceramic heat conduction body, and the source region (21), the drain region (22) and the gate region (23) are electrically connected with the first conductive strip (71), one end of the conductive block (73) and the second conductive strip (72) respectively;
the source pin (4) is electrically connected with the first conductive strip (71), the drain pin (5) is electrically connected with the other end of the conductive block (73), and the gate pin (6) is electrically connected with the second conductive strip (72); the positive pole and the negative pole of the fast recovery diode (9) are connected to the first conductive strip (71) and the conductive block (73) through conductive gold wires (10);
the side surface (34) of the ceramic heat conduction body (3) opposite to the MOSFET chip (2) extends out of the epoxy packaging body (1), and the side surface (34) of the ceramic heat conduction body (3) is provided with at least 2 guide grooves (11) in parallel.
2. The dual chip high reliability MOSFET device of claim 1, wherein: the drain region (22) on the back of the MOSFET chip (2) is electrically connected with one end of the conductive block (73).
3. The dual chip high reliability MOSFET device of claim 1, wherein: the cross section of the guide groove (11) of the ceramic heat conduction body (3) is arc-shaped.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202021721984.XU CN212517175U (en) | 2020-08-18 | 2020-08-18 | Double-chip high-reliability MOSFET device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202021721984.XU CN212517175U (en) | 2020-08-18 | 2020-08-18 | Double-chip high-reliability MOSFET device |
Publications (1)
Publication Number | Publication Date |
---|---|
CN212517175U true CN212517175U (en) | 2021-02-09 |
Family
ID=74384846
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202021721984.XU Active CN212517175U (en) | 2020-08-18 | 2020-08-18 | Double-chip high-reliability MOSFET device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN212517175U (en) |
-
2020
- 2020-08-18 CN CN202021721984.XU patent/CN212517175U/en active Active
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106252320B (en) | Semiconductor device with a plurality of semiconductor chips | |
Ikeda et al. | Investigation on wirebond-less power module structure with high-density packaging and high reliability | |
CN201773840U (en) | IGBT (insulated-gate bipolar transistor) power module without bonding wires | |
CN218568825U (en) | Do benefit to radiating field effect transistor for new energy automobile | |
JP2014157927A (en) | Semiconductor device and manufacturing method of the same | |
CN109860160B (en) | Power module with compact structure and low parasitic inductance | |
CN116130477A (en) | Intelligent power module and electronic equipment with same | |
WO2022127060A1 (en) | Power device packaging structure and power electronic device | |
CN113496977B (en) | Cascode semiconductor device and method of manufacture | |
CN212517175U (en) | Double-chip high-reliability MOSFET device | |
CN219435850U (en) | MOSFET chip packaging structure | |
CN212517180U (en) | High-power rapid heat dissipation type MOS device | |
CN212517177U (en) | Power MOS semiconductor device | |
CN212517178U (en) | Double-chip power MOSFET packaging structure | |
CN212517182U (en) | Quick radiating semiconductor MOS field effect transistor | |
CN212517176U (en) | Direct plug-in MOSFET transistor | |
CN212517179U (en) | Packaging structure of power MOS | |
CN215266282U (en) | Packaging structure of power semiconductor device | |
CN211182198U (en) | Multi-base-island lead frame and SOP packaging structure | |
CN212517181U (en) | In-line MOS field effect transistor | |
CN114078831A (en) | MOS type power device | |
CN209963052U (en) | Low internal resistance MOS packaging structure | |
CN114628375A (en) | Crimping type semiconductor sub-module and module | |
CN209496882U (en) | A kind of mounting structure of chip diode | |
CN111834238A (en) | High-power semiconductor device packaging method adopting bumps and flip chip |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |