CN212517178U - Double-chip power MOSFET packaging structure - Google Patents

Double-chip power MOSFET packaging structure Download PDF

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Publication number
CN212517178U
CN212517178U CN202021722006.7U CN202021722006U CN212517178U CN 212517178 U CN212517178 U CN 212517178U CN 202021722006 U CN202021722006 U CN 202021722006U CN 212517178 U CN212517178 U CN 212517178U
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conductive
ceramic heat
strip
pin
heat conduction
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CN202021722006.7U
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Chinese (zh)
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张开航
马云洋
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Suzhou Qinlv Electronic Technology Co ltd
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Suzhou Qinlv Electronic Technology Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48111—Disposition the wire connector extending above another semiconductor or solid-state body

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model discloses a double-chip power MOSFET packaging structure, wherein a source electrode pin, a drain electrode pin and a grid electrode pin of the double-chip power MOSFET packaging structure extend outwards from an epoxy packaging body; the MOSFET chip is arranged on the ceramic heat conducting body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip; the source electrode pin is electrically connected with the first conductive strip, the drain electrode pin is electrically connected with the other end of the conductive block, and the grid electrode pin is electrically connected with the second conductive strip; the ceramic heat conduction body is provided with a heat dissipation plate extending out of the end face of the epoxy packaging body, and the anode and the cathode of the fast recovery diode are connected to the first conductive strip and the conductive block through conductive gold wires; the side surface of the ceramic heat conducting body is provided with at least 2 guide grooves in parallel. The utility model discloses be favorable to further improving the power of device, the heat diffusion of also being convenient for prevents that steam from getting into inside the device.

Description

Double-chip power MOSFET packaging structure
Technical Field
The utility model relates to a semiconductor device technical field especially relates to a double chip power MOSFET packaging structure.
Background
A metal-oxide semiconductor field effect transistor, referred to as a mosfet for short, is a field effect transistor that can be widely used in analog circuits and digital circuits. MOSFETs are classified into two types, an "N type" and a "P type", according to their "channel" polarities.
The field effect transistor is widely applied to the industrial fields of synchronous rectification switching power supplies and pulse power supplies, for this reason, a lot of packaging structures related to the field effect transistor in the prior art, and the packaging structure of general heavy current is to weld the field effect transistor directly on a circuit board, then fix the circuit board on a corresponding conductive base, and finally carry out corresponding packaging. By adopting the field effect transistor packaging structure with the structure, the field effect transistor has higher working temperature and poor heat dissipation effect, so that the welding spot is easy to soften under the action of high temperature.
Disclosure of Invention
The utility model aims at providing a two chip power MOSFET packaging structure, this two chip power MOSFET packaging structure have avoided the layering of ceramic heat conduction body and epoxy packaging body, prevent that steam from getting into inside the device, both increased the area with the heat exchange, the air flows fast when also being favorable to pasting the dress to the heat diffusion of being convenient for.
In order to achieve the above purpose, the utility model adopts the technical scheme that: a dual chip power MOSFET package structure comprising: the semiconductor device comprises an MOSFET chip, a fast recovery diode, a ceramic heat conduction body, a source pin, a drain pin and a grid pin which are positioned in an epoxy packaging body, wherein the source pin, the drain pin and the grid pin extend outwards from the epoxy packaging body;
a first strip-shaped groove, a second strip-shaped groove and a third groove are formed in one surface of the ceramic heat conduction body, and a first conductive strip, a second conductive strip and a conductive block are respectively filled in the first strip-shaped groove, the second strip-shaped groove and the third groove;
the MOSFET chip is provided with a source region, a drain region and a gate region, the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip;
the source electrode pin is electrically connected with the first conductive strip, the drain electrode pin is electrically connected with the other end of the conductive block, and the grid electrode pin is electrically connected with the second conductive strip;
the ceramic heat conduction body is provided with a heat dissipation plate extending out of the end face of the epoxy packaging body, and the ceramic heat conduction body in the epoxy packaging body is provided with at least one through hole; the anode and the cathode of the fast recovery diode are connected to the first conductive strip and the conductive block through conductive gold wires;
the side surface of the ceramic heat conduction body, which is opposite to the MOSFET chip, extends out of the epoxy packaging body, and the side surface of the ceramic heat conduction body is provided with at least 2 guide grooves in parallel.
The further improved scheme in the technical scheme is as follows:
1. in the above scheme, the number of the through holes of the ceramic heat conduction body is 2.
2. In the above scheme, the cross-sectional shape of the guide groove of the ceramic heat conduction body is arc.
Because of above-mentioned technical scheme's application, compared with the prior art, the utility model have the following advantage:
1. the utility model discloses two chip power MOSFET packaging structure, its MOSFET chip is installed on ceramic heat conduction body, and this source region, drain electrode region and gate region are connected with first busbar, conducting block one end and second busbar electricity respectively, and the positive pole and the negative pole of fast recovery diode are connected to first busbar, conducting block through the electrically conductive gold thread all, have prevented effectively that the induced voltage that produces in the moment of cutting off from puncturing the MOSFET chip to the reliability of device has been improved; the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip, so that the thermal resistance of the power MOS is reduced, the power of the device is further improved, and the advantages of high power and low power consumption of the power MOS are fully exerted; in addition, the side surface of the ceramic heat conduction body, which is opposite to the MOSFET chip, extends out of the epoxy packaging body, and the side surface of the ceramic heat conduction body is provided with at least 2 guide grooves in parallel, so that the area of heat exchange is increased, and the air can rapidly flow during mounting, thereby facilitating heat diffusion.
2. The utility model discloses two chip power MOSFET packaging structure, it has first bar groove, second bar groove and third recess to open on its pottery heat conduction body surface, and this first bar groove, second bar groove and third recess are filled respectively and are had first busbar, second busbar and conducting block, and the source pin is connected with first busbar electricity, and the drain pin is connected with the other end electricity of conducting block, the grid pin is connected with second busbar electricity, has both helped further reducing the volume of device, has also reduced the figure of part in the device, because heat dissipation area and body are a whole simultaneously, has improved the whole structural stability of device; in addition, the ceramic heat conducting body is provided with a heat radiating plate extending out of the end face of the epoxy packaging body, and the ceramic heat conducting body in the epoxy packaging body is provided with at least one through hole, so that the heat diffusion is further improved, the layering of the ceramic heat conducting body and the epoxy packaging body is also avoided, and water vapor is prevented from entering the device.
Drawings
Fig. 1 is a schematic structural diagram of a dual-chip power MOSFET package structure according to the present invention;
FIG. 2 is a schematic view of a portion of the structure of FIG. 1;
fig. 3 is a schematic diagram of a cross-sectional structure of the dual-chip power MOSFET package structure according to the present invention.
In the above drawings: 1. an epoxy package; 2. a MOSFET chip; 21. a source region; 22. a MOSFET chip; 23. a MOSFET chip; 3. a ceramic thermally conductive body; 31. a first bar-shaped groove; 32. a second strip-shaped groove; 33. a third groove; 34. a side surface; 4. a source pin; 5. a drain pin; 6. a gate pin; 71. a first conductive strip; 72. a second conductive strip; 73. a conductive block; 8. a conductive wire; 9. a heat dissipation plate; 10. a through hole; 11. a fast recovery diode; 12. a conductive gold wire; 13. and a guide groove.
Detailed Description
Example 1: a dual chip power MOSFET package structure comprising: the semiconductor device comprises a MOSFET chip 2, a fast recovery diode 11, a ceramic heat conduction body 3, a source pin 4, a drain pin 5 and a grid pin 6 which are positioned in an epoxy packaging body 1, wherein the source pin 4, the drain pin 5 and the grid pin 6 extend outwards from the epoxy packaging body 1;
a first strip-shaped groove 31, a second strip-shaped groove 32 and a third groove 33 are formed in one surface of the ceramic heat conducting body 3, and a first conductive strip 71, a second conductive strip 72 and a conductive block 73 are respectively filled in the first strip-shaped groove 31, the second strip-shaped groove 32 and the third groove 33;
the MOSFET chip 2 is provided with a source region 21, a drain region 22 and a gate region 23, the MOSFET chip 2 is mounted on the ceramic heat conducting body, and the source region 21, the drain region 22 and the gate region 23 are electrically connected with the first conductive strip 71, one end of the conductive block 73 and the second conductive strip 72 respectively;
the source pin 4 is electrically connected to the first conductive strip 71, the drain pin 5 is electrically connected to the other end of the conductive block 73, and the gate pin 6 is electrically connected to the second conductive strip 72;
the ceramic heat conducting body 3 is provided with a heat radiating plate 9 extending out of the end face of the epoxy packaging body 1, and the ceramic heat conducting body 3 positioned in the epoxy packaging body 1 is provided with at least one through hole 10; the anode and cathode of the fast recovery diode 11 are connected to the first conducting strip 71 and the conducting block 73 through the conducting gold wire 12;
the side surface 34 of the ceramic heat conducting body 3 opposite to the MOSFET chip 2 extends from the epoxy package 1, and the side surface 34 of the ceramic heat conducting body 3 is opened with at least 2 guide grooves 13 in parallel.
The cross-sectional shape of the guide groove 13 of the ceramic heat-conducting body 3 is arc-shaped.
Example 2: a dual chip power MOSFET package structure comprising: the semiconductor device comprises a MOSFET chip 2, a fast recovery diode 11, a ceramic heat conduction body 3, a source pin 4, a drain pin 5 and a grid pin 6 which are positioned in an epoxy packaging body 1, wherein the source pin 4, the drain pin 5 and the grid pin 6 extend outwards from the epoxy packaging body 1;
a first strip-shaped groove 31, a second strip-shaped groove 32 and a third groove 33 are formed in one surface of the ceramic heat conducting body 3, and a first conductive strip 71, a second conductive strip 72 and a conductive block 73 are respectively filled in the first strip-shaped groove 31, the second strip-shaped groove 32 and the third groove 33;
the MOSFET chip 2 is provided with a source region 21, a drain region 22 and a gate region 23, the MOSFET chip 2 is mounted on the ceramic heat conducting body, and the source region 21, the drain region 22 and the gate region 23 are electrically connected with the first conductive strip 71, one end of the conductive block 73 and the second conductive strip 72 respectively;
the source pin 4 is electrically connected to the first conductive strip 71, the drain pin 5 is electrically connected to the other end of the conductive block 73, and the gate pin 6 is electrically connected to the second conductive strip 72;
the ceramic heat conducting body 3 is provided with a heat radiating plate 9 extending out of the end face of the epoxy packaging body 1, and the ceramic heat conducting body 3 positioned in the epoxy packaging body 1 is provided with at least one through hole 10; the anode and cathode of the fast recovery diode 11 are connected to the first conducting strip 71 and the conducting block 73 through the conducting gold wire 12;
the side surface 34 of the ceramic heat conducting body 3 opposite to the MOSFET chip 2 extends from the epoxy package 1, and the side surface 34 of the ceramic heat conducting body 3 is opened with at least 2 guide grooves 13 in parallel.
The source region 21 and the drain region 22 of the MOSFET chip 2 are electrically connected to the first conductive strip 71 and the second conductive strip 72 respectively through the conductive line 8.
The number of the through holes 10 of the ceramic heat-conducting body 3 is 2.
When the double-chip power MOSFET packaging structure is adopted, the breakdown of an MOSFET chip by induced voltage generated at the moment of cut-off is effectively prevented, so that the reliability of a device is improved; the MOSFET chip is arranged on the ceramic heat conduction body, and the source region, the drain region and the gate region are respectively and electrically connected with the first conductive strip, one end of the conductive block and the second conductive strip, so that the thermal resistance of the power MOS is reduced, the power of the device is further improved, and the advantages of high power and low power consumption of the power MOS are fully exerted; in addition, the volume of the device is further reduced, the number of parts in the device is reduced, and meanwhile, the stability of the whole structure of the device is improved as the heat dissipation area and the body are integrated; in addition, the lamination of the ceramic heat-conducting body and the epoxy packaging body is avoided, and water vapor is prevented from entering the device; in addition, the heat exchanger not only increases the area of heat exchange, but also is beneficial to the rapid flow of air during mounting, thereby facilitating the heat diffusion.
The above embodiments are only for illustrating the technical concept and features of the present invention, and the purpose of the embodiments is to enable people skilled in the art to understand the contents of the present invention and to implement the present invention, which cannot limit the protection scope of the present invention. All equivalent changes and modifications made according to the spirit of the present invention should be covered by the protection scope of the present invention.

Claims (3)

1. A kind of double-chip power MOSFET encapsulated structure, characterized by that: the method comprises the following steps: the semiconductor device comprises an MOSFET chip (2), a fast recovery diode (11), a ceramic heat conduction body (3), a source pin (4), a drain pin (5) and a grid pin (6) which are positioned in an epoxy packaging body (1), wherein the source pin (4), the drain pin (5) and the grid pin (6) extend outwards from the epoxy packaging body (1);
a first strip-shaped groove (31), a second strip-shaped groove (32) and a third groove (33) are formed in one surface of the ceramic heat conduction body (3), and a first conductive strip (71), a second conductive strip (72) and a conductive block (73) are respectively filled in the first strip-shaped groove (31), the second strip-shaped groove (32) and the third groove (33);
the MOSFET chip (2) is provided with a source region (21), a drain region (22) and a gate region (23), the MOSFET chip (2) is mounted on the ceramic heat conduction body, and the source region (21), the drain region (22) and the gate region (23) are electrically connected with the first conductive strip (71), one end of the conductive block (73) and the second conductive strip (72) respectively;
the source pin (4) is electrically connected with the first conductive strip (71), the drain pin (5) is electrically connected with the other end of the conductive block (73), and the gate pin (6) is electrically connected with the second conductive strip (72);
the ceramic heat conduction body (3) is provided with a heat dissipation plate (9) extending out of the end face of the epoxy packaging body (1), and the ceramic heat conduction body (3) positioned in the epoxy packaging body (1) is provided with at least one through hole (10); the positive pole and the negative pole of the fast recovery diode (11) are connected to the first conductive strip (71) and the conductive block (73) through conductive gold wires (12);
the side surface (34) of the ceramic heat conduction body (3) opposite to the MOSFET chip (2) extends out of the epoxy packaging body (1), and the side surface (34) of the ceramic heat conduction body (3) is provided with at least 2 guide grooves (13) in parallel.
2. The dual chip power MOSFET package of claim 1, wherein: the number of the through holes (10) of the ceramic heat conduction body (3) is 2.
3. The dual chip power MOSFET package of claim 1, wherein: the cross section of the guide groove (13) of the ceramic heat conduction body (3) is arc-shaped.
CN202021722006.7U 2020-08-18 2020-08-18 Double-chip power MOSFET packaging structure Active CN212517178U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202021722006.7U CN212517178U (en) 2020-08-18 2020-08-18 Double-chip power MOSFET packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202021722006.7U CN212517178U (en) 2020-08-18 2020-08-18 Double-chip power MOSFET packaging structure

Publications (1)

Publication Number Publication Date
CN212517178U true CN212517178U (en) 2021-02-09

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202021722006.7U Active CN212517178U (en) 2020-08-18 2020-08-18 Double-chip power MOSFET packaging structure

Country Status (1)

Country Link
CN (1) CN212517178U (en)

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