CN111554645B - Double-sided water-cooling SiC half-bridge module packaging structure integrated with laminated busbar - Google Patents
Double-sided water-cooling SiC half-bridge module packaging structure integrated with laminated busbar Download PDFInfo
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- CN111554645B CN111554645B CN202010268574.2A CN202010268574A CN111554645B CN 111554645 B CN111554645 B CN 111554645B CN 202010268574 A CN202010268574 A CN 202010268574A CN 111554645 B CN111554645 B CN 111554645B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
- H01L23/4924—Bases or plates or solder therefor characterised by the materials
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
Abstract
The invention discloses a double-sided water-cooling SiC half-bridge module packaging structure of an integrated laminated busbar. The packaging structure comprises a main body structure, an external connection structure and a heat dissipation device, wherein the external connection structure and the heat dissipation device are connected with the main body structure. The main body structure comprises an upper DBC, a lower DBC, a SiC semiconductor chip and a gasket. The external connection structure comprises a laminated busbar and an alternating current busbar, and the laminated busbar comprises a positive busbar and a negative busbar. The radiator comprises two water-cooling radiators which are respectively connected with the upper DBC and the lower DBC. The packaging structure has the advantages of low value of parasitic inductance, good flow equalizing effect, high heat dissipation coefficient and balanced heat dissipation, realizes the miniaturization, modularization and standardization design of the device, and can fully play the high-speed and high-temperature characteristics of the SiC device.
Description
Technical Field
The invention relates to a semiconductor device, in particular to a double-sided water-cooled SiC half-bridge module packaging structure integrated with a laminated busbar.
Background
The power semiconductor device is a core component of the power electronic converter. In recent years, with the rapid development of power electronic technology in the fields of new energy power generation, electric vehicles, and the like, and the development of wide bandgap semiconductors such as SiC, new demands have been made on power semiconductor devices.
Although wide bandgap semiconductors such as SiC have higher operating temperatures, higher breakdown voltage strengths, higher thermal conductivities, and higher switching frequencies than Si-based semiconductors. However, when the conventional packaging technology based on Si power devices is used to package wide bandgap semiconductor power devices, two major problems are caused. Firstly, the traditional packaging technology adopts wire bonding to realize complex internal interconnection in the structure, which can bring larger parasitic inductance, when the power semiconductor device is turned off, the energy stored in the larger parasitic inductance can cause voltage spike and oscillation, and the loss can be increased, and along with the increasing switching speed of the power semiconductor device in recent years, the problem of the packaged parasitic inductance is more prominent. Therefore, in order to ensure the performance and safe operation of the power device and the power electronic system, attention needs to be paid to reducing the parasitic inductance of the package when the power module is packaged. Secondly, the heat dissipation mode of traditional packaging technology is mostly single face heat dissipation, consequently, the radiating efficiency is poor. The SiC device can work at a higher temperature, so that the SiC device has a higher requirement in terms of heat dissipation, and if there is no efficient heat dissipation manner, the reliability of the module is affected.
Therefore, the development of a package structure with low parasitic inductance and high efficiency heat dissipation has become a hot issue of research, which has been deeply theoretically analyzed by academic papers, and has an engineering method for practical application, such as the invention application patent of "package structure and processing technology of double-sided heat dissipation IPM hybrid module" (CN109920785A) and "three-dimensional stacked package structure of semiconductor device with fixing device and double-sided water cooling" (CN 103367278A).
The packaging structure and the processing technology of the double-sided heat dissipation IPM hybrid module disclosed in the Chinese invention patent application publication specification are in a packaging form of upper and lower double substrates and flip chips, and an emitter of an IGBT chip and an anode of an SBD chip are connected to a lead frame through a copper-clad ceramic plate, so that bonding leads are reduced, and the reliability of the module is improved; and the nano silver interconnection layer replaces a solder layer between the chip and the substrate, so that the high-temperature characteristic of the SiC material is favorably exerted, and the longitudinal conduction capability of heat from the chip to the substrate is improved, so that the highest temperature of the IPM hybrid module is reduced, and the service life of the module is prolonged. However, this structure has the following disadvantages:
1. the structure does not consider a method for reducing the power terminal, and most of the inductance of the packaging structure comes from the power terminal:
2. the structure does not use water cooling for heat dissipation, and cannot meet the requirements of high-power devices
The three-dimensional stacked packaging structure of the semiconductor device with the fixing device and double-sided water cooling disclosed by the patent application publication specification of the Chinese invention realizes three-dimensional packaging of the semiconductor device, has no lead bonding, reduces the line resistance and the self inductance generated by the lead bonding, adopts double-sided water cooling heat dissipation, and has small volume, large integrated power and large heat dissipation coefficient. Meanwhile, each laminated plate can package any number of semiconductor elements with the same or different sizes, the preset fixing structure effectively prevents the semiconductor elements from sliding when being impacted externally, the deformable connecting piece prevents the device from deforming even damaging the SiC semiconductor chip when being impacted, vibrated, expanded with heat and contracted with cold and the like when in work, and each laminated plate is provided with a temperature and pressure detection device for preventing the service life loss of the SiC semiconductor chip caused by improper use environment. However, this structure has the following disadvantages:
1. the structure does not consider the balanced heat dissipation of each SiC semiconductor chip;
2. the structure does not consider the consistency of the distribution of the parasitic inductances of the branches.
Disclosure of Invention
The invention aims to provide a double-sided water-cooled SiC half-bridge model packaging structure integrated with a laminated busbar. Aiming at the problem of large parasitic inductance in the prior packaging technology, a 3D packaging structure adopting leadless bonding and a method of utilizing a laminated busbar are provided to obtain smaller parasitic inductance, and the packaging structure is symmetrical, so that the inductances of all branches of a plurality of SiC semiconductor chips in a parallel structure are uniformly distributed, and a good current equalizing effect is obtained; the double-sided water-cooling radiator can obtain excellent radiating effect and improve the reliability of the module.
In order to achieve the purpose, the invention provides a double-sided water-cooled SiC half-bridge module packaging structure integrated with a laminated busbar, which comprises a main body structure, an external connection structure and a heat dissipation device, wherein the main body structure comprises an upper DBC, a lower DBC, six SiC semiconductor chips and six gaskets;
the upper DBC and the lower DBC have the same structure and respectively comprise a DBC substrate, two driving guide pins and three copper foils; the cross section of the DBC substrate is circular, and the DBC substrate sequentially comprises a substrate lower copper layer, a substrate ceramic layer and a substrate upper copper layer from bottom to top, wherein the substrate upper copper layer is a graphical copper layer and comprises six partial sector copper, one gate main copper and three gate branch copper; the six partial fan-shaped copper blocks and the substrate ceramic layer are concentric and uniformly distributed, one gate main copper block extends to the edge of the substrate ceramic layer by taking the center of the substrate ceramic layer as a starting point, the tail part of the gate main copper block is provided with a gate signal inflow terminal, three gate branch copper blocks extend to the center direction of short arc sides of three partial fan-shaped copper blocks in a uniformly distributed manner by taking the center of the substrate ceramic layer as a starting point, the tail part of each gate branch copper block is provided with a gate connecting terminal, and a gap is reserved between each gate connecting terminal and the corresponding partial fan-shaped copper block; one of the driving guide pins is welded on the gate stem main copper, the other one of the driving guide pins is welded on the lower copper layer of the substrate, and the two driving guide pins are aligned in the radial position; one end of the copper foil is fixedly connected to the lower copper layer of the substrate, the other end of the copper foil is fixedly connected to part of the fan-shaped copper corresponding to the gate branch copper, and the positions of the three copper foils are uniformly distributed;
the six gaskets and the six SiC semiconductor chips are divided into two groups, the gate electrodes of the first group of three SiC semiconductor chips are respectively welded with three gate electrode connecting terminals on the upper DBC, the source electrodes are respectively welded with three partial fan-shaped copper corresponding to the gate electrode branch copper on the upper DBC, and the drain electrodes are respectively welded with one side of the first group of three gaskets; the gate electrodes of the second group of three SiC semiconductor chips are respectively welded with three gate electrode connecting terminals on the lower DBC, the source electrodes are respectively welded with three partial fan-shaped copper corresponding to the upper gate electrode branch copper of the lower DBC, and the drain electrodes are respectively welded with one side of the second group of three gaskets;
the positive busbar and the negative busbar are of the same structure and are both rectangular copper plates, round holes are reserved in the middle positions of the rectangular copper plates, the size of each round hole is matched with that of the DBC substrate, namely, the DBC substrate can be ensured to be embedded in the round holes, and two ends of each rectangular copper plate are respectively provided with a reserved direct-current terminal socket and a row of reserved decoupling capacitor connecting terminals socket; the three pins are uniformly distributed and installed at the hole edge of the round hole of the positive busbar, the three pins are uniformly distributed and installed at the hole edge of the round hole of the negative busbar after rotating for 60 degrees, a layer of insulating paper is padded on the contact surface of the positive busbar and the negative busbar, and the negative busbar and the positive busbar are pressed together to form a laminated busbar;
the alternating-current busbar is in an inverted-U shape and comprises a rectangular main board and two rectangular side boards, the main board and the side boards are copper boards, a round hole which is the same as the laminated busbar is reserved in the middle of the rectangular main board, an alternating-current terminal reserved socket is arranged on each of the two rectangular side boards, and six pins are uniformly distributed and installed on the hole edge of the round hole of the alternating-current busbar;
the upper DBC is embedded in a round hole of the alternating-current busbar, part of fan-shaped copper of the upper DBC is connected with pins of the alternating-current busbar, the lower DBC is embedded in a round hole of the laminated busbar, and part of fan-shaped copper of the lower DBC is connected with pins of the laminated busbar;
then, after two gate main copper of the upper DBC and the lower DBC are aligned in the radial direction, the other side of the first group of three gaskets is welded with three partial fan-shaped copper parts, which are not corresponding to the gate branch copper, on the lower DBC, and the other side of the second group of three gaskets is welded with three partial fan-shaped copper parts, which are not corresponding to the gate branch copper, on the upper DBC, so that the assembly of the packaging structure except the heat dissipation device is completed;
the heat dissipation device comprises two water-cooled radiators with the same structure, a water inlet and three water outlets are reserved on the front surface of each water-cooled radiator, the position of the water inlet is the center of the water-cooled radiator, the positions of the three water outlets correspond to the positions of SiC semiconductor chips in the main body structure, and the back surfaces of the two water-cooled radiators are respectively bonded with the lower copper layers of the substrates of the upper DBC and the lower DBC through heat conduction grease.
Preferably, the patterned copper layer is formed by forming a copper layer on the substrate ceramic layer by a plating method, and then forming a different patterned layout by an etching method.
Preferably, the source and the gate of the SiC semiconductor chip are on the same surface of the SiC semiconductor chip, and the drain is on the other surface of the SiC semiconductor chip.
Preferably, the material of the spacer is metallic molybdenum having a close thermal matching coefficient to the SiC semiconductor chip.
Preferably, the six pins of the laminated busbar are aligned with the six pins of the alternating busbar in radial position.
Preferably, uniformly distributed turbulence columns are arranged in the cavities of the two water-cooled radiators.
According to the technical scheme, compared with the prior art, the invention has the following advantages:
1. the laminated busbar is integrated into a packaging structure, so that the problem of large inductance of a power terminal is solved, and the symmetrical design of the laminated busbar and an alternating current busbar can ensure that the distance difference between a pin and a reserved socket of a direct current terminal or the reserved socket of an alternating current terminal is not large as much as possible, so that parasitic parameters of all branches are consistent as much as possible.
2. The upper DBC and the lower DBC are designed into a circular structure and are symmetrically arranged, so that the parasitic inductance distribution of the upper DBC and the lower DBC tends to be consistent; the main structure formed by the upper DBC, the lower DBC, the gasket and the SiC semiconductor chip is a 3D structure, so that current can flow in the vertical direction, and the area of a current conversion loop is greatly reduced due to the fact that the vertical height is extremely small and is about 3mm, so that parasitic inductance can be effectively reduced.
3. The two water-cooled radiators are respectively bonded with the lower copper layers of the substrates of the upper DBC and the lower DBC, double-sided water cooling is achieved, and the three water outlets correspond to the positions of the SiC semiconductor chips, so that water flow can evenly cool each SiC semiconductor chip, and the purpose of balanced heat dissipation is achieved.
Drawings
FIG. 1 is a circuit diagram of a package structure according to the present invention;
FIG. 2 is an expanded view of the main structure;
FIG. 3 is a schematic diagram of a DBC substrate structure;
FIG. 4 is a schematic diagram of a patterned copper layer structure of a DBC substrate;
FIG. 5 is an enlarged view of the gate connection terminal of the chip at point A in FIG. 4;
fig. 6 is a distribution diagram of a SiC semiconductor chip soldered to a DBC substrate of an upper DBC or a lower DBC;
FIG. 7 is a schematic view of the front side of the upper DBC after the gasket is installed;
FIG. 8 is a schematic diagram of a laminated busbar structure;
FIG. 9 is a cross-sectional view of a pre-socket for a decoupling capacitor connection terminal;
FIG. 10 is an expanded view of the laminated busbar;
FIG. 11 is a cross-sectional view of the laminated busbar and the lower DBC;
fig. 12 is a schematic view of an ac busbar structure;
fig. 13 is a schematic diagram of the connection between the ac busbar and the upper DBC;
FIG. 14 is a cross-sectional view of the connection of the upper DBC and the lower DBC;
FIG. 15 is a schematic view of the front side of the upper DBC and the lower DBC after they are connected;
FIG. 16 is a schematic diagram of a rear front side structure of the integrated heat dissipation device;
FIG. 17 is a schematic diagram of a front view of a water-cooled heat sink;
FIG. 18 is a schematic view of the internal structure of a water-cooled heat sink;
fig. 19 is an enlarged view of the front structure of the SiC semiconductor chip.
FIG. 20 is a schematic view showing the corresponding mounting positions of the upper DBC and the lower DBC
The device comprises an upper DBC (dielectric barrier metal) 1, a lower DBC2, a copper foil 3, a 4-drive pin, a 5-SiC semiconductor chip, a 6-spacer, a 7-substrate upper copper layer, an 8-substrate ceramic layer, a 9-substrate lower copper layer, 10-part fan-shaped copper, 11-gate-pole main dry copper, 12-gate-pole signal inflow terminal, 13-gate-pole connecting terminal, 14-positive bus bar, 15-negative bus bar, 16-laminated bus bar, 17-direct-current-terminal reserved socket, 18 pins, 19-decoupling-capacitor-connecting-terminal reserved socket, 20-alternating-current bus bar, 21-alternating-current-terminal reserved socket, 22-water-cooling radiator, 23 source electrode, 24 water inlet, 25 water outlet, 26-turbulent-flow column, 27-gate-pole branch copper and 28-gate pole.
Detailed Description
The present invention will be described with reference to the accompanying drawings.
Fig. 1 is a circuit diagram of the package structure of the present invention. In the figure, P is a direct current positive electrode, N is a direct current negative electrode, AC is an alternating current terminal, T1-T6 are six SiC semiconductor chips 5, wherein T1, T2 and T3 are the SiC semiconductor chips 5 with the upper arm connected in parallel, T4, T5 and T6 are the SiC semiconductor chips 5 with the lower arm connected in parallel, the SiC semiconductor chips 5 connected in parallel increase the total current, and the power with which the package structure can be integrated is larger.
The invention discloses a double-sided water-cooled SiC half-bridge module packaging structure integrated with a laminated busbar, which comprises a main body structure, an external connection structure and a heat dissipation device, wherein the main body structure comprises an upper DBC1, a lower DBC2, six SiC semiconductor chips 5 and six gaskets 6, the external connection structure comprises a laminated busbar 16 and an alternating current busbar 20, the laminated busbar 16 comprises an anode busbar 14 and a cathode busbar 15, and the heat dissipation device comprises two water-cooled heat dissipaters 22.
Fig. 2 is an expanded view of the main structure, fig. 3 is a schematic view of a DBC substrate structure, fig. 4 is a schematic view of a patterned copper layer structure of the DBC substrate, and fig. 5 is an enlarged view of a gate connection terminal of a chip at a point a in fig. 4. As can be seen from fig. 2 to 5, the upper DBC1 and the lower DBC2 have the same structure, and each comprises a DBC substrate, two driving pins 4 and three copper foils 3.
The cross section of the DBC substrate is circular, the lower copper layer 9 of the substrate, the ceramic layer 8 of the substrate and the upper copper layer 7 of the substrate are sequentially arranged from bottom to top, the upper copper layer 7 of the substrate is a graphical copper layer, the graphical copper layer is formed on the ceramic layer 8 of the substrate by adopting a coating method, and then different graphical layouts are formed by an etching method. Specifically, the copper layer 7 on the substrate of the present invention comprises six partial sector copper pieces 10, one gate trunk copper piece 11, and three gate branch copper pieces 27. The six partial fan-shaped copper pieces 10 and the substrate ceramic layer 8 are concentric and uniformly distributed, one gate main copper piece 11 extends to the edge of the substrate ceramic layer 8 by taking the center of the substrate ceramic layer 8 as a starting point, the tail part of the gate main copper piece 11 is provided with a gate signal inflow terminal 12, three gate branch copper pieces 27 extend to the center direction of short arcs of the three partial fan-shaped copper pieces 10 by taking the center of the substrate ceramic layer as a starting point, the tail part of each gate branch copper piece 27 is provided with a gate connecting terminal 13, and a gap is reserved between each gate connecting terminal 13 and the corresponding partial fan-shaped copper piece 10; one of the driving guide pins 4 is welded on the gate stem main copper 11, the other one is welded on the lower copper layer 9 of the substrate, and the two driving guide pins 4 are aligned in the radial position; one end of the copper foil 3 is fixedly connected to the lower copper layer 9 of the substrate, the other end of the copper foil 3 is fixedly connected to the part of the fan-shaped copper 10 corresponding to the gate branch copper 27, and the positions of the three copper foils 3 are uniformly distributed.
The six gaskets 6 and the six SiC semiconductor chips 5 are divided into two groups, the gate electrodes 28 of the first group of three SiC semiconductor chips 5 are respectively welded with three gate electrode connecting terminals 13 on the upper DBC1, the source electrodes 23 are respectively welded with three partial fan-shaped copper 10 corresponding to the gate electrode branch copper 27 on the upper DBC1, and the drain electrodes are respectively welded with one side of the first group of three gaskets 6; the gates 28 of the second group of three SiC semiconductor chips 5 are respectively welded with three gate connecting terminals 13 on the lower DBC2, the sources 23 are respectively welded with three partial fan-shaped copper 10 corresponding to the upper gate branch copper 27 of the lower DBC2, and the drains are respectively welded with one side of the second group of three gaskets 6; fig. 6 shows the distribution of SiC semiconductor chips 5 bonded to a DBC substrate of the upper DBC1 or the lower DBC2, and fig. 7 shows a front structural view of the upper DBC1 after mounting the spacer 6.
In the present embodiment, the source 23 and the gate 28 of the SiC semiconductor chip 5 are on the same surface of the SiC semiconductor chip, and the drain is on the other surface of the SiC semiconductor chip. Fig. 19 shows an enlarged view of the front structure of the SiC semiconductor chip.
In the present embodiment, the material of the spacer 6 is metal molybdenum having a thermal matching coefficient close to that of the SiC semiconductor chip 5.
As can be seen from the above structure, in the present embodiment, the angles between the six partial sector copper 10 are 60 °, one gate main copper 11 and three gate branch copper 27 form a gate trace going into three divisions, and the angles between the three branches are 120 °. The other side of the upper DBC1 and the lower DBC2, i.e., the substrate underlying copper 9, has a complete circular copper, and the symmetrical design makes the parasitic inductance distribution of the upper DBC1 and the lower DBC2 consistent. The material of the spacer 6 is metal molybdenum having a thermal matching coefficient close to that of the SiC semiconductor chip 5, reducing thermal stress between the SiC semiconductor chip 5 and the spacer 6. One end of the copper foil 3 in the packaging structure is connected with a part of fan-shaped copper 10 with the SiC semiconductor chip 5, and the other end of the copper foil is connected with a lower copper layer 9 of the substrate of the upper DBC1 or the lower DBC2, namely, the copper foil 3 is used for forming an auxiliary loop for connecting the source 23 and the gate 28, and the influence of the parasitic inductance of the common source is reduced.
Fig. 8 is a schematic diagram of a laminated busbar structure, fig. 9 is a sectional diagram of a reserved socket of a decoupling capacitor connection terminal, fig. 10 is an expanded view of the laminated busbar, fig. 11 is a sectional diagram of a connection between the laminated busbar and a lower DBC, fig. 12 is a schematic diagram of an alternating current busbar structure, fig. 13 is a schematic diagram of a connection between the alternating current busbar and an upper DBC, fig. 14 is a sectional diagram of a connection between an upper DBC and a lower DBC, and fig. 15 is a schematic diagram of a front structure after the upper DBC and the lower DBC are connected.
As shown in fig. 8-15, the external connection structure includes a laminated busbar 16 and an ac busbar 20, where the laminated busbar 16 includes a positive busbar 14 and a negative busbar 15.
The positive busbar 14 and the negative busbar 15 are identical in structure and are both rectangular copper plates, round holes are reserved in the middle of the rectangular copper plates, the size of each round hole is matched with that of a DBC substrate, namely, the DBC substrate can be embedded in the round holes, and two ends of each rectangular copper plate are respectively provided with a direct-current terminal reserved socket 17 and a row of decoupling capacitor connecting terminal reserved sockets 19; the three pins 18 are uniformly distributed and installed on the hole edge of the round hole of the positive busbar 14, the three pins 18 are uniformly distributed and installed on the hole edge of the round hole of the negative busbar 15 after rotating for 60 degrees, a layer of insulating paper is padded on the contact surface of the positive busbar 14 and the negative busbar 15, and the negative busbar 15 and the positive busbar 14 are pressed together to form the laminated busbar 16.
The shape of the alternating-current busbar 20 is an inverted U-shaped structure and comprises a rectangular main board and two rectangular side boards, the main board and the side boards are copper plates, a round hole which is the same as the laminated busbar 16 is reserved in the middle of the rectangular main board, an alternating-current terminal reserved socket 21 is arranged on each of the two rectangular side boards, and six pins 18 are uniformly distributed on the hole edges of the round hole of the alternating-current busbar 20.
The upper DBC1 is embedded in the round hole of the alternating-current busbar 20, the partial fan-shaped copper 10 of the upper DBC1 is connected with the pin 18 of the alternating-current busbar 20, the lower DBC2 is embedded in the round hole of the laminated busbar 16, and the partial fan-shaped copper 10 of the lower DBC2 is connected with the pin 18 of the laminated busbar 16.
Then, after aligning the two gate main copper bars 11 of the upper DBC1 and the lower DBC2 in the radial direction, the other side of the first set of three pads 6 is welded to the three partial fan-shaped copper bars 10 of the lower DBC2 that do not correspond to the gate branch copper 27, and the other side of the second set of three pads 6 is welded to the three partial fan-shaped copper bars 10 of the upper DBC1 that do not correspond to the gate branch copper 27, completing the assembly of the package structure except for the heat sink. FIG. 20 shows the corresponding assembled positions of the upper DBC1 and the lower DBC 2.
In the present embodiment, six pins of the laminated busbar are aligned with six pins of the ac busbar in radial positions.
As can be seen from the above structure, the six pins 18 of the laminated busbar 16 and the six pins 18 of the ac busbar 20 are laminated after being integrated into the package structure. And the final main structure is a 3D structure, so that current can flow in the vertical direction, and the area of a current conversion loop is greatly reduced due to the extremely small vertical height of about 3mm, so that parasitic inductance can be effectively reduced. The structure of the laminated busbar 16 greatly reduces the parasitic inductance of the power terminal by utilizing the mutual inductance elimination effect, and the design of the two DC terminal reserved sockets 17 of the anode busbar 14 and the cathode busbar 15 and the two AC terminal reserved sockets 21 of the AC busbar 20 can ensure that the distance difference between the pin 18 and the DC terminal or the AC terminal is not large as much as possible, so that the parasitic parameters of each branch circuit are consistent as much as possible.
The heat dissipation device comprises two water-cooling heat radiators 22 with the same structure, wherein a water inlet 24 and three water outlets 25 are reserved on the front surface of each water-cooling heat radiator 22, the position of the water inlet 24 is the center of the water-cooling heat radiator 22, the positions of the three water outlets 25 correspond to the positions of the SiC semiconductor chips 5 in the main body structure, and the back surfaces of the two water-cooling heat radiators 22 are respectively bonded with the lower copper layers 9 of the substrates of the upper DBC1 and the lower DBC2 through heat conduction grease. Fig. 16 is a schematic front view of the integrated heat sink, and fig. 17 is a schematic front view of the water-cooled heat sink.
In the present embodiment, the cavities of the two water-cooled radiators 22 are provided with uniformly distributed turbulence columns 26. Fig. 18 shows the internal structure of the water-cooled heat sink.
As can be seen from the above structure, the water inlet 24 is located at the center of the water-cooled heat sink 22, and the three water outlets 25 are located at positions close to the SiC semiconductor chips 5, so that water flows through each SiC semiconductor chip 5 in a balanced manner, thereby achieving the purpose of balanced heat dissipation.
After the water-cooled heat sinks 22 are integrated into the package structure, as shown in fig. 17, in the present embodiment, the two water-cooled heat sinks 22 are cylindrical, and the diameter of the cross section is slightly smaller than the diameter of the substrate ceramic layer 8. The circular structure maximizes the area covered on the upper DBC1 or the lower DBC2, so that the heat generated from the SiC semiconductor chip 5 can be transferred to the two water-cooled heat sinks 22 to the maximum extent through the upper DBC1 or the lower DBC 2.
Claims (6)
1. The double-sided water-cooled SiC half-bridge module packaging structure is characterized by comprising a main body structure, an external connection structure and a heat dissipation device, wherein the main body structure comprises an upper DBC, a lower DBC, six SiC semiconductor chips and six gaskets;
the upper DBC and the lower DBC have the same structure and respectively comprise a DBC substrate, two driving guide pins and three copper foils; the cross section of the DBC substrate is circular, and the DBC substrate sequentially comprises a substrate lower copper layer, a substrate ceramic layer and a substrate upper copper layer from bottom to top, wherein the substrate upper copper layer is a graphical copper layer and comprises six partial sector copper, one gate main copper and three gate branch copper; the six partial fan-shaped copper blocks and the substrate ceramic layer are concentric and uniformly distributed, one gate main copper block extends to the edge of the substrate ceramic layer by taking the center of the substrate ceramic layer as a starting point, the tail part of the gate main copper block is provided with a gate signal inflow terminal, three gate branch copper blocks extend to the center direction of short arc sides of three partial fan-shaped copper blocks in a uniformly distributed manner by taking the center of the substrate ceramic layer as a starting point, the tail part of each gate branch copper block is provided with a gate connecting terminal, and a gap is reserved between each gate connecting terminal and the corresponding partial fan-shaped copper block; one of the driving guide pins is welded on the gate stem main copper, the other one of the driving guide pins is welded on the lower copper layer of the substrate, and the two driving guide pins are aligned in the radial position; one end of the copper foil is fixedly connected to the lower copper layer of the substrate, the other end of the copper foil is fixedly connected to part of the fan-shaped copper corresponding to the gate branch copper, and the positions of the three copper foils are uniformly distributed;
the six gaskets and the six SiC semiconductor chips are divided into two groups, the gate electrodes of the first group of three SiC semiconductor chips are respectively welded with three gate electrode connecting terminals on the upper DBC, the source electrodes are respectively welded with three partial fan-shaped copper corresponding to the gate electrode branch copper on the upper DBC, and the drain electrodes are respectively welded with one side of the first group of three gaskets; the gate electrodes of the second group of three SiC semiconductor chips are respectively welded with three gate electrode connecting terminals on the lower DBC, the source electrodes are respectively welded with three partial fan-shaped copper corresponding to the upper gate electrode branch copper of the lower DBC, and the drain electrodes are respectively welded with one side of the second group of three gaskets;
the positive busbar and the negative busbar are of the same structure and are both rectangular copper plates, round holes are reserved in the middle positions of the rectangular copper plates, the size of each round hole is matched with that of the DBC substrate, namely, the DBC substrate can be ensured to be embedded in the round holes, and two ends of each rectangular copper plate are respectively provided with a reserved direct-current terminal socket and a row of reserved decoupling capacitor connecting terminals socket; the three pins are uniformly distributed and installed at the hole edge of the round hole of the positive busbar, the three pins are uniformly distributed and installed at the hole edge of the round hole of the negative busbar after rotating for 60 degrees, a layer of insulating paper is padded on the contact surface of the positive busbar and the negative busbar, and the negative busbar and the positive busbar are pressed together to form a laminated busbar;
the alternating-current busbar is in an inverted-U shape and comprises a rectangular main board and two rectangular side boards, the main board and the side boards are copper boards, a round hole which is the same as the laminated busbar is reserved in the middle of the rectangular main board, an alternating-current terminal reserved socket is arranged on each of the two rectangular side boards, and six pins are uniformly distributed and installed on the hole edge of the round hole of the alternating-current busbar;
the upper DBC is embedded in a round hole of the alternating-current busbar, part of fan-shaped copper of the upper DBC is connected with pins of the alternating-current busbar, the lower DBC is embedded in a round hole of the laminated busbar, and part of fan-shaped copper of the lower DBC is connected with pins of the laminated busbar;
then, after two gate main copper of the upper DBC and the lower DBC are aligned in the radial direction, the other side of the first group of three gaskets is welded with three partial fan-shaped copper parts, which are not corresponding to the gate branch copper, on the lower DBC, and the other side of the second group of three gaskets is welded with three partial fan-shaped copper parts, which are not corresponding to the gate branch copper, on the upper DBC, so that the assembly of the packaging structure except the heat dissipation device is completed;
the heat dissipation device comprises two water-cooled radiators with the same structure, a water inlet and three water outlets are reserved on the front surface of each water-cooled radiator, the position of the water inlet is the center of the water-cooled radiator, the positions of the three water outlets correspond to the positions of SiC semiconductor chips in the main body structure, and the back surfaces of the two water-cooled radiators are respectively bonded with the lower copper layers of the substrates of the upper DBC and the lower DBC through heat conduction grease.
2. The double-sided water-cooled SiC half-bridge module packaging structure integrated with the laminated busbar according to claim 1, wherein the patterned copper layer is formed by forming a copper layer on a substrate ceramic layer by a coating method and then forming different patterned layouts by an etching method.
3. The double-sided water-cooled SiC half-bridge module package structure of claim 1, wherein the source and gate of the SiC semiconductor chip are on the same side of the SiC semiconductor chip, and the drain is on the other side of the SiC semiconductor chip.
4. The double-sided water-cooled SiC half-bridge module package structure of claim 1, wherein the spacer is made of molybdenum with heat matching coefficient similar to that of the SiC semiconductor chip.
5. The double-sided water-cooled SiC half-bridge module package structure of claim 1, wherein six pins of the laminated busbar are aligned with six pins of the AC busbar in radial positions.
6. The double-sided water-cooled SiC half-bridge module packaging structure of the integrated laminated busbar according to claim 1, wherein uniformly distributed turbulence columns are arranged in the cavities of the two water-cooled radiators.
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| CN105932016A (en) * | 2016-06-12 | 2016-09-07 | 重庆大学 | Dynamic and static current-sharing and multi-chip paralleled power module |
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| US9041183B2 (en) * | 2011-07-19 | 2015-05-26 | Ut-Battelle, Llc | Power module packaging with double sided planar interconnection and heat exchangers |
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| CN105932016A (en) * | 2016-06-12 | 2016-09-07 | 重庆大学 | Dynamic and static current-sharing and multi-chip paralleled power module |
| CN107369657A (en) * | 2017-08-30 | 2017-11-21 | 扬州国扬电子有限公司 | A kind of two-side radiation power model of multizone laid out in parallel |
| CN107393901A (en) * | 2017-08-30 | 2017-11-24 | 扬州国扬电子有限公司 | A kind of two-side radiation power model of laminated base plate |
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