CN111554645A - Package structure of double-sided water-cooled SiC half-bridge module with integrated laminated busbar - Google Patents
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- 239000004065 semiconductor Substances 0.000 claims abstract description 63
- 230000017525 heat dissipation Effects 0.000 claims abstract description 29
- 238000004806 packaging method and process Methods 0.000 claims abstract description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 123
- 229910052802 copper Inorganic materials 0.000 claims description 108
- 239000010949 copper Substances 0.000 claims description 108
- 239000000758 substrate Substances 0.000 claims description 64
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 27
- 239000000919 ceramic Substances 0.000 claims description 20
- 239000011889 copper foil Substances 0.000 claims description 13
- 125000006850 spacer group Chemical group 0.000 claims description 11
- 238000000034 method Methods 0.000 claims description 10
- 239000003990 capacitor Substances 0.000 claims description 6
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 4
- 229910052750 molybdenum Inorganic materials 0.000 claims description 4
- 239000011733 molybdenum Substances 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 3
- 239000004519 grease Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims 1
- 230000003071 parasitic effect Effects 0.000 abstract description 17
- 238000013461 design Methods 0.000 abstract description 4
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- 241001124569 Lycaenidae Species 0.000 description 16
- 102100032658 Rho-related BTB domain-containing protein 2 Human genes 0.000 description 16
- 235000014987 copper Nutrition 0.000 description 16
- 238000001816 cooling Methods 0.000 description 10
- 238000009826 distribution Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 4
- 238000012536 packaging technology Methods 0.000 description 4
- 239000000306 component Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
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- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
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- 239000008358 core component Substances 0.000 description 1
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- 238000012407 engineering method Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
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Abstract
本发明公开了一种集成叠层母排的双面水冷SiC半桥模块封装结构。所述封装结构包括主体结构、外部连接结构以及散热装置,外部连接结构和散热装置均与主体结构相连。所述主体结构包括上DBC、下DBC、SiC半导体芯片、垫片。所述外部连接结构包括叠层母排和交流母排,叠层母排又包括正极母排和负极母排。所述散热器包括两个水冷散热器,分别与上DBC、下DBC相连。本封装结构的优点是寄生电感的值低,均流效果好,散热系数高以及散热均衡,实现了装置的小型化、模块化、标准化设计,并且可以充分发挥SiC器件的高速、高温特性。
The invention discloses a double-sided water-cooled SiC half-bridge module package structure integrated with laminated busbars. The packaging structure includes a main body structure, an external connection structure and a heat dissipation device, and the external connection structure and the heat dissipation device are both connected to the main body structure. The main body structure includes an upper DBC, a lower DBC, a SiC semiconductor chip, and a gasket. The external connection structure includes a laminated busbar and an AC busbar, and the laminated busbar further includes a positive electrode busbar and a negative electrode busbar. The radiator includes two water-cooled radiators, which are respectively connected with the upper DBC and the lower DBC. The advantages of this package structure are that the value of parasitic inductance is low, the current sharing effect is good, the heat dissipation coefficient is high and the heat dissipation is balanced, which realizes the miniaturization, modularization and standardized design of the device, and can give full play to the high-speed and high-temperature characteristics of SiC devices.
Description
技术领域technical field
本发明涉及到一种半导体器件,特别涉及到一种集成叠层母排的双面水冷SiC半桥模块封装结构。The invention relates to a semiconductor device, in particular to a double-sided water-cooled SiC half-bridge module package structure integrating a laminated busbar.
背景技术Background technique
功率半导体器件是电力电子变流器的核心部件。近年来,随着电力电子技术在新能源发电和电动汽车等领域的快速发展以及SiC等宽禁带半导体的开发,对功率半导体器件也提出了新的需求。Power semiconductor devices are the core components of power electronic converters. In recent years, with the rapid development of power electronics technology in the fields of new energy power generation and electric vehicles, and the development of wide-bandgap semiconductors such as SiC, new demands have also been placed on power semiconductor devices.
虽然SiC等宽禁带半导体比Si基半导体具有更高的工作温度、更高的击穿电压强度、更高的热导率以及更高的开关频率。然而,将基于Si功率器件的传统的封装技术用来对宽禁带半导体功率器件进行封装时,会带来两个较大的问题。一是传统封装技术采用引线键合来实现结构中复杂的内部互联,这会带来较大的寄生电感,在功率半导体器件关断时,较大寄生电感中存储的能量会造成电压尖峰和振荡,并可能增加损耗,随着近年来功率半导体器件开关速度越来越快,封装的寄生电感问题更为突出。因此为了保障功率器件和电力电子系统的性能和安全运行,在功率模块封装设计时需注意减小封装寄生电感。二是传统封装技术的散热方式多为单面散热,因此,散热效率差。而SiC器件可以工作在更高的温度下,因此在散热方面具有更高的要求,若没有高效的散热方式,会影响模块可靠性。Although wide bandgap semiconductors such as SiC have higher operating temperature, higher breakdown voltage strength, higher thermal conductivity and higher switching frequency than Si-based semiconductors. However, when the traditional packaging technology based on Si power devices is used to package wide-bandgap semiconductor power devices, two major problems arise. First, the traditional packaging technology uses wire bonding to realize the complex internal interconnection in the structure, which will bring a large parasitic inductance. When the power semiconductor device is turned off, the energy stored in the large parasitic inductance will cause voltage spikes and oscillations. , and may increase losses, as the switching speed of power semiconductor devices has become faster and faster in recent years, the problem of parasitic inductance of the package has become more prominent. Therefore, in order to ensure the performance and safe operation of power devices and power electronic systems, it is necessary to reduce the parasitic inductance of the package when designing the power module package. Second, the heat dissipation method of traditional packaging technology is mostly single-sided heat dissipation, so the heat dissipation efficiency is poor. SiC devices can work at higher temperatures, so they have higher requirements for heat dissipation. If there is no efficient heat dissipation method, the reliability of the module will be affected.
因此,开发具有低寄生电感和高效散热方式的封装结构已经成为研究的热点问题,这既有学术论文对此做了深入的理论分析,也有实际应用的工程方法,如发明申请专利《双面散热IPM混合模块的封装结构及加工工艺》(CN109920785A)和《带固定装置双面水冷的半导体器件三维堆叠封装结构》(CN103367278A)。Therefore, the development of a package structure with low parasitic inductance and efficient heat dissipation has become a hot research issue, which includes in-depth theoretical analysis in academic papers and practical engineering methods, such as the invention patent "Double-Sided Heat Dissipation" Packaging Structure and Processing Technology of IPM Hybrid Module" (CN109920785A) and "Three-dimensional stacked packaging structure of semiconductor devices with double-sided water cooling with fixing device" (CN103367278A).
中国发明专利申请公开说明书公开的《双面散热IPM混合模块的封装结构及加工工艺》,以上下双基板且芯片倒装的封装形式,将IGBT芯片的发射极和SBD芯片的阳极通过覆铜陶瓷板连接到引线框架,减少键合引线,提升模块可靠性;再以纳米银互连层替代芯片与基板之间的焊料层,有助于发挥SiC材料的高温特性,同时提高热量从芯片到基板的纵向传导能力,从而降低IPM混合模块的最高温度,提升模块使用寿命。但是,该结构存在以下不足:"Packaging structure and processing technology of double-sided heat dissipation IPM hybrid module" disclosed in the Chinese Patent Application Publication The board is connected to the lead frame, reducing the bonding wire and improving the reliability of the module; and then replacing the solder layer between the chip and the substrate with a nano-silver interconnect layer, which helps to exert the high temperature characteristics of the SiC material, while improving the heat from the chip to the substrate. Therefore, the maximum temperature of the IPM hybrid module is reduced, and the service life of the module is improved. However, this structure has the following shortcomings:
1、该结构并未考虑降低功率端子方法,而封装结构大部分电感来自于功率端子:1. This structure does not consider the method of reducing power terminals, and most of the inductance of the package structure comes from the power terminals:
2、该结构并不是使用水冷散热,无法满足大功率器件的要求2. This structure does not use water cooling for heat dissipation and cannot meet the requirements of high-power devices
中国发明专利申请公开说明书书公开的《带固定装置双面水冷的半导体器件三维堆叠封装结构》,实现了半导体器件的立体封装,无引线键合,降低引线键合所产生的线路电阻和自身电感,采用双面水冷散热,具有体积小,可集成的功率大,散热系数大。同时,每个叠压板可以封装任意个数的以及尺寸相同或各异的半导体元件,并且预置的固定结构有效的防止半导体元件在受到外部冲击时产生滑移,可变性的连接件防止器件在工作时受到冲击、震动、热胀冷缩等而产生变形甚至SiC半导体芯片受损,每个叠压板都具有温度和压力检测装置用以防止因使用环境不当而造成的SiC半导体芯片寿命损耗。但是,该结构存在以下不足:"Three-dimensional stacked packaging structure of semiconductor devices with double-sided water cooling with fixing device" disclosed in the Chinese Patent Application Publication , The use of double-sided water-cooling heat dissipation, with small size, large integrated power, large heat dissipation coefficient. At the same time, each laminated board can encapsulate any number of semiconductor components with the same or different sizes, and the preset fixing structure effectively prevents the semiconductor components from slipping when subjected to external shocks, and the variable connectors prevent the components from When working, it is subjected to shock, vibration, thermal expansion and contraction, etc., resulting in deformation or even damage to the SiC semiconductor chip. Each laminated board is equipped with a temperature and pressure detection device to prevent the life loss of the SiC semiconductor chip caused by improper use of the environment. However, this structure has the following shortcomings:
1、该结构并未考虑每个SiC半导体芯片的均衡散热;1. The structure does not consider the balanced heat dissipation of each SiC semiconductor chip;
2、该结构并未考虑各支路寄生电感分布的一致性。2. This structure does not consider the consistency of the parasitic inductance distribution of each branch.
发明内容SUMMARY OF THE INVENTION
本发明的目的在于提供一种集成叠层母排的双面水冷SiC半桥模型封装结构。针对目前封装技术寄生电感大问题,提出一种采用无引线键合的3D封装结构以及利用叠层母排的方法来获得较小的寄生电感,并且,封装结构对称,可以使多个SiC半导体芯片并联结构的各支路电感分布一致,以此获得良好的均流效果;采用双面水冷散热器可以获得优良的散热效果,提高模块的可靠性。The purpose of the present invention is to provide a double-sided water-cooled SiC half-bridge model package structure integrated with a laminated busbar. In view of the large parasitic inductance of the current packaging technology, a 3D packaging structure without wire bonding and a method of using a laminated busbar are proposed to obtain a small parasitic inductance, and the packaging structure is symmetrical, which can make multiple SiC semiconductor chips. The inductance distribution of each branch of the parallel structure is consistent, so as to obtain a good current sharing effect; the use of a double-sided water-cooled radiator can obtain an excellent heat dissipation effect and improve the reliability of the module.
为了达到上述目的,本发明提供一种集成叠层母排的双面水冷SiC半桥模块封装结构,包括主体结构、外部连接结构和散热装置,所述主体结构包括一个上DBC、一个下DBC、六个SiC半导体芯片和六个垫片,所述外部连接结构包括叠层母排和交流母排,叠层母排中包括一个正极母排和一个负极母排,所述散热装置包括两个水冷散热器;In order to achieve the above object, the present invention provides a double-sided water-cooled SiC half-bridge module package structure with integrated laminated busbar, including a main structure, an external connection structure and a heat dissipation device, and the main structure includes an upper DBC, a lower DBC, Six SiC semiconductor chips and six spacers, the external connection structure includes a laminated busbar and an AC busbar, the laminated busbar includes a positive busbar and a negative busbar, and the heat dissipation device includes two water cooling heat sink;
所述上DBC和下DBC结构完全相同,均包括一个DBC基板、两根驱动引针和三片铜箔;所述DBC基板的横截面为圆形,从下至上依次为基板下铜层、基板陶瓷层和基板上铜层,所述基板上铜层为图形化铜层,包括六块部分扇形铜、一条门极主干铜和三条门极分支铜;六块部分扇形铜与基板陶瓷层保持同心并呈均匀分布状,一条门极主干铜以基板陶瓷层的中心为起点延伸到基板陶瓷层边缘处,门极主干铜的尾部设有门极信号流入端子,三条门极分支铜以基板陶瓷层的中心为起点,呈均匀分布状向三块部分扇形铜的短弧边中心方向延伸,每个门极分支铜的尾部设有一个门极连接端子,门极连接端子与对应的部分扇形铜之间留有间隙;所述驱动引针中的一根焊接在门极主干铜上、另一根焊接在基板下铜层上,两根驱动引针在径向位置上对齐;所述铜箔的一端固接在基板下铜层上,另一端固接在与门极分支铜对应的部分扇形铜上,三片铜箔的位置为均匀分布;The structure of the upper DBC and the lower DBC are exactly the same, including a DBC substrate, two driving pins and three copper foils; the cross-section of the DBC substrate is circular, and from bottom to top are the lower copper layer of the substrate, the substrate The ceramic layer and the copper layer on the substrate, the copper layer on the substrate is a patterned copper layer, including six partial sector coppers, one gate trunk copper and three gate branch coppers; the six partial sector coppers are kept concentric with the substrate ceramic layer It is evenly distributed. A gate trunk copper extends from the center of the substrate ceramic layer to the edge of the substrate ceramic layer. The tail of the gate trunk copper is provided with a gate signal inflow terminal. Three gate branch coppers are connected to the substrate ceramic layer. The center of the gate is the starting point, and it extends in a uniform distribution to the center of the short arc sides of the three partial sector coppers. The tail of each gate branch copper is provided with a gate connection terminal. The gate connection terminal and the corresponding part of the sector copper are connected. There is a gap between them; one of the driving pins is welded on the gate electrode trunk copper, the other is soldered on the copper layer under the substrate, and the two driving pins are aligned in radial positions; the copper foil One end is fixed on the copper layer under the substrate, and the other end is fixed on the part of the fan-shaped copper corresponding to the gate branch copper, and the positions of the three copper foils are evenly distributed;
所述六个垫片和六个SiC半导体芯片均分为两组,第一组三个SiC半导体芯片的门极分别与上DBC上的三个门极连接端子焊接在一起、源极分别与上DBC上门极分支铜相对应的三块部分扇形铜焊接在一起、漏极分别与第一组三个垫片的一侧焊接在一起;第二组三个SiC半导体芯片的门极分别与下DBC上的三个门极连接端子焊接在一起、源极分别与下DBC上门极分支铜相对应的三块部分扇形铜焊接在一起、漏极分别与第二组三个垫片的一侧焊接在一起;The six spacers and the six SiC semiconductor chips are divided into two groups, the gate electrodes of the three SiC semiconductor chips in the first group are respectively welded with the three gate electrode connection terminals on the upper DBC, and the source electrodes are respectively connected to the upper The three partial fan-shaped coppers corresponding to the upper gate branch copper of the DBC are welded together, and the drains are respectively welded to one side of the first group of three pads; the gates of the second group of three SiC semiconductor chips are respectively connected to the lower DBC The upper three gate connection terminals are welded together, the source is welded together with the three partial fan-shaped copper corresponding to the upper gate branch copper of the lower DBC, and the drain is welded with one side of the second set of three pads respectively. Together;
所述正极母排和负极母排结构相同,均为一个矩形铜板,矩形铜板的中间位置留有圆孔,圆孔的尺寸与DBC基板相适应,即保证DBC基板能够嵌装在圆孔中,在矩形铜板的两端各有一个直流端子预留插口和一排去耦电容连接端子预留插口;三个引脚呈均匀分布安装在正极母排的圆孔的孔边,三个引脚旋转60度后呈均匀分布安装在负极母排的圆孔的孔边,在正极母排和负极母排的接触面上垫一层绝缘纸,将负极母排在上、正极母排在下压合在一起构成叠层母排;The positive and negative bus bars have the same structure and are both a rectangular copper plate. A circular hole is left in the middle of the rectangular copper plate. The size of the circular hole is adapted to the DBC substrate, which ensures that the DBC substrate can be embedded in the circular hole. At both ends of the rectangular copper plate, there is a reserved socket for DC terminals and a row of reserved sockets for connecting terminals of decoupling capacitors; the three pins are evenly distributed on the side of the round hole of the positive busbar, and the three pins rotate After 60 degrees, it is evenly distributed and installed on the edge of the circular hole of the negative busbar. A layer of insulating paper is placed on the contact surface of the positive busbar and the negative busbar, and the negative busbar is on the top and the positive busbar is pressed down Together to form a laminated busbar;
所述交流母排的形状为倒U型,包括一个矩形主板和两个矩形边板,主板和边板均为铜板,在矩形主板的中间位置留有与叠层母排相同的圆孔,在两个矩形边板上各有一个交流端子预留插口,六个引脚呈均匀分布安装在交流母排的圆孔的孔边;The shape of the AC busbar is an inverted U shape, including a rectangular main board and two rectangular side boards, the main board and the side boards are copper plates, and the same circular hole as the laminated busbar is left in the middle position of the rectangular main board. There is a reserved socket for AC terminal on each of the two rectangular side plates, and the six pins are evenly distributed and installed on the edge of the circular hole of the AC busbar;
上DBC嵌装在交流母排的圆孔中,上DBC的部分扇形铜与交流母排的引脚相接,下DBC嵌装在叠层母排的圆孔中,下DBC的部分扇形铜与叠层母排的引脚相接;The upper DBC is embedded in the circular hole of the AC busbar, part of the fan-shaped copper of the upper DBC is connected to the pins of the AC busbar, the lower DBC is embedded in the circular hole of the laminated busbar, and part of the fan-shaped copper of the lower DBC is connected to the pin of the AC busbar. The pins of the laminated busbar are connected;
然后,将上DBC和下DBC的二条门极主干铜在径向方向上对齐后,将第一组三个垫片的另一侧与下DBC上没有与门极分支铜相对应的三块部分扇形铜焊接在一起、第二组三个垫片的另一侧与上DBC上没有与门极分支铜相对应的三块部分扇形铜焊接在一起,完成了除散热装置之外的封装结构的装配;Then, after aligning the two gate trunk coppers of the upper and lower DBCs in the radial direction, align the other side of the first set of three pads with the three parts on the lower DBC that do not have corresponding gate branch coppers The fan-shaped copper is welded together, and the other side of the second group of three spacers is welded together with the three partial fan-shaped coppers on the upper DBC that do not correspond to the gate branch copper, completing the package structure except the heat sink. assembly;
所述散热装置包括两个结构相同的水冷散热器,每个水冷散热器的正面留有一个入水口和三个出水口,入水口的位置为水冷散热器的中心,且三个出水口的位置与主体结构中SiC半导体芯片的位置相对应,两个水冷散热器的反面分别通过导热油脂与上DBC、下DBC的基板下铜层粘接在一起。The heat dissipation device includes two water-cooled radiators with the same structure, and the front of each water-cooled radiator has a water inlet and three water outlets, the position of the water inlet is the center of the water-cooled radiator, and the positions of the three water outlets are Corresponding to the position of the SiC semiconductor chip in the main structure, the opposite sides of the two water-cooled heat sinks are respectively bonded to the lower copper layers of the upper and lower DBC substrates through thermal grease.
优选地,所述图形化铜层指的是在基板陶瓷层上采用敷接方法形成铜层,然后通过刻蚀的方法形成不同的图形化布局。Preferably, the patterned copper layer refers to that a copper layer is formed on the ceramic layer of the substrate by a bonding method, and then different patterned layouts are formed by an etching method.
优选地,所述SiC半导体芯片的源极和门极在SiC半导体芯片的同一面,漏极在SiC半导体芯片的另外一面。Preferably, the source electrode and the gate electrode of the SiC semiconductor chip are on the same side of the SiC semiconductor chip, and the drain electrode is on the other side of the SiC semiconductor chip.
优选地,垫片的材料为与SiC半导体芯片具有相近热匹配系数的金属钼。Preferably, the material of the gasket is metal molybdenum with a thermal matching coefficient similar to that of the SiC semiconductor chip.
优选地,叠层母排的六个引脚与交流母排的六个引脚在径向位置上对齐。Preferably, the six pins of the laminated busbar are radially aligned with the six pins of the AC busbar.
优选地,两个水冷散热器的空腔中设有均匀分布的扰流柱。Preferably, the cavities of the two water-cooled radiators are provided with evenly distributed spoiler columns.
由以上技术方案可知,与现有技术相比,本发明具有以下优势:As can be seen from the above technical solutions, compared with the prior art, the present invention has the following advantages:
1、将叠层母排集成进封装结构中,不仅解决了功率端子大电感问题,而且叠层母排和交流母排的对称性设计,可以尽量保证引脚到直流端子预留插口或者交流端子预留插口的距离相差不大,从而使各支路的寄生参数尽量一致。1. Integrating the laminated busbar into the package structure not only solves the problem of large inductance of the power terminals, but also the symmetrical design of the laminated busbar and the AC busbar can ensure that the pins to the DC terminal are reserved for sockets or AC terminals as much as possible The distance between the reserved sockets is not much different, so that the parasitic parameters of each branch are as consistent as possible.
2、上DBC和下DBC设计成圆形结构以及对称布局,使得上DBC和下DBC的寄生电感分布都趋于一致;由上DBC、下DBC、垫片、SiC半导体芯片构成的主体结构是3D结构,使得电流能在垂直方向流动,由于垂直高度极小,为3mm左右,换流回路面积大大减小,因此可以有效减小寄生电感。2. The upper DBC and the lower DBC are designed in a circular structure and symmetrical layout, so that the parasitic inductance distribution of the upper DBC and the lower DBC tends to be consistent; the main structure composed of the upper DBC, the lower DBC, the gasket, and the SiC semiconductor chip is 3D The structure enables the current to flow in the vertical direction. Since the vertical height is extremely small, about 3mm, the area of the commutation loop is greatly reduced, so the parasitic inductance can be effectively reduced.
3、两个水冷散热器分别与上DBC、下DBC的基板下铜层粘接在一起,实现双面水冷,且三个出水口与SiC半导体芯片的位置相对应,使水流可以均衡的对每一个SiC半导体芯片进行水冷,达到均衡散热的目的。3. The two water-cooling radiators are respectively bonded to the copper layer under the substrate of the upper DBC and the lower DBC to realize double-sided water cooling, and the three water outlets correspond to the positions of the SiC semiconductor chips, so that the water flow can be balanced for each A SiC semiconductor chip is water-cooled to achieve the purpose of balanced heat dissipation.
附图说明Description of drawings
图1为本发明封装结构的电路图;Fig. 1 is the circuit diagram of the packaging structure of the present invention;
图2为主体结构展开图;Figure 2 is an expanded view of the main structure;
图3为DBC基板结构示意图;3 is a schematic diagram of the structure of a DBC substrate;
图4为DBC基板的图形化铜层结构示意图;4 is a schematic diagram of a patterned copper layer structure of a DBC substrate;
图5为图4中A处即芯片的门极连接端子放大图;FIG. 5 is an enlarged view of the gate connection terminal of the chip at A in FIG. 4;
图6为焊接到上DBC或者下DBC的DBC基板上的SiC半导体芯片的分布图;6 is a distribution diagram of SiC semiconductor chips welded to the DBC substrate of the upper DBC or the lower DBC;
图7为安装垫片后的上DBC正面结构示意图;7 is a schematic diagram of the front structure of the upper DBC after installing the gasket;
图8为叠层母排结构示意图;Figure 8 is a schematic diagram of a laminated busbar structure;
图9为去耦电容连接端子预留插口剖面图;FIG. 9 is a cross-sectional view of a reserved socket for a connection terminal of a decoupling capacitor;
图10为叠层母排展开图;Figure 10 is an expanded view of a laminated busbar;
图11为叠层母排与下DBC连接剖面图;Figure 11 is a sectional view of the connection between the laminated busbar and the lower DBC;
图12为交流母排结构示意图;Figure 12 is a schematic diagram of the structure of the AC busbar;
图13为交流母排与上DBC连接示意图;Figure 13 is a schematic diagram of the connection between the AC busbar and the upper DBC;
图14为上DBC与下DBC连接剖面图;14 is a sectional view of the connection between the upper DBC and the lower DBC;
图15为上DBC与下DBC连接后正面结构示意图;15 is a schematic diagram of the front structure after the upper DBC is connected with the lower DBC;
图16为集成散热装置后正面结构示意图;16 is a schematic diagram of the front structure of the integrated heat sink;
图17为水冷散热器正面结构示意图;Figure 17 is a schematic diagram of the front structure of a water-cooled radiator;
图18为水冷散热器内部结构示意图;Figure 18 is a schematic diagram of the internal structure of the water-cooled radiator;
图19为SiC半导体芯片正面结构放大图。FIG. 19 is an enlarged view of the front structure of the SiC semiconductor chip.
图20为上DBC和下DBC对应装配位置示意图Figure 20 is a schematic diagram of the corresponding assembly positions of the upper DBC and the lower DBC
其中,1上DBC、2下DBC、3铜箔、4驱动引针针、5SiC半导体芯片、6垫片、7基板上铜层、8基板陶瓷层、9基板下铜层、10部分扇形铜、11门极主干铜、12门极信号流入端子、13门极连接端子、14正极母排、15负极母排、16叠层母排、17直流端子预留插口、18引脚、19去耦电容连接端子预留插口、20交流母排、21交流端子预留插口、22水冷散热器、23源极、24入水口、25出水口、26扰流柱、27门极分支铜、28门极。Among them, 1 upper DBC, 2 lower DBC, 3 copper foil, 4 driving pins, 5SiC semiconductor chip, 6 spacers, 7 copper layers on the substrate, 8 ceramic layers on the substrate, 9 copper layers on the lower substrate, 10 parts of fan-shaped copper, 11 gate trunk copper, 12 gate signal inflow terminals, 13 gate connection terminals, 14 positive busbars, 15 negative busbars, 16 laminated busbars, 17 reserved sockets for DC terminals, 18 pins, 19 decoupling capacitors Connection terminal reserved socket, 20 AC busbar, 21 AC terminal reserved socket, 22 water cooling radiator, 23 source pole, 24 water inlet, 25 water outlet, 26 spoiler column, 27 gate pole branch copper, 28 gate pole.
具体实施方式Detailed ways
下面结合附图对本发明进行说明。The present invention will be described below with reference to the accompanying drawings.
图1为本发明封装结构的电路图。图中,P为直流正极,N为直流负极,AC为交流端子,T1-T6为六个SiC半导体芯片5,其中T1、T2和T3为上桥臂并联的SiC半导体芯片5,T4、T5和T6为下桥臂并联的SiC半导体芯片5,并联的SiC半导体芯片5增加了总电流,使封装结构可集成的功率更大。FIG. 1 is a circuit diagram of the packaging structure of the present invention. In the figure, P is the DC positive pole, N is the DC negative pole, AC is the AC terminal, T1-T6 are six
本发明集成叠层母排的双面水冷SiC半桥模块封装结构,包括主体结构、外部连接结构和散热装置,所述主体结构包括一个上DBC1、一个下DBC2、六个SiC半导体芯片5和六个垫片6,所述外部连接结构包括叠层母排16和交流母排20,所述叠层母排16包括一个正极母排14和一个负极母排15,所述散热装置包括两个水冷散热器22。The double-sided water-cooled SiC half-bridge module package structure with integrated laminated busbar of the present invention includes a main structure, an external connection structure and a heat dissipation device, and the main structure includes an upper DBC1, a lower DBC2, six
图2为主体结构展开图,图3为DBC基板结构示意图,图4为DBC基板的图形化铜层结构示意图,图5为图4中A处即芯片的门极连接端子放大图。由图2-图5可见,所述上DBC1和下DBC2结构完全相同,均包括一个DBC基板、两根驱动引针4和三片铜箔3。2 is an expanded view of the main structure, FIG. 3 is a schematic structural diagram of a DBC substrate, FIG. 4 is a schematic structural diagram of a patterned copper layer of the DBC substrate, and FIG. 5 is an enlarged view of the gate connection terminal of the chip at A in FIG. 4 . It can be seen from FIG. 2 to FIG. 5 that the upper DBC1 and the lower DBC2 have the same structure, and both include a DBC substrate, two driving
所述DBC基板的横截面为圆形,从下至上依次为基板下铜层9、基板陶瓷层8和基板上铜层7,所述基板上铜层7为图形化铜层,所述图形化铜层指的是在基板陶瓷层8上采用敷接方法形成铜层,然后通过刻蚀的方法形成不同的图形化布局。具体,本发明中的基板上铜层7包括六块部分扇形铜10、一条门极主干铜11和三条门极分支铜27。六块部分扇形铜10与基板陶瓷层8保持同心并呈均匀分布状,一条门极主干铜11以基板陶瓷层8的中心为起点延伸到基板陶瓷层8边缘处,门极主干铜11的尾部设有门极信号流入端子12,三条门极分支铜27以基板陶瓷层的中心为起点,呈均匀分布状向三块部分扇形铜10的短弧边中心方向延伸,每个门极分支铜27的尾部设有一个门极连接端子13,门极连接端子13与对应的部分扇形铜10之间留有间隙;所述驱动引针4中的一根焊接在门极主干铜11上、另一根焊接在基板下铜层9上,两根驱动引针4在径向位置上对齐;所述铜箔3的一端固接在基板下铜层9上,另一端固接在与门极分支铜27对应的部分扇形铜10上,三片铜箔3的位置为均匀分布。The cross-section of the DBC substrate is circular, and from bottom to top are the
所述六个垫片6和六个SiC半导体芯片5均分为两组,第一组三个SiC半导体芯片5的门极28分别与上DBC1上的三个门极连接端子13焊接在一起、源极23分别与上DBC1上门极分支铜27相对应的三块部分扇形铜10焊接在一起、漏极分别与第一组三个垫片6的一侧焊接在一起;第二组三个SiC半导体芯片5的门极28分别与下DBC2上的三个门极连接端子13焊接在一起、源极23分别与下DBC2上门极分支铜27相对应的三块部分扇形铜10焊接在一起、漏极分别与第二组三个垫片6的一侧焊接在一起;图6给出了焊接到上DBC1或者下DBC2的DBC基板上的SiC半导体芯片5的分布状况,图7给出了安装垫片6后的上DBC1的正面结构示意图。The six
在本实施例中,所述SiC半导体芯片5的源极23和门极28在SiC半导体芯片的同一面,漏极在SiC半导体芯片的另外一面。图19给出了SiC半导体芯片正面结构放大图。In this embodiment, the
在本实施例中,垫片6的材料为与SiC半导体芯片5具有相近热匹配系数的金属钼。In this embodiment, the material of the
由以上结构可见,本实施例中,六块部分扇形铜10彼此之间的角度为60°,一条门极主干铜11和三条门极分支铜27构成了一进三分的门极走线,三个分支之间的角度为120°。上DBC1和下DBC2的另外一面即基层下层铜9具有一个完整的圆形铜,这种对称设计使得上DBC1和下DBC2的寄生电感分布趋于一致。垫片6的材料为与SiC半导体芯片5具有相近热匹配系数的金属钼,减小了SiC半导体芯片5与垫片6之间的热应力。封装结构中铜箔3的一端与具有SiC半导体芯片5的部分扇形铜10相连,另一端与上DBC1或者下DBC2的基板下铜层9相连,即利用铜箔3构成连接源极23和门极28的辅助回路,减小了共源寄生电感的影响。It can be seen from the above structure that in this embodiment, the angle between the six partial sector-shaped
图8为叠层母排结构示意图,图9为去耦电容连接端子预留插口剖面图,图10为叠层母排展开图,图11为叠层母排与下DBC连接剖面图,图12为交流母排结构示意图,图13为交流母排与上DBC连接示意图,图14为上DBC与下DBC连接剖面图,图15为上DBC与下DBC连接后正面结构示意图。Fig. 8 is a schematic diagram of the structure of the laminated busbar, Fig. 9 is a cross-sectional view of the reserved socket for the connection terminal of the decoupling capacitor, Fig. 10 is an expanded view of the laminated busbar, Fig. 11 is a cross-sectional view of the connection between the laminated busbar and the lower DBC, Fig. 12 Figure 13 is a schematic diagram of the connection between the AC busbar and the upper DBC, Figure 14 is a cross-sectional view of the connection between the upper DBC and the lower DBC, and Figure 15 is a schematic diagram of the front structure after the upper DBC and the lower DBC are connected.
由图8-图15可见,所述外部连接结构包括叠层母排16和交流母排20,所述叠层母排16包括一个正极母排14和一个负极母排15。As can be seen from FIGS. 8-15 , the external connection structure includes a
所述正极母排14和负极母排15结构相同,均为一个矩形铜板,矩形铜板的中间位置留有圆孔,圆孔的尺寸与DBC基板相适应,即保证DBC基板能够嵌装在圆孔中,在矩形铜板的两端各有一个直流端子预留插口17和一排去耦电容连接端子预留插口19;三个引脚18呈均匀分布安装在正极母排14的圆孔的孔边,三个引脚18旋转60度后呈均匀分布安装在负极母排15的圆孔的孔边,在正极母排14和负极母排15的接触面上垫一层绝缘纸,将负极母排15在上、正极母排14在下压合在一起构成叠层母排16。The
所述交流母排20的形状为倒U型,包括一个矩形主板和两个矩形边板,主板和边板均为铜板,在矩形主板的中间位置留有与叠层母排16相同的圆孔,在两个矩形边板上各有一个交流端子预留插口21,六个引脚18呈均匀分布安装在交流母排20的圆孔的孔边。The shape of the
上DBC1嵌装在交流母排20的圆孔中,上DBC1的部分扇形铜10与交流母排20的引脚18相接,下DBC2嵌装在叠层母排16的圆孔中,下DBC2的部分扇形铜10与叠层母排16的引脚18相接。The upper DBC1 is embedded in the round hole of the
然后,将上DBC1和下DBC2的二条门极主干铜11在径向方向上对齐后,将第一组三个垫片6的另一侧与下DBC2上没有与门极分支铜27相对应的三块部分扇形铜10焊接在一起、第二组三个垫片6的另一侧与上DBC1上没有与门极分支铜27相对应的三块部分扇形铜10焊接在一起,完成了除散热装置之外的封装结构的装配。图20给出了上DBC1和下DBC2对应装配位置示意图。Then, after aligning the two gate trunk coppers 11 of the upper DBC1 and the lower DBC2 in the radial direction, align the other side of the first group of three
在本实施例中,叠层母排的六个引脚与交流母排的六个引脚在径向位置上对齐。In this embodiment, the six pins of the laminated busbar are aligned in radial positions with the six pins of the AC busbar.
由以上结构可见,叠层母排16的六个引脚18与交流母排20的六个引脚18在集成进封装结构后是叠层的。而且最后完成的主体结构是一个3D结构,使得电流能在垂直方向流动,由于垂直高度极小,为3mm左右,换流回路面积大大减小,因此可以有效减小寄生电感。叠层母排16的结构利用互感消除效应大大减小了功率端子寄生电感,而且,正极母排14和负极母排15的两个直流端子预留插口17以及交流母排20的两个交流端子预留插口21的设计,可以尽量保证引脚18到直流端子或者交流端子的距离相差不大,从而使各支路的寄生参数尽量一致。It can be seen from the above structure that the six
所述散热装置包括两个结构相同的水冷散热器22,每个水冷散热器22的正面留有一个入水口24和三个出水口25,入水口24的位置为水冷散热器22的中心,且三个出水口25的位置与主体结构中SiC半导体芯片5的位置相对应,两个水冷散热器22的反面分别通过导热油脂与上DBC1、下DBC2的基板下铜层9粘接在一起。图16为集成散热装置后正面结构示意图,图17为水冷散热器正面结构示意图。The heat dissipation device includes two water-cooled radiators 22 with the same structure, and the front of each water-cooled radiator 22 has a
在本实施例中,两个水冷散热器22的空腔中均设有均匀分布的扰流柱26。图18给出了水冷散热器内部结构。In this embodiment, the cavities of the two water-cooled radiators 22 are provided with evenly distributed
由以上结构可见,入水口24位于水冷散热器22的中心位置,三个出水口25位于靠近SiC半导体芯片5的位置,使水流可以均衡的流过每一个SiC半导体芯片5,达到均衡散热的目的。It can be seen from the above structure that the
水冷散热器22集成进封装结构后如图17所示,在本实施例中,两个水冷散热器22的形状为圆柱形,横截面的直径略小于基板陶瓷层8的直径。圆形结构实现了其覆盖在上DBC1或下DBC2上面积的最大化,使SiC半导体芯片5产生的热可以最大程度的通过上DBC1或下DBC2传给两个水冷散热器22。After the water-cooled heat sink 22 is integrated into the package structure, as shown in FIG. 17 , in this embodiment, the two water-cooled heat sinks 22 are cylindrical in shape, and the diameter of the cross section is slightly smaller than the diameter of the
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