CN219435850U - MOSFET chip packaging structure - Google Patents
MOSFET chip packaging structure Download PDFInfo
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- CN219435850U CN219435850U CN202320512112.XU CN202320512112U CN219435850U CN 219435850 U CN219435850 U CN 219435850U CN 202320512112 U CN202320512112 U CN 202320512112U CN 219435850 U CN219435850 U CN 219435850U
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Abstract
The application discloses belong to semiconductor device technical field, specifically be MOSFET chip packaging structure, include plastic envelope and establish the silicon chip in the plastic envelope, still be equipped with in the plastic envelope with silicon chip top bonding a plurality of copper strips, respectively with different copper strips one end source pin and grid pin, with the drain electrode pin that the silicon chip bottom bonds, with drain electrode pin bottom connection's heat conduction bottom plate, the cladding bonds on the plastic envelope has metal casing, this application heat is conducted to the PCB bottom plate through drain electrode pin and heat conduction bottom plate, has provided more heat dissipation area of contact, takes away the heat from the silicon chip, simultaneously through being equipped with metal casing on the plastic envelope, through the metal casing parcel on drain electrode pin extension, also can conduct heat to metal casing, dispel the heat through metal casing, the radiating effect is better, when the current demand increases, still can satisfy the heat dissipation demand, avoids appearing the PCB thermal saturation phenomenon.
Description
Technical Field
The application relates to the technical field of semiconductor devices, in particular to a MOSFET chip packaging structure.
Background
MOSFETs (metal oxide semiconductor field effect transistors) are field effect transistors that utilize the electric field effect to control semiconductors, and are classified into package packages and patch packages, where the packages of MOSFETs include Power-PAK, power Connect, copperStrap, and the like, and although the conventional packaging technology significantly reduces the chip-to-PCB thermal resistance, the PCB simultaneously becomes hot saturated as the current demand continues to increase.
Disclosure of Invention
The present application is directed to a MOSFET chip package structure, so as to solve the problem that when the current requirement provided in the above background art continues to increase, the PCB will simultaneously generate a thermal saturation phenomenon.
In order to achieve the above purpose, the present application provides the following technical solutions: the MOSFET chip packaging structure comprises a plastic package shell and a silicon chip arranged in the plastic package shell, wherein a plurality of copper strips bonded with the top of the silicon chip, source pins and grid pins bonded with one ends of different copper strips respectively, drain pins bonded with the bottom of the silicon chip and a heat conduction bottom plate connected with the bottom of the drain pins are further arranged in the plastic package shell, a metal shell is coated and bonded on the plastic package shell, and one end of the metal shell is wrapped on the drain pins and used for conducting heat and dissipating heat.
Preferably, the copper strip and the drain electrode pins are bonded with the silicon chip through the resin layer, and one end of the copper strip is also bonded with the source electrode pins and the gate electrode pins through the resin layer.
Preferably, the source-level pin, the gate pin, the drain pin and one end of the plastic package shell, which is far away from the plastic package shell, extend outwards through the plastic package shell, and one end of the metal shell is wrapped outside the extending end of the drain pin.
Preferably, a heat conducting strip is further longitudinally arranged in the plastic package shell, the bottom of the heat conducting strip is bent in a question mark shape and connected with the bottom of the drain electrode pin, and the top of the heat conducting strip longitudinally penetrates through the plastic package shell to be connected with the metal shell.
Preferably, the heat dissipation groove is arranged in the metal shell, the top of the heat conduction strip is connected with the inner top wall of the heat dissipation groove, the bottom of the plastic package shell and the bottom of the heat conduction bottom plate are attached to the top of the PCB, and the source-level pins, the grid pins and the drain-level pins are welded with the PCB.
Compared with the prior art, the beneficial effects of this application are:
this application heat is conducted to the PCB bottom plate through drain electrode pin and heat conduction bottom plate, more heat dissipation area of contact has been provided, take away the heat from the silicon chip, be equipped with the metal casing simultaneously on plastic envelope shell, wrap up on drain electrode pin extension end through the metal casing, also can conduct heat to the metal casing on, dispel the heat through the metal casing, the radiating effect is better, when the current demand increases, still can satisfy the heat dissipation demand, avoid appearing PCB thermal saturation phenomenon.
Drawings
FIG. 1 is a schematic view of the internal structure of the present application;
FIG. 2 is a schematic view of the structure of the gate pins and the heat conductive strips of the present application;
fig. 3 is a schematic diagram of a heat sink structure in the present application.
In the figure: 1. a PCB board; 2. a plastic package shell; 3. a thermally conductive base plate; 4. a drain lead; 5. a silicon chip; 6. copper strips; 7. a source pin; 8. a resin layer; 9. a metal housing; 10. a heat sink; 11. a heat conducting strip; 12. and a gate pin.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.
In the description of the present application, it should be understood that the terms "upper," "lower," "front," "rear," "left," "right," "top," "bottom," "inner," "outer," and the like indicate an orientation or a positional relationship based on that shown in the drawings, merely for convenience of description and to simplify the description, and do not indicate or imply that the devices or elements referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present application.
Examples:
referring to fig. 1-3, the present application provides a technical solution: the utility model provides a MOSFET chip packaging structure, including plastic envelope 2 and establish the silicon chip 5 in plastic envelope 2, still be equipped with in the plastic envelope 2 with silicon chip 5 top a plurality of copper strips 6, source pin 7 and the grid pin 12 of bonding with different copper strips 6 one end respectively, drain pin 4 with silicon chip 5 bottom bonding, the heat conduction bottom plate 3 of being connected with drain pin 4 bottom, heat is conducted to the PCB bottom plate through drain pin 4 and heat conduction bottom plate 3, more heat dissipation area of contact is provided, take away the heat from silicon chip 5, the inside bonding wire encapsulation technique that does not adopt of this application, the bonding wire interconnection form has been improved, replace the bonding wire with the strap, in order to reduce encapsulation resistance, inductance and thermal resistance, the cladding bonds on plastic envelope 2 has metal casing 9, and the one end parcel of metal casing 9 is used for heat conduction and dispels the heat on drain pin 4, wrap up on drain pin 4 extension end through metal casing 9, also can be conducted to metal casing 9, the radiating effect is better, when the electric current demand increases, can still satisfy the heat dissipation demand, avoid the heat dissipation phenomenon to appear in saturation.
The copper strip 6 and the drain electrode pin 4 are both adhered to the silicon chip 5 through the resin layer 8, and one end of the copper strip 6 is also adhered to the source electrode pin 7 and the gate electrode pin 12 through the resin layer 8.
The ends of the source-level pins 7, the gate pins 12, the drain pins 4, which are far away from the plastic package housing 2, extend outwards through the plastic package housing 2, and one end of the metal housing 9 is wrapped outside the extending end of the drain pins 4.
The plastic package shell 2 is internally and longitudinally provided with the heat conducting strip 11, the bottom of the heat conducting strip 11 is bent in a question mark shape and is connected with the bottom of the drain electrode pin 4, the top of the heat conducting strip 11 longitudinally penetrates through the plastic package shell 2 to be connected with the metal shell 9, heat on the drain electrode pin 4 in the plastic package shell 2 can be directly conducted onto the metal shell 9 through the heat conducting strip 11, and the heat conducting and radiating effects are better.
The heat dissipation groove 10 is formed in the metal shell 9, the top of the heat conduction strip 11 is connected with the inner top wall of the heat dissipation groove 10, the bottom of the plastic package shell 2 and the bottom of the heat conduction bottom plate 3 are attached to the top of the PCB 1, and the source-level pin 7, the grid pin 12 and the drain-level pin 4 are welded with the PCB 1.
While the fundamental principles and main features of the present application and advantages thereof have been shown and described, it will be apparent to those skilled in the art that the present application is not limited to the details of the above-described exemplary embodiments, but may be embodied in other specific forms without departing from the spirit or essential characteristics thereof; the present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Although embodiments of the present application have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the application, the scope of which is defined in the appended claims and their equivalents.
Claims (5)
1, MOSFET chip packaging structure, including plastic envelope shell (2) and establish silicon chip (5) in plastic envelope shell (2), its characterized in that: the plastic package is characterized in that a plurality of copper strips (6) bonded with the top of the silicon chip (5), source pins (7) and grid pins (12) bonded with one ends of different copper strips (6) respectively, drain pins (4) bonded with the bottom of the silicon chip (5) and a heat conduction bottom plate (3) connected with the bottom of the drain pins (4) are further arranged in the plastic package shell (2), a metal shell (9) is bonded on the plastic package shell (2) in a coating mode, and one end of the metal shell (9) is wrapped on the drain pins (4) and used for conducting heat and dissipating heat.
2. The MOSFET die package structure of claim 1, wherein: the copper strips (6) and the drain electrode pins (4) are bonded with the silicon chip (5) through the resin layer (8), and one ends of the copper strips (6) are bonded with the source electrode pins (7) and the gate electrode pins (12) through the resin layer (8).
3. The MOSFET die package structure of claim 1, wherein: the source-level pins (7), the grid pins (12), the drain pins (4) and the plastic package shell (2) are arranged at the outer side of the extending end of the drain pins (4), one ends of the metal shell (9) penetrate through the plastic package shell (2) and extend outwards.
4. The MOSFET die package structure of claim 1, wherein: the plastic package is characterized in that a heat conducting strip (11) is further longitudinally arranged in the plastic package shell (2), the bottom of the heat conducting strip (11) is bent in a question mark shape and connected with the bottom of the drain electrode pin (4), and the top of the heat conducting strip (11) longitudinally penetrates through the plastic package shell (2) and is connected with the metal shell (9).
5. The MOSFET die package structure of claim 4, wherein: the heat dissipation groove (10) is formed in the metal shell (9), the top of the heat conduction strip (11) is connected with the inner top wall of the heat dissipation groove (10), the bottom of the plastic package shell (2) and the bottom of the heat conduction bottom plate (3) are attached to the top of the PCB (1), and the source-level pins (7), the grid pins (12) and the drain-level pins (4) are welded with the PCB (1).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202320512112.XU CN219435850U (en) | 2023-03-09 | 2023-03-09 | MOSFET chip packaging structure |
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CN202320512112.XU CN219435850U (en) | 2023-03-09 | 2023-03-09 | MOSFET chip packaging structure |
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CN219435850U true CN219435850U (en) | 2023-07-28 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116675175A (en) * | 2023-08-04 | 2023-09-01 | 青岛泰睿思微电子有限公司 | Multifunctional image light sense packaging equipment |
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2023
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN116675175A (en) * | 2023-08-04 | 2023-09-01 | 青岛泰睿思微电子有限公司 | Multifunctional image light sense packaging equipment |
CN116675175B (en) * | 2023-08-04 | 2023-12-08 | 青岛泰睿思微电子有限公司 | Multifunctional image light sense packaging structure |
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