CN212012598U - Multi-path trigger wake-up circuit of low-power consumption equipment - Google Patents
Multi-path trigger wake-up circuit of low-power consumption equipment Download PDFInfo
- Publication number
- CN212012598U CN212012598U CN202020900602.3U CN202020900602U CN212012598U CN 212012598 U CN212012598 U CN 212012598U CN 202020900602 U CN202020900602 U CN 202020900602U CN 212012598 U CN212012598 U CN 212012598U
- Authority
- CN
- China
- Prior art keywords
- circuit
- rotary switch
- wake
- power consumption
- trigger
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Landscapes
- Electronic Switches (AREA)
Abstract
The utility model relates to a circuit especially relates to a multichannel trigger awakening circuit of low-power consumption equipment, include the many grades of rotary switch input circuit that constitute by a plurality of PMOS pipes and a plurality of resistance and by resistance R1, PMOS pipe Q5, electric capacity C1, the time delay trigger circuit that C2 constitutes, RSW0-RSW4 is connected respectively to every fender grade of rotary switch input circuit that keeps off more, VCC is connected to the public end of many grades of rotary switch input circuit, WAKE _ UP _ IN is connected to the chip and awakens UP the pin, the low level awakens UP, built-IN pull-UP. The utility model discloses can awaken up the trigger for single pin, and have the low-power consumption equipment that requires to awaken up the trigger time, when many grades of rotary switch keep off the position and change, realize triggering the function of awakening up, the consumption of own is extremely low (uA level), is fit for deploying on low-power consumption equipment.
Description
Technical Field
The utility model relates to a circuit especially relates to a multichannel trigger wake-up circuit of low-power consumption equipment.
Background
In the design of the low-power wake-up trigger circuit, a multi-gear rotary switch needs to pull down the level of a certain pin for a period of time when the gear is changed so as to wake up the circuit. The existing circuit uses a logic gate circuit, cannot automatically recover after triggering and awakening pins, easily causes repeated triggering of individual chips and limits the application range.
SUMMERY OF THE UTILITY MODEL
The utility model discloses a solve the defect that exists among the above-mentioned prior art and not enough, provide one kind and can awaken up the trigger for single pin, and have the low-power consumption equipment that requires to awaken up the trigger time, when many grades of rotary switch keep off the position and change, realize triggering the awakening function of awakening up, the consumption of own is extremely low (uA level), is fit for the multichannel trigger awakening circuit of the low-power consumption equipment who deploys on low-power consumption equipment.
The technical scheme of the utility model: a multi-way trigger WAKE-UP circuit of low-power consumption equipment comprises a multi-gear rotary switch input circuit formed by a plurality of PMOS (P-channel metal oxide semiconductor) tubes and a plurality of resistors, and a delay trigger circuit formed by a resistor R1, a PMOS tube Q5 and capacitors C1 and C2, wherein each gear of the multi-gear rotary switch input circuit is respectively connected with RSW0-RSW4, a common end of the multi-gear rotary switch input circuit is connected with VCC, WAKE _ UP _ IN is connected to a chip WAKE-UP pin, and low-level WAKE-UP and built-IN pull-UP are achieved.
The utility model discloses can awaken up the trigger for single pin, and have the low-power consumption equipment that requires to awaken up the trigger time, when many grades of rotary switch keep off the position and change, realize triggering the function of awakening up, the consumption of own is extremely low (uA level), is fit for deploying on low-power consumption equipment.
Preferably, the multi-gear rotary switch input circuit is a 4-gear rotary switch input circuit composed of PMOS transistors Q1, Q2, Q3 and Q4 and resistors R2, R3, R4 and R5.
Preferably, when the shift of the rotary switch is changed, the common end is not overlapped with any pin of RSW0-4 for a period of time, at the moment, the grids of the PMOS tubes Q1-Q4 are respectively pulled down by resistors R5-R2, the capacitor C2 is conducted to VCC for charging, the grid of the PMOS tube Q5 is pulled up, and the wake-up pin is pulled down; when the rotation process of the rotary switch is finished, the capacitor C2 still keeps high level, the awakening action is continued until the resistor R1 discharges the capacitor C2 to be below the threshold level of the grid electrode of the PMOS tube Q5, so that enough awakening time is ensured, after the grid electrode of the PMOS tube Q5 is lower than the threshold level, the awakening pin is disconnected from the ground and pulled up again for releasing, the awakening process is finished, and the capacitor C1 has the effect of preventing the open-close shaking from causing misoperation.
Preferably, the PMOS tube Q1-Q4 is selected from the following types: in SI2301, the type of the PMOS transistor Q5 is: sl 2300.
Preferably, the resistances of the resistors R1-R5 are 1K-10M, the capacitance of the capacitor C2 is 10nf-22uf, and the capacitance of the capacitor C1 is 1nf-1 uf.
Preferably, the resistance value of the R1 is 100k, the resistance values of the resistors R2-R5 are 200k, and the capacitance value of the capacitor C2 is 1 uf.
The utility model discloses can awaken up the trigger for single pin, and have the low-power consumption equipment that requires to awaken up the trigger time, when many grades of rotary switch keep off the position and change, realize triggering the function of awakening up, the consumption of own is extremely low (uA level), is fit for deploying on low-power consumption equipment.
Drawings
Fig. 1 is a schematic circuit diagram according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings, but the present invention is not limited thereto.
Examples
As shown in fig. 1, the present embodiment takes a 4-way multi-gear rotary switch as an example:
a multipath trigger WAKE-UP circuit of low-power-consumption equipment comprises a PMOS tube Q1, Q2, Q3 and Q4, a resistor R2, a resistor R3, a resistor R4 and a resistor R5 form a 4-gear rotary switch input circuit, a delay trigger circuit is formed by the resistor R1, the resistor C2, the resistor Q5 and the resistor C1, a common end of the 4-gear rotary switch is connected with VCC, 4 gears are respectively connected with RSW0-RSW4, WAKE _ UP _ IN is connected to a chip WAKE-UP pin, and low-level WAKE-UP and built-UP pull are carried out.
The specific principle is as follows:
when the rotary switch is changed in gear, the common end is not lapped with any pin of RSW0-4 for a period of time, at the moment, the grids of Q1-Q4 are respectively pulled down by R5-R2, C2 is conducted to VCC for charging, the grid of Q5 is pulled up, and the wake-up pin is pulled down. When the rotation process is over, C2 remains high and the wake-up action continues until R1 discharges C2 below the gate threshold level of Q5 in order to ensure sufficient wake-up time. After the gate of the Q5 is lower than the threshold level, the wake-up pin is disconnected from the ground, pulled up again and released, and the wake-up process is ended. The function of C1 is to prevent the shaking of the open and close from causing malfunction.
Q1-Q4 are selected from the following types: SI 2301.
The R2-R5 values are 200K, but 1K-10M.
R1 has a resistance of 100k, but may be 1 k-10M.
C2 volume fraction is 1uf, but 10nf-22uf can be.
The Q5 type selection is: sl 2300.
The C1 type selection is: 1nf-1 uf.
The utility model discloses a 4 keep off rotary switch input circuit can adopt 2-10 grades of rotary switch input circuit to replace (dotted line frame 1 is a gear unit in figure 1, and 2-10 can be duplicated to such gear unit), accomplish 2-10 ways and trigger.
The utility model discloses can awaken up the trigger for single pin, and have the low-power consumption equipment that requires to awaken up the trigger time, when many grades of rotary switch keep off the position and change, realize triggering the function of awakening up, the consumption of own is extremely low (uA level), is fit for deploying on low-power consumption equipment.
Claims (6)
1. A multi-trigger wake-up circuit of a low-power consumption device is characterized in that: the multi-gear rotary switch comprises a multi-gear rotary switch input circuit consisting of a plurality of PMOS (P-channel metal oxide semiconductor) tubes and a plurality of resistors, and a delay trigger circuit consisting of a resistor R1, a PMOS tube Q5, capacitors C1 and C2, wherein each gear of the multi-gear rotary switch input circuit is respectively connected with RSW0-RSW4, the common end of the multi-gear rotary switch input circuit is connected with VCC, WAKE _ UP _ IN is connected with a chip WAKE-UP pin, low-level WAKE-UP is performed, and pull-UP is performed internally.
2. The multi-trigger wake-up circuit of a low power consumption device according to claim 1, wherein: the multi-gear rotary switch input circuit is a 4-gear rotary switch input circuit consisting of PMOS tubes Q1, Q2, Q3 and Q4 and resistors R2, R3, R4 and R5.
3. The multi-trigger wake-up circuit of a low power consumption device according to claim 2, wherein: when the gear of the rotary switch changes, the common end is not lapped with any pin of RSW0-4 for a period of time, at the moment, the grids of PMOS tubes Q1-Q4 are respectively pulled down by resistors R5-R2, a capacitor C2 is conducted to VCC for charging, the grid of the PMOS tube Q5 is pulled up, and the wake-up pin is pulled down; when the rotation process of the rotary switch is finished, the capacitor C2 still keeps high level, the awakening action is continued until the resistor R1 discharges the capacitor C2 to be below the threshold level of the grid electrode of the PMOS tube Q5, so that enough awakening time is ensured, after the grid electrode of the PMOS tube Q5 is lower than the threshold level, the awakening pin is disconnected from the ground and pulled up again for releasing, the awakening process is finished, and the capacitor C1 has the effect of preventing the open-close shaking from causing misoperation.
4. The multi-trigger wake-up circuit of a low power consumption device according to claim 2, wherein: the PMOS tube Q1-Q4 is selected as follows: in SI2301, the type of the PMOS transistor Q5 is: sl 2300.
5. The multi-trigger wake-up circuit of a low power consumption device according to claim 2, wherein: the resistance values of the resistors R1-R5 are 1K-10M, the capacitance value of the capacitor C2 is 10nf-22uf, and the capacitance value of the capacitor C1 is 1nf-1 uf.
6. The multi-trigger wake-up circuit of a low power consumption device according to claim 5, wherein: the resistance value of the R1 is 100k, the resistance values of the resistors R2-R5 are 200k, and the capacitance value of the capacitor C2 is 1 uf.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202020900602.3U CN212012598U (en) | 2020-05-26 | 2020-05-26 | Multi-path trigger wake-up circuit of low-power consumption equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202020900602.3U CN212012598U (en) | 2020-05-26 | 2020-05-26 | Multi-path trigger wake-up circuit of low-power consumption equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
CN212012598U true CN212012598U (en) | 2020-11-24 |
Family
ID=73417610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202020900602.3U Active CN212012598U (en) | 2020-05-26 | 2020-05-26 | Multi-path trigger wake-up circuit of low-power consumption equipment |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN212012598U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112543017A (en) * | 2020-12-02 | 2021-03-23 | 广州朗国电子科技有限公司 | Long-connection circuit without influence on power consumption |
CN112918408A (en) * | 2021-02-07 | 2021-06-08 | 上海科世达-华阳汽车电器有限公司 | Wake-up circuit and vehicle |
-
2020
- 2020-05-26 CN CN202020900602.3U patent/CN212012598U/en active Active
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112543017A (en) * | 2020-12-02 | 2021-03-23 | 广州朗国电子科技有限公司 | Long-connection circuit without influence on power consumption |
CN112918408A (en) * | 2021-02-07 | 2021-06-08 | 上海科世达-华阳汽车电器有限公司 | Wake-up circuit and vehicle |
CN112918408B (en) * | 2021-02-07 | 2022-10-18 | 上海科世达-华阳汽车电器有限公司 | Wake-up circuit and vehicle |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN212012598U (en) | Multi-path trigger wake-up circuit of low-power consumption equipment | |
CN204810248U (en) | Power delay switch circuit and have terminal of this circuit | |
CN103984274B (en) | Digital power gating integrated circuit and method | |
CN100568728C (en) | A kind of clock signal detection circuit | |
CN109379061A (en) | TSPC trigger with set function | |
CN104635520A (en) | Power supply switch control circuit with power down delay function | |
CN113726317A (en) | Multi-way trigger wake-up circuit of low-power consumption equipment | |
CN104901656A (en) | Method and device for digital filtering and de-jittering | |
CN214101345U (en) | Level conversion structure supporting wide level range high-speed data | |
CN102426856B (en) | Based on non-volatile d type flip flop circuit and the implementation method of phase-change memory cell | |
CA1314594C (en) | Programmable logic device | |
CN107480090A (en) | A kind of circuit and method that GPIO functions are realized in Serial Peripheral Interface (SPI) equipment | |
CN105141286A (en) | Digital filter filtering single clock cycle pulses and glitches | |
WO2007067423A8 (en) | Integrated circuit with configurable bypass capacitance | |
CN106328192B (en) | The negative voltage bit line of automatic trigger writes auxiliary SRAM circuit and method | |
CN101283506A (en) | Single threshold and single conductivity type amplifier/buffer | |
CN110007897A (en) | Logic gate, logic circuit and calculation method based on resistance-variable storing device | |
CN202268860U (en) | Driving pulse signal delay circuit | |
CN204068924U (en) | Low impulse output circuit and apply the equipment of low impulse output circuit | |
CN106160704A (en) | non-volatile T flip-flop circuit | |
CN104318953B (en) | SRAM cell | |
CN106788493A (en) | A kind of low speed transmitter circuit | |
CN110989713A (en) | Dehumidifier control panel | |
CN220915270U (en) | Processing circuit based on shipping mode | |
CN111769817B (en) | PMOS-based pull-up and pull-down filter circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |